CN113257169B - Method, controller and system for changing Y-axis resolution - Google Patents
Method, controller and system for changing Y-axis resolution Download PDFInfo
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- CN113257169B CN113257169B CN202110606392.6A CN202110606392A CN113257169B CN 113257169 B CN113257169 B CN 113257169B CN 202110606392 A CN202110606392 A CN 202110606392A CN 113257169 B CN113257169 B CN 113257169B
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/2092—Details of a display terminals using a flat panel, the details relating to the control arrangement of the display terminal and to the interfaces thereto
- G09G3/2096—Details of the interface to the display terminal specific for a flat panel
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2340/00—Aspects of display data processing
- G09G2340/04—Changes in size, position or resolution of an image
- G09G2340/0407—Resolution change, inclusive of the use of different resolutions for different screen areas
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2370/00—Aspects of data communication
- G09G2370/04—Exchange of auxiliary data, i.e. other than image data, between monitor and graphics controller
Abstract
The invention provides a method, a controller and a system for changing Y-axis resolution, wherein the controller analyzes sending end data through MIP DSI bus protocol, identifies a row field synchronizing signal according to data type and counts the row synchronizing signal to obtain the current Y-axis row number, and controls and switches a receiving end data channel sequence pin signal when reaching a preset Y-axis failure row so that a display screen receives decoding failure to realize Y-axis row failure.
Description
Technical Field
The present application relates to the field of electrical data signal processing technologies, and in particular, to a method, a controller, and a system for changing a Y-axis resolution on an MIPI DSI bus.
Background
MIPI DSI is a specification of a high-speed serial interface between a main board and a display panel for mobile applications, and transmits pixel information or instructions from the main board to peripheral devices in a serial manner, reads status information or pixel information from the peripheral devices, and enjoys an independent communication protocol during transmission, including a DATA packet format and an error correction and detection mechanism, and the main signal components of the MIPI DSI are 5 sets of differential pairs, wherein 1 set of clock CLK is used, and 4 sets of DATA (called Lane in MIPI DSI interface) are used.
In the prior art, a motherboard is matched with a display panel, and the motherboard controls the display rate and the refresh rate of the matched panel. If other non-matching panels are used, a great obstacle is faced, on one hand, the indexes of the display panels of different manufacturers are different due to the problems of production cutting process and the like, and on the other hand, the indexes of the display panels of different types are different, for example, the common OLED display panel of a certain manufacturer has pixels of 1080x2180, and the TFT display panel has pixels of 1080x2160, so that the Y axis of the display panel has difference due to different production processes or specifications.
Disclosure of Invention
Based on the problems, the invention provides a method, a controller and a system for changing the Y-axis resolution, and the invention can solve the problems of adaptation when the output resolution of the main board is not matched with the display panel and matching when the refresh rate of the panel is different, thereby meeting the requirements of supporting more display panels with different specifications. Meanwhile, the method can also solve the problem that when the OLED panel is replaced by the TFT panel, the startup picture flickers due to the fact that the TFT panel needs a backlight source and the control of different panel main control chips is different.
The invention provides the following technical scheme:
in one aspect, the present invention provides a method for changing Y-axis resolution on a MIPI DSI bus, including:
step 101, a controller analyzes data of a sending terminal, and identifies a travel synchronizing signal and a field synchronizing signal according to the data type obtained by analysis;
step 102, counting the line synchronizing signals to obtain the current Y-axis line number;
103, judging whether a preset Y-axis failure line number is reached or not according to the current Y-axis line number, and if so, switching a receiving end data channel sequence pin signal to cause decoding failure of a display screen receiving end before a line synchronization signal of the failure Y axis arrives;
and step 104, executing step 103 in a circulating manner, wherein the condition of the circulation ending is that a complete frame is ended.
Further, the preset failure Y axis is a Y axis which needs to be failed through the number of rows and the number of rows, and a plurality of Y axis failure rows can be set.
Further, the preset Y-axis failure row number obtaining mode is: and calculating to obtain the number of lines to be drawn and the line number according to the display output resolution of the host and the resolution and display characteristics of the selected display screen.
And further, storing the obtained line number to be extracted, the line number and the dynamic rule into a controller according to a standard format, and when the controller is executed, reading the line number and the line number of the line extraction from the memory and sequencing according to the line number.
Further, the step of judging whether the preset Y-axis failure line number is reached according to the current Y-axis line number specifically comprises the steps of monitoring field synchronization by a controller to obtain a frame head of each frame, obtaining a line number displayed by a current image by detecting line synchronization, and simultaneously comparing the line number with the preset Y-axis failure line number to judge whether the preset Y-axis failure line number is reached.
Further, after the end of a complete frame, the detection of the next frame is resumed.
Further, the preset Y-axis failure line number is obtained through a preset line drawing rule.
Further, switching the receiving end data channel sequence pin signal to cause the decoding failure of the receiving end of the display screen can be replaced by switching the IM pin signal to cause the decoding failure of the receiving end of the display screen.
In another aspect, the present invention provides a controller that includes a memory and implements a method of architecting a change in Y-axis resolution on a MIPI DSI bus.
In another aspect, the present invention provides a system configured to change a Y-axis resolution on a MIPI DSI bus, where the system includes a main control board, a display screen, and a controller, and the controller executes a method configured to change the Y-axis resolution on the MIPI DSI bus.
The invention provides a method for changing Y-axis resolution on an MIPI DSI bus, wherein a controller analyzes sending end data through an MIPI DSI bus protocol, identifies a field synchronizing signal according to a data type and counts a line synchronizing signal to obtain a current Y-axis line number, when a preset Y-axis failure line is reached, a display screen is controlled to receive decoding failure by switching a receiving end data channel sequence pin signal, so that the Y-axis line failure is realized, the problems of adaption when the output resolution of a main board is not matched with a display panel, matching when the refresh rate of the panel is different and flashing of a startup picture are solved, and the requirements for supporting more display panels with different specifications are met.
Drawings
FIG. 1 is a schematic diagram of a MIPI DSI interface of the present invention;
FIG. 2 is a schematic diagram of the resolution of a display screen according to the present invention;
FIG. 3 is a diagram showing the relationship between SYNC signals and a display screen according to the present invention;
FIG. 4 is a timing diagram of the complete transmission of Video frames according to the present invention;
fig. 5 is a schematic diagram of signal connection between an MIPI control motherboard and a display screen according to the present invention;
FIG. 6 is a schematic structural view of a Y-axis drawing system according to the present invention;
FIG. 7 is a schematic view of the Y-axis drawing mechanism of the present invention;
fig. 8 is a diagram of the internal architecture of the controller of the present invention.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and examples.
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained according to the drawings without creative efforts.
MIPI, namely Mobile Industry Processor Interface (MIPI). MIPI (mobile industry processor interface) is an open standard and a specification established by the MIPI alliance for mobile application processors.
The DSI defines a high-speed serial interface between the processor and the display module.
DSWAP: and the data channel sequence specifies the bit sequence corresponding to each Lane of the MIPI.
The invention achieves the function of controlling the MIPI RX module by changing the Lane Swap or the PN Swap, thereby realizing the purpose of changing the Y-axis resolution of the display panel to match different panels, and simultaneously solving the problem of startup picture flickering which possibly exists when different panels are connected on the premise of not modifying the mainboard. In the invention, the Lane Swap and PN Swap functions are functions related to the practical application of the current MIPI RX or TX module, and the arrangement of the MIPI Lane and the exchange of the positive electrode and the negative electrode can be changed through the functions, so that the purposes of optimizing the layout and routing of the MIPI on a PCB or an FPC and avoiding cross are achieved.
The invention provides a method for changing Y-axis resolution on an MIPI DSI bus, which can solve the problems of adaptation when the output resolution of a mainboard is not matched with a display panel and matching when the refresh rate of the panel is different, thereby meeting the requirements of supporting more display panels with different specifications. Meanwhile, the method can also solve the problem that when the OLED panel is replaced by the TFT panel, the startup picture flickers due to the fact that the TFT panel needs a backlight source and the control of different panel main control chips is different.
Example one
Specifically, the invention provides a method for changing Y-axis resolution on MIPI DSI bus.
As shown in fig. 1, which is a schematic diagram of an MIPI DSI interface of the present invention, a host includes a CPU or other processor, a slave includes a display driver, the host and the slave are connected by an MIPI DSI interface through a twisted pair, the MIPI DSI includes 1 set of clock CLK and N set of DATA (N is a multiple of 4), and the display driver is connected to a display screen LCD/LED. Fig. 2 is a schematic diagram of the resolution of the display screen, which is 1080 × 1920.
FIG. 3 shows a display screen corresponding to SYNC signals, wherein the SYNC signals include HSYNC and VSYNC. Line sync (HSYNC): the line sync, i.e. the horizontal sync signal, is to start a new line of pixels in order for the display to know that the current line has ended. Field sync (VSYNC): the field sync, i.e. the vertical sync signal, is to start a new picture/image in order for the display to know that the current picture has ended. Anterior (Front Porch)/posterior (Back Porch): is the delay time when the video data cannot be immediately enabled after the issuance of the horizontal sync or the vertical sync signal. Including the front field shoulder (VFP), back field shoulder (VBP), front lineshoulder (HFP), back lineshoulder (HBP).
FIG. 4 is a timing diagram of complete transmission of Video pictures, which is a format diagram of a frame image, wherein HFP is the Front shoulder of horizontal Front Port line, HBP is the Back shoulder of horizontal Back Port line, VFP is the Front shoulder of Vertical Front Port field, and VBP is the Back shoulder of Vertical Back Port field.
Fig. 5 is a schematic diagram of signal connection between a MIPI control main board (main control board) and a display screen, the MIPI TX end of the control main board transmits a signal to the display screen through a MIPI BUS, and the display screen displays a MIPI RX end of a driver IC to receive the signal.
Table 1 shows the protocol data type of the MIPI DSI, and the controller needs to identify the data type therein and analyze signals such as VSYNC and HSYNC.
TABLE 1
As shown in fig. 6, assuming that the screen resolution is 1080 × 1920, the schematic diagram of the structure of the system for drawing a line on the Y axis is shown, the controller is bridged between the main control board and the display screen, the controller analyzes MIPI TX end data through MIP DSI bus protocol, identifies line field synchronization (HSYNC, VSYNC) signals according to data types, counts HSYNC after acquiring VSYNC and HSYNC, acquires a current Y axis line number, and when a preset Y axis failure line is reached, causes display screen RX decoding failure by controlling switching RX DSWAP pin, so that display data cannot be correctly analyzed and acquired, thereby realizing that the Y axis line is not displayed, and achieving the purpose of disabling the Y axis line.
The number of rows and row numbers of the Y-axis failure can be preset, so that different resolution control schemes are realized, and the specific process comprises the following steps:
1) calculating the line number and the line number of the line to be drawn according to the display output resolution of the host and the resolution and the display characteristics of the selected display screen;
2) storing information such as the line number and the dynamic adjustment rule of the line drawing line into a memory of the controller according to a standard format;
illustratively, for example, the dynamic adjustment rule is that the number of the line of each frame is increased by 5 on the basis of the number of the line of the previous frame, so that the lines of each frame are different, and the problem of flicker caused by always extracting the same line is avoided.
3) When the controller works, the controller reads out preset line numbers from the memory and arranges the line numbers from low to high according to the sequence of the line numbers; the internal architecture diagram of the controller is shown in fig. 8.
4) The controller monitors VSYNC field synchronization to obtain a frame head of each frame, obtains a line number displayed by a current image by detecting HSYNC line synchronization, and simultaneously compares a preset line number queue;
5) if the preset line number is displayed, switching an RX DSWAP pin signal to ensure that the display screen cannot correctly analyze the MIPI image signal, and not displaying the line;
6) and repeating the step 5) until one frame is finished, and detecting a new frame from the step 4) after one frame is finished.
Therefore, the invention achieves the purpose of changing the Y-axis resolution by accurately controlling the mode of switching the RX DSWAP pin signal to cause the RX decoding to fail. It is emphasized that the controller of the present invention can achieve precise control of each line based on the resolution of the line sync HSYNC signal.
FIG. 7 is a schematic diagram of a Y-axis drawing mechanism, in which 1920 VSYNC frames are shown in the normal timing, 1920 DSWAP frame display areas are shown in the drawing frame; DSWAP masking/striping 5 strips, RX only receives 1915 strips of display, DSWAP screen display area 1915 strips. Analyzing a mechanism description of how to draw lines after VSYNC and HSYNC are obtained, starting from VSYNC in each frame picture, determining a current line number by counting HSYNC, the invention can draw a plurality of lines, the drawing lines can be fixed or different in each frame, the invention can be controlled by a preset drawing line rule, taking DSWAP mask/drawing line 5 as an example, the mask is realized by switching DSWAP pins to cause RX decoding to fail according to the preset line number of 5 drawing lines. The invention makes the preset line invalid by drawing line, the quantity and position of drawing line are controlled by the controller, in order to avoid drawing line to cause picture distortion, the drawing line position of each frame can be dynamically adjusted, the quantity of drawing line of each frame can also be dynamically adjusted.
It is worth noting that the mask for realizing RX decoding failure is shown by switching DSWAP pins, besides the DSWAP mode, the mask also comprises an IM pin for controlling the display screen, the IM pin is usually positioned on a driving chip of the display screen, and the function of setting MIPI interface signal line sequence arrangement can be achieved similarly to the DSWAP pin. The DSWAP or other signal controls may be fixed or change position with frame, and the DSWAP or other signal controls may be fixed or change number with frame.
In another aspect, the present invention provides a controller that includes a memory and implements a method of architecting a change in Y-axis resolution on a MIPI DSI bus.
In another aspect, the present invention provides a system configured to change a Y-axis resolution on a MIPI DSI bus, where the system includes a main control board, a display screen, and a controller, and the controller executes a method configured to change the Y-axis resolution on the MIPI DSI bus.
The invention provides a method for changing Y-axis resolution on an MIPI DSI bus, wherein a controller analyzes sending end data through an MIPI DSI bus protocol, identifies a field synchronizing signal according to a data type and counts a line synchronizing signal to obtain a current Y-axis line number, and controls to switch a receiving end data channel sequence pin signal according to the preset Y-axis failure line number when a preset Y-axis failure line is reached so that a display screen receives decoding failure to realize the Y-axis line failure.
The embodiments of the present invention described above are combinations of elements and features of the present invention. Unless otherwise mentioned, the elements or features may be considered optional. Each element or feature may be practiced without being combined with other elements or features. In addition, the embodiments of the present invention may be configured by combining some elements and/or features. The order of operations described in the embodiments of the present invention may be rearranged. Some configurations of any embodiment may be included in another embodiment, and may be replaced with corresponding configurations of the other embodiment. It will be apparent to those skilled in the art that claims that are not explicitly cited in each other in the appended claims may be combined into an embodiment of the present invention or may be included as new claims in a modification after the present invention is filed.
In a firmware or software configuration, embodiments of the present invention may be implemented in the form of modules, procedures, functions, and the like. The software codes may be stored in memory units and executed by processors. The memory unit is located inside or outside the processor, and may transmit and receive data to and from the processor via various known means.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (9)
1. A method for changing Y-axis resolution on MIPI DSI bus is disclosed,
step 101, a controller analyzes data of a sending terminal, and identifies a travel synchronizing signal and a field synchronizing signal according to the data type obtained by analysis;
step 102, counting the line synchronizing signals to obtain the current Y-axis line number;
103, judging whether a preset Y-axis failure line number is reached or not according to the current Y-axis line number, and if so, switching a receiving end data channel sequence pin signal to cause decoding failure of a display screen receiving end before a line synchronization signal of the failure Y axis arrives; the preset Y-axis failure row number obtaining mode is as follows: calculating and obtaining the number of lines to be drawn and the line number according to the display output resolution of the host and the resolution and display characteristics of the selected display screen;
and step 104, executing step 103 in a circulating manner, wherein the condition of the circulation ending is that a complete frame is ended.
2. The method of claim 1, wherein the default Y-axis is a Y-axis that needs to be failed by setting a number of rows and a row number, and a plurality of Y-axis failure rows can be set.
3. The method of claim 1, wherein the obtained number of lines to be taken and the line number and the dynamic rules are stored in a standard format in a controller, and when executed, the controller reads the number of lines to be taken and the line number from a memory and sorts the lines by the line number.
4. The method of claim 1, wherein determining whether a predetermined Y-axis failing line number is to be reached based on the current Y-axis line number specifically comprises the controller monitoring field synchronization to obtain a frame start of each frame, obtaining a line number of a current image display by detecting line synchronization, and comparing the line number with the predetermined Y-axis failing line number to determine whether the line number is reached.
5. The method of claim 1, wherein detecting the next frame is resumed after the end of a complete frame.
6. The method of claim 1, wherein the predetermined Y-axis failure row number is obtained by a predetermined rule of drawing.
7. The method of claim 1, wherein switching receiver data channel sequential pin signals to disable display screen receiver decoding can be replaced with switching IM pin signals to disable display screen receiver decoding.
8. A controller comprising a memory and implementing a method of changing Y-axis resolution over a MIPI DSI bus as claimed in any one of claims 1 to 7.
9. A system configured to change Y-axis resolution over a MIPI DSI bus, the system comprising a main control board, a display screen, and a controller, the controller performing the method of any of claims 1-7 configured to change Y-axis resolution over the MIPI DSI bus.
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| WO2014019068A1 (en) * | 2012-07-30 | 2014-02-06 | Bruno Delean | Method and system for vision based interfacing with a computer |
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