CN113223601B - 一次写入型存储器码的纠错码管理的电路、系统和方法 - Google Patents
一次写入型存储器码的纠错码管理的电路、系统和方法Info
- Publication number
- CN113223601B CN113223601B CN202110583253.6A CN202110583253A CN113223601B CN 113223601 B CN113223601 B CN 113223601B CN 202110583253 A CN202110583253 A CN 202110583253A CN 113223601 B CN113223601 B CN 113223601B
- Authority
- CN
- China
- Prior art keywords
- wom
- ecc
- code
- bits
- symbol
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/38—Response verification devices
- G11C29/42—Response verification devices using error correcting codes [ECC] or parity check
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1004—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's to protect a block of data words, e.g. CRC or checksum
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1012—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using codes or arrangements adapted for a specific type of error
- G06F11/1016—Error in accessing a memory location, i.e. addressing error
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1044—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices with specific ECC/EDC distribution
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1048—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using arrangements adapted for a specific error detection or correction feature
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1072—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices in multilevel memories
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1076—Parity data used in redundant arrays of independent storages, e.g. in RAID systems
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
- G06F12/023—Free address space management
- G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
- G06F12/0246—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/0614—Improving the reliability of storage systems
- G06F3/0619—Improving the reliability of storage systems in relation to data integrity, e.g. data losses, bit errors
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0638—Organizing or formatting or addressing of data
- G06F3/064—Management of blocks
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0673—Single storage device
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/52—Protection of memory contents; Detection of errors in memory contents
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/13—Linear codes
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Quality & Reliability (AREA)
- Human Computer Interaction (AREA)
- Computer Security & Cryptography (AREA)
- Probability & Statistics with Applications (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
- Error Detection And Correction (AREA)
- Detection And Correction Of Errors (AREA)
- Read Only Memory (AREA)
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US14/703,714 | 2015-05-04 | ||
| US14/703,714 US9772899B2 (en) | 2015-05-04 | 2015-05-04 | Error correction code management of write-once memory codes |
| CN201680035012.5A CN107710163B (zh) | 2015-05-04 | 2016-05-04 | 一次写入型存储器码的纠错码管理的电路、系统和方法 |
| PCT/US2016/030822 WO2016179309A1 (en) | 2015-05-04 | 2016-05-04 | Error correction code management of write-once memory codes |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201680035012.5A Division CN107710163B (zh) | 2015-05-04 | 2016-05-04 | 一次写入型存储器码的纠错码管理的电路、系统和方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN113223601A CN113223601A (zh) | 2021-08-06 |
| CN113223601B true CN113223601B (zh) | 2026-03-17 |
Family
ID=57217974
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202110583253.6A Active CN113223601B (zh) | 2015-05-04 | 2016-05-04 | 一次写入型存储器码的纠错码管理的电路、系统和方法 |
| CN201680035012.5A Active CN107710163B (zh) | 2015-05-04 | 2016-05-04 | 一次写入型存储器码的纠错码管理的电路、系统和方法 |
Family Applications After (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201680035012.5A Active CN107710163B (zh) | 2015-05-04 | 2016-05-04 | 一次写入型存储器码的纠错码管理的电路、系统和方法 |
Country Status (4)
| Country | Link |
|---|---|
| US (2) | US9772899B2 (https=) |
| JP (1) | JP6975047B2 (https=) |
| CN (2) | CN113223601B (https=) |
| WO (1) | WO2016179309A1 (https=) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9772899B2 (en) * | 2015-05-04 | 2017-09-26 | Texas Instruments Incorporated | Error correction code management of write-once memory codes |
| DE102015113414B4 (de) * | 2015-08-14 | 2023-02-23 | Infineon Technologies Ag | Fehlerkorrektur unter Verwendung von WOM-Codes |
| KR102645140B1 (ko) * | 2018-12-06 | 2024-03-07 | 삼성전자주식회사 | Fpga를 포함하는 메모리 시스템 및 이의 동작 방법 |
| US11164652B2 (en) * | 2019-06-21 | 2021-11-02 | Micron Technology, Inc. | Two-layer code with low parity cost for memory sub-systems |
| EP4060670B1 (en) | 2021-03-18 | 2025-07-30 | Murata Manufacturing Co., Ltd. | Multiple time programmable memory using one time programmable memory and error correction codes |
| TWI838137B (zh) * | 2023-02-23 | 2024-04-01 | 大陸商集創北方(珠海)科技有限公司 | 具寫入保護功能的燒寫控制電路、電子晶片以及資訊處理裝置 |
Family Cites Families (25)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2285524B (en) * | 1994-01-11 | 1998-02-04 | Advanced Risc Mach Ltd | Data memory and processor bus |
| KR100223634B1 (ko) * | 1997-01-15 | 1999-10-15 | 윤종용 | 고속 데이타 처리 및 전송을 위한 에러정정용 메모리를 구비하는 시스템 디코더 및 에러정정용 메모리 제어방법 |
| US6751769B2 (en) * | 2000-06-06 | 2004-06-15 | International Business Machines Corporation | (146,130) error correction code utilizing address information |
| EP1346364B8 (en) * | 2000-12-20 | 2013-01-09 | Callahan Cellular L.L.C. | Data processing device with a write once memory (wom) |
| EP1233523A1 (en) * | 2001-02-16 | 2002-08-21 | Deutsche Thomson-Brandt Gmbh | Method and apparatus for decoding error correction code |
| US6901549B2 (en) * | 2001-12-14 | 2005-05-31 | Matrix Semiconductor, Inc. | Method for altering a word stored in a write-once memory device |
| US7069494B2 (en) * | 2003-04-17 | 2006-06-27 | International Business Machines Corporation | Application of special ECC matrix for solving stuck bit faults in an ECC protected mechanism |
| DE102005040916A1 (de) * | 2005-08-30 | 2007-03-08 | Robert Bosch Gmbh | Speicheranordnung und Betriebsverfahren dafür |
| US7802169B2 (en) * | 2005-12-12 | 2010-09-21 | Mediatek Inc. | Error correction devices and correction methods |
| US8245094B2 (en) * | 2007-11-20 | 2012-08-14 | California Institute of Technology Texas A & M | Rank modulation for flash memories |
| US8341501B2 (en) * | 2009-04-30 | 2012-12-25 | International Business Machines Corporation | Adaptive endurance coding of non-volatile memories |
| CN102103558B (zh) * | 2009-12-18 | 2013-09-18 | 上海华虹集成电路有限责任公司 | 一种带有写重传功能的多通道NANDflash控制器 |
| CN102339648B (zh) * | 2010-07-23 | 2014-07-09 | 北京兆易创新科技股份有限公司 | 一种检错/纠错校验模块的检测方法及装置 |
| US9070427B2 (en) * | 2010-08-13 | 2015-06-30 | Sandisk Technologies Inc. | Data coding using divisions of memory cell states |
| US8780620B2 (en) * | 2010-09-20 | 2014-07-15 | The Texas A&M University | Information representation and coding for nonvolatile memories |
| US8959417B2 (en) * | 2011-11-23 | 2015-02-17 | Marvell World Trade Ltd. | Providing low-latency error correcting code capability for memory |
| US8645789B2 (en) * | 2011-12-22 | 2014-02-04 | Sandisk Technologies Inc. | Multi-phase ECC encoding using algebraic codes |
| US9230652B2 (en) * | 2012-03-08 | 2016-01-05 | California Institute Of Technology | Flash memories using minimum push up, multi-cell and multi-permutation schemes for data storage |
| WO2013134735A1 (en) * | 2012-03-08 | 2013-09-12 | California Institute Of Technology | Rank-modulation rewriting codes for flash memories |
| US8914570B2 (en) * | 2012-05-04 | 2014-12-16 | International Business Machines Corporation | Selective write-once-memory encoding in a flash based disk cache memory |
| US9632866B2 (en) | 2012-09-28 | 2017-04-25 | Duke University | Systems for and methods of extending lifetime of non-volatile memory |
| WO2014116301A1 (en) | 2013-01-24 | 2014-07-31 | California Institute Of Technology | Joint rewriting and error correction in write-once memories |
| KR102068519B1 (ko) * | 2013-07-01 | 2020-01-21 | 삼성전자주식회사 | 저장 장치, 그것의 쓰기 방법 및 읽기 방법 |
| US10191803B2 (en) * | 2015-01-30 | 2019-01-29 | California Institute Of Technology | Rewriting flash memories by message passing |
| US9772899B2 (en) * | 2015-05-04 | 2017-09-26 | Texas Instruments Incorporated | Error correction code management of write-once memory codes |
-
2015
- 2015-05-04 US US14/703,714 patent/US9772899B2/en active Active
-
2016
- 2016-05-04 JP JP2017557908A patent/JP6975047B2/ja active Active
- 2016-05-04 CN CN202110583253.6A patent/CN113223601B/zh active Active
- 2016-05-04 WO PCT/US2016/030822 patent/WO2016179309A1/en not_active Ceased
- 2016-05-04 CN CN201680035012.5A patent/CN107710163B/zh active Active
-
2017
- 2017-08-16 US US15/678,315 patent/US10191801B2/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| JP2018520410A (ja) | 2018-07-26 |
| US10191801B2 (en) | 2019-01-29 |
| WO2016179309A1 (en) | 2016-11-10 |
| CN113223601A (zh) | 2021-08-06 |
| US20180011757A1 (en) | 2018-01-11 |
| JP6975047B2 (ja) | 2021-12-01 |
| CN107710163B (zh) | 2021-06-18 |
| US9772899B2 (en) | 2017-09-26 |
| CN107710163A (zh) | 2018-02-16 |
| US20160328289A1 (en) | 2016-11-10 |
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