CN113223456A - 一种堆栈式微显示驱动芯片架构及其制备方法 - Google Patents

一种堆栈式微显示驱动芯片架构及其制备方法 Download PDF

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CN113223456A
CN113223456A CN202110646405.2A CN202110646405A CN113223456A CN 113223456 A CN113223456 A CN 113223456A CN 202110646405 A CN202110646405 A CN 202110646405A CN 113223456 A CN113223456 A CN 113223456A
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吕迅
刘晓佳
刘胜芳
曹贺
乔程
陆瑞
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Semiconductor Integrated Display Technology Co Ltd
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    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
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    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
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Abstract

本发明揭示了一种堆栈式微显示驱动芯片架构，包括相互独立的上层的像素电路层和下层的驱动电路层，所述像素电路层的边缘为TSV电路，中间为像素电路，所述驱动电路层上表面的周边设有凸出来用于与TSV电路电连接的触点。本发明通过使用堆栈式架构，把像素电路和外围驱动电路分别制备，再使用wafer to wafer或d i e to wafer的3D封装技术把2种电路bond i ng到一起，制备像素电路和外围驱动电路3D堆叠的驱动I C。达到减小d i e像素面积，提升良率，降低成本的目的；同时解决传统驱动I C兼容性差的问题，能满足像素电路的大驱动电流和驱动电路的高速度需求；降低功耗和发热。

Description

一种堆栈式微显示驱动芯片架构及其制备方法
技术领域
本发明涉及微显示驱动技术领域。
背景技术
硅基MOSFET(金属-氧化物-半导体场效应晶体管)驱动IC已经广泛用于微显示领域，包括硅基有机发光二极管(硅基OLED)，硅基液晶(LCOS)，Micro LED，数字光处理(DLP)等，借助单晶硅高载流子迁移率(～1350cm2/Vs)，已经实现了超高分辨率。传统微显示驱动IC包括像素电路和外围电路2部分，像素电路是重复的电路阵列，用来驱动光学结构，显示图像；外围电路包括行驱动电路，列驱动电路，存储电路(SRAM)，逻辑运算电路(logic)，模数/数模转换模块(ADC/DAC)，控制IO电路，电源管理模块等，用来处理、解析输入的视频信号，并输出到像素电路，使像素电路显示图像。
因为显示区域本身较大，再加上外围电路占用20-40％面积，微显示驱动IC一般在0.5-1英寸，相同制程能力情况下，die越大，良率越低，目前微显示驱动IC受限于die面积大，良率低，成本较高。由于显示器件对驱动电流、漏电流和亚阈值特性的需求，像素电路一般使用0.18-0.5um的制程，而驱动IC需要更快的速度，一般使用<0.18um的制程，制程越先进，速度越快。但是由于制程的差异，很难在同一片wafer上集成差距很大的工艺，例如可以在同一片wafer上集成0.5um和0.18um的工艺，但是很难集成0.5um和45nm的工艺，这种工艺不兼容，很大程度限制了微显示驱动IC的性能提升，所以降低成本、开发高性能微显示驱动IC很有意义。
发明内容
本发明所要解决的技术问题是实现一种能避免驱动电路IC异常导致良率损失的芯片架构，并且功耗和发热更低。
为了实现上述目的，本发明采用的技术方案为：一种堆栈式微显示驱动芯片架构，包括相互独立的上层的像素电路层和下层的驱动电路层，所述像素电路层的边缘为TSV电路，中间为像素电路，所述驱动电路层上表面的周边设有凸出来用于与TSV电路电连接的触点。
所述像素电路层和驱动电路层之间设有用于粘粘的胶黏层。
所述驱动电路层包括两侧的两组行驱动模块，位于两组行驱动模块之间的电源管理模块、ADC/DAC模块、温度传感器模块、控制IO模块、Logic模块、SRAM模块，以及位于两组行驱动模块一端的列驱动模块。
所述驱动电路层下表面设有BGA封装层。
一种所述堆栈式微显示驱动芯片架构的制备方法，包括以下步骤：
步骤1、分别制作像素电路层和驱动电路层；
步骤2、将像素电路层和驱动电路层粘接到一起；
步骤3、将粘到一起的像素电路层和驱动电路层采用堆栈式驱动IC封装。
所述步骤1中，像素电路层制作时，先在wafe(晶圆)上制作像素电路，再利用硅通孔技术在像素电路周边制作TSV电路，同时TSV电路的下表面形成用于与驱动电路层凸点电连接的接触点。
所述步骤1中，驱动电路层制作时，先在wafe上制作驱动模块，之后再wafe上表面的边缘制备凸点。
所述步骤1中，所述像素电路层制作时选用0.18-0.5um的制程工艺，所述驱动电路层制作时选用小于0.18um的制程工艺。
所述步骤2中，像素电路层和驱动电路层粘接die to wafer bonding(芯片到晶圆)工艺，或wafer to wafer bonding(晶圆到晶圆)工艺。
本发明通过使用堆栈式架构，把像素电路和外围驱动电路分别制备，再使用waferto wafer或die to wafer的3D封装技术把2种电路bonding到一起，制备像素电路和外围驱动电路3D堆叠的驱动IC。达到减小die像素面积，提升良率，降低成本的目的；同时解决传统驱动IC兼容性差的问题，能满足像素电路的大驱动电流和驱动电路的高速度需求；降低功耗和发热。
附图说明
下面对本发明说明书中每幅附图表达的内容作简要说明：
图1为传统显示驱动IC版图；
图2为堆栈式驱动IC像素电路层示意图；
图3为堆栈式驱动IC驱动电路层示意图；
图4为堆栈式驱动IC截面图；
图5为堆栈式驱动IC制作流程图。
具体实施方式
下面对照附图，通过对实施例的描述，本发明的具体实施方式如所涉及的各构件的形状、构造、各部分之间的相互位置及连接关系、各部分的作用及工作原理、制造工艺及操作使用方法等，作进一步详细的说明，以帮助本领域技术人员对本发明的发明构思、技术方案有更完整、准确和深入的理解。
如图2-4所示，堆栈式微显示驱动芯片架构由两个独立的相互独立的上层的像素电路层和下层的驱动电路层构成，像素电路层和驱动电路层为两个片状结构，两者之间通过胶水粘粘结构在一起，像素电路层和驱动电路层的相向面的边缘设有相配合凸出的接触点，从而实现像素电路层和驱动电路层的电连接，驱动电路层下表面设有BGA封装层。
像素电路层的边缘为TSV电路，中间为像素电路，驱动电路层上表面的周边设有凸出来用于与TSV电路电连接的触点，驱动电路层包括两侧的两组行驱动模块，位于两组行驱动模块之间的电源管理模块、ADC/DAC模块、温度传感器模块、控制IO模块、Logic模块、SRAM模块，以及位于两组行驱动模块一端的列驱动模块。
堆栈式微显示驱动芯片架构的制备方法如图5所示，包括以下步骤：
步骤1、分别制作像素电路层和驱动电路层；
制备像素电路层wafer可选0.18-0.5um制程，，包括像素电路和用来形成硅通孔(TSV)的少量外围电路，像素电路制备完成后r利用硅通孔技术(TSV)，制备bonding接触点；
制备驱动电路层wafer可选<0.18um的任何制程，包括行驱动电路，列驱动电路，存储电路(SRAM)，逻辑运算电路(logic)，模数/数模转换模块(ADC/DAC)，控制IO电路，电源管理模块等，驱动模块制备完成后制作边缘凸出的bonding接触点。
步骤2、将像素电路层和驱动电路层粘接到一起，即像素电路和驱动电路bonding；
可选die to wafer bonding和wafer to wafer bonding技术。die to waferbonding技术需要先切割驱动电路wafer，优点是能够先筛选驱动电路，产品良率更高，缺点是工艺稍复杂；wafer to wafer bonding技术不需要切割，直接bonding，优点是工艺简单，缺点是无法预先筛选，产品良率较低。
步骤3、将粘到一起的像素电路层和驱动电路层采用堆栈式驱动IC封装。堆栈式驱动IC封装，用来形成封装接口，待显示相关工艺完成后进行最终封测，可选球栅阵列封装(BGA)，引线键合(wire bonding)等。
上述堆栈式架构，先独立的制作像素电路层和驱动电路层，并使用3D封装，再将像素电路层和驱动电路层堆叠粘接到一起，制备堆栈式微显示驱动IC。这样的堆栈式驱动IC面积更小，芯片面积可以减小20-40％，相同制程能力下，良率更高，成本会降低，同时像素电路和驱动电路分别制备，可以分别使用不同的工艺，同时满足像素电路的大驱动电流和驱动电路的高速度需求，例如像素电路使用0.5um，外围驱动电路使用45nm，兼容性更好，此外，如果使用die to wafer bonding技术，可以先筛选出正常的驱动电路IC，再bonding到像素电路wafer上，避免了驱动电路IC异常导致良率损失，最后驱动电路和像素电路距离更近，串联电阻更小，功耗和发热更低。
上面结合附图对本发明进行了示例性描述，显然本发明具体实现并不受上述方式的限制，只要采用了本发明的方法构思和技术方案进行的各种非实质性的改进，或未经改进将本发明的构思和技术方案直接应用于其它场合的，均在本发明的保护范围之内。

Claims (9)

1.一种堆栈式微显示驱动芯片架构，其特征在于：包括相互独立的上层的像素电路层和下层的驱动电路层，所述像素电路层的边缘为TSV电路，中间为像素电路，所述驱动电路层上表面的周边设有凸出来用于与TSV电路电连接的触点。
2.根据权利要求1所述的堆栈式微显示驱动芯片架构，其特征在于：所述像素电路层和驱动电路层之间设有用于粘粘的胶黏层。
3.根据权利要求1或2所述的堆栈式微显示驱动芯片架构，其特征在于：所述驱动电路层包括两侧的两组行驱动模块，位于两组行驱动模块之间的电源管理模块、ADC/DAC模块、温度传感器模块、控制IO模块、Logic模块、SRAM模块，以及位于两组行驱动模块一端的列驱动模块。
4.根据权利要求3所述的堆栈式微显示驱动芯片架构，其特征在于：所述驱动电路层下表面设有BGA封装层。
5.一种如权利要求1-4所述堆栈式微显示驱动芯片架构的制备方法，其特征在于，包括以下步骤：
步骤1、分别制作像素电路层和驱动电路层；
步骤2、将像素电路层和驱动电路层粘接到一起；
步骤3、将粘到一起的像素电路层和驱动电路层采用堆栈式驱动IC封装。
6.根据权利要求5所述的制备方法，其特征在于：所述步骤1中，像素电路层制作时，先在wafe上制作像素电路，再利用硅通孔技术在像素电路周边制作TSV电路，同时TSV电路的下表面形成用于与驱动电路层凸点电连接的接触点。
7.根据权利要求6所述的制备方法，其特征在于：所述步骤1中，驱动电路层制作时，先在wafe上制作驱动模块，之后再wafe上表面的边缘制备凸点。
8.根据权利要求7所述的制备方法，其特征在于：所述步骤1中，所述像素电路层制作时选用0.18-0.5um的制程工艺，所述驱动电路层制作时选用小于0.18um的制程工艺。
9.根据权利要求5、6、7或8所述的制备方法，其特征在于：所述步骤2中，像素电路层和驱动电路层粘接die to wafer bonding工艺，或wafer to wafer bonding工艺。
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CN115241171A (zh) * 2022-07-27 2022-10-25 北京数字光芯集成电路设计有限公司 具有双层封装结构的Micro-LED微显示芯片
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Publication number Priority date Publication date Assignee Title
CN115206952A (zh) * 2022-07-27 2022-10-18 北京数字光芯集成电路设计有限公司 采用堆叠式封装的Micro-LED微显示芯片
CN115241171A (zh) * 2022-07-27 2022-10-25 北京数字光芯集成电路设计有限公司 具有双层封装结构的Micro-LED微显示芯片
CN115512651A (zh) * 2022-11-22 2022-12-23 苏州珂晶达电子有限公司 一种微显示无源阵列的显示驱动系统及方法

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