CN113206002B - Method for preparing high-uniformity ultrathin oxide layer - Google Patents

Method for preparing high-uniformity ultrathin oxide layer Download PDF

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CN113206002B
CN113206002B CN202110271934.9A CN202110271934A CN113206002B CN 113206002 B CN113206002 B CN 113206002B CN 202110271934 A CN202110271934 A CN 202110271934A CN 113206002 B CN113206002 B CN 113206002B
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欧文凯
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Pule New Energy Technology Taixing Co ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
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    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
    • HELECTRICITY
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    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
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    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02167Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon carbide not containing oxygen, e.g. SiC, SiC:H or silicon carbonitrides
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    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
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Abstract

The invention discloses a method for preparing an ultrathin oxide layer with high uniformity, which comprises loading silicon wafers in a boat, heating the boat, controlling the pressure in a furnace tube to be 300-760 torr, heating, introducing oxygen after the temperature is stabilized at 400-450 ℃, and carrying out primary SiO 2 Growing, then opening a vacuum pump to vacuumize the furnace tube to below 1000mtorr, heating to 500-600 ℃ to stabilize, then introducing oxygen again, and performing second SiO 2 Growing, then cooling, and discharging from the boat to complete the oxidation process. The preparation method of the invention can overcome the defects of SiO in the prior art 2 Overgrowth and non-uniformity problems. In the invention, siO is carried out for a plurality of times according to the growth rule of the oxide layer 2 Grow and grow under different low-temperature environments respectively, thereby remarkably improving SiO 2 Uniformity of thickness.

Description

Method for preparing high-uniformity ultrathin oxide layer
Technical Field
The invention relates to the technical field of solar cells, in particular to a method for preparing an ultrathin oxide layer with high uniformity.
Background
High efficiency and low cost are two of the most important directions for solar cell research. For crystalline silicon solar cells, with the improvement of crystalline silicon manufacturing technology, the lifetime of bulk carriers of a base silicon wafer is continuously improved, and the lifetime is no longer a key factor for restricting the improvement of the efficiency of the cells. And the passivation of the cell surface has an increasingly pronounced effect on the conversion efficiency. In the production process of the solar cell, the cost of the substrate silicon wafer accounts for the highest proportion of the whole production cost, so that the photovoltaic price is realized as soon as possible to realize 'flat-price surfing', the market competitiveness is improved, the thinning of the silicon wafer is a necessary trend, and the problem that the surface of the cell is seriously compounded is generated. This presents a challenge for solar cell surface passivation technology, which is indispensable for research in crystalline silicon solar cell surface passivation technology in order to maintain high conversion efficiency of the cell during the silicon wafer thinning process. Therefore, it is essential to research on the surface passivation technology of the crystalline silicon solar cell whether to improve the conversion efficiency of the solar cell or to reduce the production cost of the solar cell.
The tunneling oxide passivation contact technology (tunnel oxide passivation contact) is published by fraunhofer institute, germany, and the structure of the tunneling oxide passivation contact technology is composed of an ultrathin oxide layer and a heavily doped polysilicon layer, so that selective passing of carriers can be realized, multiple carriers can penetrate through the two passivation layers, few carriers can be blocked, passivation contact of the whole battery can be realized, and the conversion efficiency of the battery is improved. TOPCon structure-based cell, fraunhofer at 4cm 2 A conversion efficiency of 25.7% was obtained on FZ silicon wafers. Based on mass production of HBC battery, the efficiency reaches more than 25%, and the open-circuit voltage reaches more than 720 mV.
However, in practical manufacturing production, it is difficult to manufacture an ultrathin oxide layer with high uniformity and high quality, and a tunneling oxide layer with poor uniformity can greatly reduce the tunneling effect of the solar cell, so that it is very necessary to manufacture an ultrathin oxide layer with high uniformity.
Disclosure of Invention
In view of the foregoing, the present invention provides a method for preparing an ultra-thin oxide layer with high uniformity in order to overcome the drawbacks of the prior art.
In order to achieve the above object, the present invention provides the following technical solutions:
a method for preparing an ultra-thin oxide layer of high uniformity comprising the steps of:
(1) Loading the silicon wafer with the polished surface into a boat, pushing the boat into an oxidation device with the internal temperature of 400-450 ℃, vacuumizing, and controlling the pressure to be 300-760 torr;
(2) Stabilizing the temperature at 400-450 ℃, and introducing O 2 First SiO is carried out 2 Growing;
(3) After the step (2) is completed, vacuumizing to enable the pressure in the oxidation device to be less than 1000mtorr;
(4) After temperature control is stable, O is introduced 2 Performing a second SiO 2 Growing, wherein the temperature control range is 500-600 ℃;
(5) After the oxidation is completed, a vacuum pump is started to enable the atmosphere of the oxidation device to be in a low-pressure state below 100mtorr;
(6) Cooling, breaking vacuum, and taking out the boat from the oxidation device;
(7) The wafers were removed from the boat.
Further, in the step (1), the control pressure is 500-760torr.
Further, in the step (2), the pressure is controlled to be 300-760 torr, and O is introduced 2 The flow range is 5-30slm, and the time is 5-30 minutes.
Further, in the step (2), the pressure is controlled to be 450-650 torr, and O is introduced 2 The flow range is 10-20slm, and the time is 10-20 minutes.
Further, in the step (3), the pressure in the oxidation device is made to be less than 100mtorr.
Further, in the step (4), O is introduced 2 The flow range is 5-30slm, and the holding time is 2-30 minutes.
Further, in the step (4), the temperature control range is 500-550 ℃.
Further, in the step (4), O is introduced 2 The flow range is 10-20slm, and the holding time is 3-10 minutes.
Further, in the step (6), the temperature is reduced to 400-570 ℃, and the boat is taken out from the oxidation device after vacuum breaking.
Further, in the step (6), the temperature is reduced to 450-500 ℃, and the boat is taken out of the oxidation device after vacuum breaking.
Further, the number of the single-tube boat slides ranges from 800 to 2800.
The beneficial effects of the invention are as follows:
(1) The invention loads silicon wafer in the boat, after the boat is heated, the pressure in the furnace tube is controlled between 300 and 760torr, the temperature is raised, oxygen is introduced after the temperature is stabilized between 400 and 450 ℃ for one SiO 2 Growing, then opening a vacuum pump to vacuumize the furnace tube to below 1000mtorr, heating to 500-600 ℃ to stabilize, then introducing oxygen again, and performing second SiO 2 Growing, then cooling, and discharging from the boat to complete the oxidation process. The preparation method of the invention can overcome the defects of SiO in the prior art 2 Overgrowth and unevenProblems. In the invention, siO is carried out for a plurality of times according to the growth rule of the oxide layer 2 Grow and grow under different low-temperature environments respectively, thereby remarkably improving SiO 2 Uniformity of thickness.
(2) According to the invention, a low-pressure low-temperature growth mode is used, so that impurity pollution of an ultrathin oxide tunneling layer of the solar cell is further controlled, particle pollution in a furnace tube is obviously controlled at low pressure, and growth of a high-quality tunneling passivation layer is greatly improved.
(3) The invention uses a low-pressure low-temperature oxidation method, and firstly performs the densification process of an initial natural oxide layer in a low-temperature state below 450 ℃. For the real surface of silicon onlyAnd the left and right natural oxidation layers, wherein the silicon atoms at the inner surface of the natural oxidation layer and the atoms in the body form covalent bonds, and are adjacent to oxygen or silicon atoms in the natural oxidation layer. When oxygen atoms have a certain kinetic energy to strike the outer surface of the natural oxide layer, the oxygen atoms are captured by free silicon in the natural oxide layer, and the physical process is a densification process of the natural oxide layer. The densification process has lower temperature, the kinetic energy of oxygen atoms is insufficient to be continuously combined with the surface of the bottom Si, and the natural oxide layer on the surface of the silicon wafer can be ensured to complete the densification growth under sufficient time. And forming a key precondition of an excellent passivation tunneling layer when forming a uniform and compact natural oxide layer. Oxidation temperature>At 500 ℃, oxygen ions and holes penetrate through the compact layer to reach the silicon interface to grow an oxidation medium layer. Along with the continuous thickening of the oxide layer, the penetration probability of oxygen atoms is exponentially reduced, and when oxygen atoms are diffused inwards and are in dynamic balance with oxygen atoms diffused outwards from the oxide layer, the growth of the oxide layer is saturated. Therefore, the second oxidation is controlled at 500-600 ℃, thus the thickness of the required oxide layer can be accurately and effectively controlled, the oxide layer in the saturation state is reached at the required temperature, the oxide layer in the saturation state grows to have better growth consistency, the O atom kinetic energy reaches the equilibrium state at the temperature, and the SiO at the temperature is ensured 2 Growth uniformity. The uniform oxide layer is a good TOPCON solar cell tunneling oxide passivation layer, and the good passivation layer canGreatly improves the minority carrier lifetime of the battery, and improves the open-circuit voltage and the filling factor of the battery.
(4) The invention provides a method for preparing an ultrathin oxide layer with high uniformity, which is particularly suitable for being used as a tunneling oxidation passivation layer in an N-type solar cell and is beneficial to the rapid popularization of high-quality N-type photovoltaic cells.
Drawings
Fig. 1 is a flow chart of a conventional method for preparing an oxide layer of a solar cell.
Fig. 2 is a flow chart of a method for preparing an oxide layer of a solar cell according to the present invention.
Detailed Description
The following further details the technical solution of the present invention with reference to the accompanying drawings, it should be noted that the detailed description is only of the present invention and should not be taken as limiting the invention.
Example 1
As shown in fig. 2, the present invention provides a method for preparing an ultra-thin oxide layer with high uniformity, comprising the steps of:
(1) Loading the silicon wafer with the polished surface into a quartz boat, pushing the quartz boat into a quartz tube of an oxidation furnace with the internal temperature of 410 ℃, and then opening a vacuum pump to vacuum so that the vacuum atmosphere of the furnace tube is in a low-pressure state of 600 torr;
(2) Stabilizing the temperature to 440 ℃, and introducing 20slm (L/min) O 2 Maintaining the gas for 15min, and performing the first SiO 2 Growing;
(3) After the step (2) is completed, a vacuum pump is started to enable the furnace tube atmosphere to be in a low-pressure state of 100mtorr;
(4) Heating to 550deg.C, stabilizing, introducing 15slm (L/min) O 2 Maintaining the gas for 5min, and performing second SiO treatment 2 Growing;
(5) After the oxidation is completed, a vacuum pump is started to enable the furnace tube atmosphere to be in a low-pressure state of 100mtorr;
(6) Cooling and taking out of the boat: the temperature is reduced to 450 ℃, and the quartz boat is taken out from the quartz tube of the oxidation furnace after vacuum breaking;
(7) Unloading: and removing the silicon wafer from the quartz boat.
In this embodiment, the number of silicon-on-wafer carriers in a single boat is 1800.
Example 2
As shown in fig. 2, the present invention provides a method for preparing an ultra-thin oxide layer with high uniformity, comprising the steps of:
(1) Loading the silicon wafer with the polished surface into a quartz boat, pushing the quartz boat into a quartz tube of an oxidation furnace with the internal temperature of 400 ℃, and then starting a vacuum pump to enable the vacuum atmosphere of the furnace tube to be in a low-pressure state of 500 torr;
(2) Stabilizing the temperature to 430 ℃, and introducing 10slm (L/min) O 2 Maintaining the gas for 20min, and performing the first SiO 2 Growing;
(3) After the step (2) is completed, a vacuum pump is started to enable the furnace tube atmosphere to be in a low-pressure state of 50 mtorr;
(4) Heating to 510 ℃, and introducing 10slm of O after stabilizing 2 Maintaining the gas for 5min, and performing second SiO treatment 2 Growing;
(5) After the oxidation is completed, a vacuum pump is started to enable the furnace tube atmosphere to be in a low-pressure state of 30 mtorr;
(6) Cooling and taking out of the boat: the temperature is reduced to 500 ℃, and the quartz boat is taken out from the quartz tube of the oxidation furnace after vacuum breaking;
(7) Unloading: and removing the silicon wafer from the quartz boat.
In this embodiment, the number of silicon-on-wafer carriers in a single boat is 2000.
Example 3
As shown in fig. 2, the present invention provides a method for preparing an ultra-thin oxide layer with high uniformity, comprising the steps of:
(1) Loading the silicon wafer with the polished surface into a quartz boat, pushing the quartz boat into a quartz tube of an oxidation furnace with the internal temperature of 400 ℃, and then starting a vacuum pump to enable the vacuum atmosphere of the furnace tube to be in a low-pressure state of 500 torr;
(2) Stabilizing the temperature to 450 ℃, and introducing 20slm (L/min) O 2 Maintaining the gas for 10min, and performing the first SiO 2 Growing;
(3) After the step (2) is completed, a vacuum pump is started to enable the furnace tube atmosphere to be in a low-pressure state of 50 mtorr;
(4) Heating to 550 ℃, and introducing 10slm of O after stabilizing 2 Maintaining the gas for 10min, and performing second SiO treatment 2 Growing;
(5) After the oxidation is completed, a vacuum pump is started to enable the furnace tube atmosphere to be in a low-pressure state of 40 mtorr;
(6) Cooling and taking out of the boat: the temperature is reduced to 400 ℃, and the quartz boat is taken out from the quartz tube of the oxidation furnace after vacuum breaking;
(7) Unloading: and removing the silicon wafer from the quartz boat.
In this embodiment, the number of silicon-on-wafer carriers in a single boat is 1000.
Example 4
A method for preparing an ultra-thin oxide layer of high uniformity comprising the steps of:
(1) Loading the silicon wafer with the polished surface into a quartz boat, pushing the quartz boat into a quartz tube of an oxidation furnace with the internal temperature of 420 ℃, and then starting a vacuum pump to enable the vacuum atmosphere of the furnace tube to be in a low-pressure state of 500 torr;
(2) Stabilizing the temperature to 440 ℃, and introducing 25slm (L/min) O 2 Maintaining the gas for 10min, and performing the first SiO 2 Growing;
(3) After the step (2) is completed, a vacuum pump is opened to vacuumize, so that the furnace tube atmosphere is in a low-pressure state of 80 mtorr;
(4) Heating to 530 ℃, and introducing 25slm of O after stabilizing 2 Maintaining the gas for 3min, and performing second SiO treatment 2 Growing;
(5) After the oxidation is completed, a vacuum pump is started to enable the atmosphere of the furnace tube to be in a low-pressure state of 50 mtorr;
(6) Cooling and taking out of the boat: the temperature is reduced to 400 ℃, and the quartz boat is taken out from the quartz tube of the oxidation furnace after vacuum breaking;
(7) Unloading: and removing the silicon wafer from the quartz boat.
In this embodiment, the number of silicon-on-wafer carriers in a single boat is 1500.
Example 5
In order to confirm the effect of the high-uniformity ultrathin oxide layer, the TOPCon battery high-efficiency tunneling oxide layer doped amorphous silicon passivation monitoring sample is prepared by the method, and the practical effect of the method is represented by testing the minority carrier lifetime of the sample.
The TOPCO battery is characterized in that the contact passivation formed by the ultrathin silicon oxide and the doped amorphous silicon layer is adopted, so that the amorphous silicon with good quality plays a very large role in the TOPCO battery; TOPCon batteries use high quality ultra-thin silicon oxide and doped polysilicon layers to achieve efficient passivation and carrier selective collection of the full back surface. The full area passivation surface allows for no silicon/metal contact interface, which is beneficial for increasing the open circuit voltage (Open CircuitVoltage, voc), while the full area collection of carriers can reduce lifetime sensitivity, which is beneficial for increasing the Fill Factor (FF). In addition, the cell has 1) no need for laser tapping; 2) Adopting an N-type silicon wafer without light-induced attenuation; 3) Is compatible with medium-high temperature sintering; 4) The technology has the advantages of strong expansibility and the like.
The preparation method of the high-efficiency tunneling oxide layer doped amorphous silicon passivation monitoring sample comprises the following steps of:
a. the single crystal silicon wafer prepared by solar energy level N-type Czochralski method with the sample substrate thickness of 190 μm and the resistivity of 3-7Ω & cm is used;
b. putting the silicon wafer into a polishing and cleaning machine, and utilizing HNO 3 Polishing the surface of the silicon wafer by the HF mixed solution, wherein the reflectivity of the surface of the silicon wafer after the polishing is 30% -40%;
c. performing RCA cleaning on the sample; the RCA cleaning is a conventional method in the prior art, and is not improved by the invention;
d. placing the sample obtained in the step (c) into LPCVD equipment, and growing a high-uniformity tunneling oxide layer, wherein the oxide layer is prepared by using the method of the invention;
e. continuously carrying out double-sided doped amorphous silicon growth on the sample with the oxide layer growth completed, wherein the doped amorphous silicon growth mode is an LPCVD method and PH is utilized 3 &SiH 4 The doped amorphous silicon film is grown under the low pressure of 500mtorr, and the thickness of the doped amorphous silicon film is between 50 and 200 nm. The LPCVD process is a conventional process in the art and is not modified by the present invention.
f. And (3) manufacturing a high-efficiency tunneling oxide layer doped amorphous silicon passivation monitoring sample, and carrying out minority carrier lifetime test.
Wherein step d uses the method of the present invention to prepare an oxide layer, the specific procedure is shown in FIG. 2, and the specific procedure is described in example 1.
And f, carrying out characterization test on the sample, wherein the used test equipment is a WCT120 minority carrier lifetime tester.
Minority carrier lifetime is an important parameter for representing the quality of semiconductor materials and devices, and accurate measurement of minority carrier lifetime can not only judge the quality of materials, but also has a guiding effect on process adjustment. Minority carriers refer to minority carriers, as opposed to majority carriers. Minority carrier lifetime refers to the average lifetime τ of the unbalanced minority carrier, i.e., the time it takes for the concentration of the unbalanced minority carrier to decrease to 1/e of the original value.
The value of minority carrier lifetime is determined by the recombination mechanism. The recombination can be classified into radiative recombination, non-radiative recombination, and auger recombination according to the manner of energy release. Radiative recombination and auger recombination are unavoidable, and non-radiative recombination is associated with defects and impurities of the material. Recombination occurs at the surface and in the body, and passivation is primarily to minimize surface recombination.
The contact passivation formed by the ultrathin silicon oxide and the doped amorphous silicon layer is used for reducing the surface recombination of the photovoltaic cell, and the higher the minority carrier lifetime is, the smaller the recombination is and the higher the cell efficiency is.
The high-efficiency tunneling oxide doped amorphous silicon passivation monitoring sample prepared by the invention is tested, and the result is shown in Table 3. Table 3 shows that the sample prepared by the method of the invention has a minority carrier lifetime of more than 2000 mu s after being tested, which indicates that the battery structure has good passivation performance.
Comparative example 1
The conventional method for growing the oxide layer of the solar cell is shown in fig. 1, and comprises the following steps:
(1) Loading the silicon wafer with the polished surface into a quartz boat, and pushing the quartz boat into a quartz tube of an oxidation furnace with the internal temperature of 430 ℃, wherein the pressure of the furnace tube is 760torr in a normal pressure state;
(2) Heating to 630 ℃, and introducing 10L/min of O after stabilizing 2 Gas, siO 2 Growing and keeping for 10min;
(3) And (3) after the oxidation of the step (2) is finished, cooling and discharging the boat: the temperature is reduced to 460 ℃, and after vacuum breaking, the quartz boat is taken out from the furnace tube of the oxidation furnace;
(4) Unloading: the wafers were removed from the boat.
Comparative example 2
A TOPCon battery tunneling oxide doped amorphous silicon passivation monitoring sample is prepared, and the passivation effect of the battery structure under the scheme is represented by testing the minority carrier lifetime of the sample.
The preparation of the tunneling oxide doped amorphous silicon passivation monitoring sample comprises the following steps:
A. the monocrystalline silicon wafer is prepared by solar energy level N-type Czochralski method, wherein the sample substrate is 190 mu m thick and has resistivity of 3-7Ω & cm;
B. putting the silicon wafer into a polishing and cleaning machine, and utilizing HNO 3 Polishing the surface of the silicon wafer by the HF mixed solution, wherein the reflectivity of the surface of the silicon wafer after the polishing is 30% -40%;
C. performing RCA cleaning on the sample; the RCA cleaning is a conventional method in the prior art, and is not improved by the invention;
D. placing the sample obtained in the step (C) into LPCVD equipment, growing a high-uniformity tunneling oxide layer, and preparing the oxide layer by using a conventional oxidation method;
E. continuously carrying out double-sided doped amorphous silicon growth on the sample with the oxide layer growth completed, wherein the doped amorphous silicon growth mode is an LPCVD method and PH is utilized 3 &SiH 4 Growing at a low pressure of 500 mtorr;
F. and (3) completing the preparation of the high-efficiency tunneling oxide doped amorphous silicon passivation monitoring sample, and performing minority carrier lifetime test by using the WCT 120.
In this comparative example, the conventional method for growing an oxide layer of a solar cell is shown in fig. 1, and the specific procedure is as described in comparative example 1. Other conditions during the monitoring of the sample preparation were in accordance with example 5. Minority carrier lifetime under this protocol was tested and compared to the test results in example 5, with the comparison results shown in table 4.
Table 2 shows the uniformity data of the thickness of the oxide layer obtained in example 1 and comparative example 1, and Table 1 shows the thickness data and uniformity data of the silicon wafer in the different positions of the boat in example 2; table 3 shows passivation data for the tunnel oxide layer prepared in example 5.
TABLE 1
TABLE 2
TABLE 3 Table 3
Note that: life represents minority carrier Lifetime, J 0 Indicating current density, I-Voc indicating open circuit voltage, I-FF indicating fill factor, PL indicating photoluminescent intensity, the higher the intensity indicating greater passivation capability.
TABLE 4 Table 4
As is clear from tables 1 and 2, the oxide layers obtained in examples 1 to 2 were relatively uniform in thickness and SiO was obtained 2 The film is thin. The uniformity of the thickness of the oxide layer of the silicon wafer (furnace mouth, furnace middle and furnace tail) is greatly improved. This demonstrates that the preparation method of the present invention can overcome the SiO in the prior art 2 Overgrowth and non-uniformity problems. In the invention, siO is carried out for a plurality of times according to the growth rule of the oxide layer 2 Growing in different low temperature environments to obviously improveRise SiO 2 Uniformity of thickness.
The nature of low temperature oxidation to grow ultra-thin oxide layers is dense and growing. From an energy perspective, it should be dense first and then grow, but as the temperature changes, the correspondence between the dense and the grow changes. Low temperature oxidation at less than 450 ℃ and densification are main reasons for forming an ultrathin medium layer; the thickness of the ultrathin medium layer is determined by densification and growth at the temperature of 500-600 ℃; above 600 ℃, the effect of densification on oxide thickness is replaced by growth. This is because the average kinetic energy of oxygen atoms, 3/2kT, is proportional to the oxidation temperature. If the generated dielectric layer is regarded as a potential barrier, the potential barrier can be skipped only when the average kinetic energy of the oxygen atoms is larger than the height of the potential barrier, namely, the oxygen atoms penetrate through the dielectric layer to reach a silicon interface and then combine with the silicon atoms to generate an oxide layer.
The invention uses a low-pressure low-temperature oxidation method, and firstly performs the densification process of an initial natural oxide layer in a low-temperature state below 450 ℃. For the real surface of silicon onlyAnd the left and right natural oxidation layers, wherein the silicon atoms at the inner surface of the natural oxidation layer and the atoms in the body form covalent bonds, and are adjacent to oxygen or silicon atoms in the natural oxidation layer. When oxygen atoms have a certain kinetic energy to strike the outer surface of the natural oxide layer, the oxygen atoms are captured by free silicon in the natural oxide layer, and the physical process is a densification process of the natural oxide layer. The densification process has lower temperature, the kinetic energy of oxygen atoms is insufficient to be continuously combined with the surface of the bottom Si, and the natural oxide layer on the surface of the silicon wafer can be ensured to complete the densification growth under sufficient time. A uniform dense native oxide layer is a key precondition for the formation of an excellent passivation tunneling layer. Oxidation temperature>At 500 ℃, oxygen ions and holes penetrate through the compact layer to reach the silicon interface to grow an oxidation medium layer. Along with the continuous thickening of the oxide layer, the penetration probability of oxygen atoms is exponentially reduced, and when oxygen atoms are diffused inwards and are in dynamic balance with oxygen atoms diffused outwards from the oxide layer, the growth of the oxide layer enters a saturated state. Thus the second oxidation is controlled at 500-600 deg.C, so thatThe thickness of the oxide layer is accurately and effectively controlled, and the oxide layer in a saturated state is reached at the required temperature, the oxide layer in the saturated state grows with better growth consistency, the O atom kinetic energy reaches the equilibrium state at the temperature, the SiO at the temperature is ensured 2 Growth uniformity. The uniform oxide layer is a good TOPCON solar cell tunneling oxidation passivation layer, and the excellent passivation layer can greatly improve the minority carrier lifetime of the cell and the open-circuit voltage and the filling factor of the cell.
The invention further controls impurity pollution of the ultra-thin oxidation tunneling layer of the solar cell by using a low-pressure low-temperature growth mode, remarkably controls particle pollution in a furnace tube at low pressure, greatly improves the growth of a high-quality tunneling passivation layer, prolongs minority carrier lifetime, and improves open-circuit voltage and filling factor of the cell, as shown in table 3.
The results in table 4 show that the minority carrier lifetime of the samples prepared by the conventional scheme is lower than that of the samples prepared by the method provided by the invention, and further illustrate that the preparation method provided by the invention is beneficial to the growth of the efficient tunneling oxide layer, is beneficial to the formation of the efficient tunneling oxide layer doped amorphous silicon contact passivation structure, and is beneficial to the improvement of the conversion efficiency of TOPCon and other contact batteries.
In conclusion, the uniformity and repeatability of the thickness of the ultrathin oxide layer are improved by adopting a low-pressure low-temperature oxidation process, the effect of tunneling passivation layers of the N-type solar cell is greatly improved, and the large-scale popularization of the novel solar cell is facilitated.
Especially for a novel HBC battery, the growth of P+ doped amorphous silicon and different annealing processes are required to be carried out on the back surface of the battery, and under the process, a uniform and stable oxidation process is particularly critical. The thickness consistency of the oxide layer is extremely high for doping layers with different properties on the whole surface, so that penetration phenomenon caused by subsequent treatment can be prevented, and passivation performance is reduced.
It will be apparent that the described embodiments are only some, but not all, embodiments of the invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the present invention without making any inventive effort, shall fall within the scope of the present invention.

Claims (8)

1. A method for preparing an ultra-thin oxide layer of high uniformity comprising the steps of:
(1) Loading the silicon wafer with the polished surface into a boat, pushing the boat into an oxidation device with the internal temperature of 400-450 ℃, vacuumizing, and controlling the pressure to be 300-760 torr;
(2) Stabilizing the temperature at 400-450 ℃, and introducing O 2 First SiO is carried out 2 Growing;
(3) After the step (2) is completed, vacuumizing to ensure that the pressure in the oxidation device is less than or equal to 100mtorr;
(4) After temperature control is stable, O is introduced 2 Performing a second SiO 2 Growing, wherein the temperature control range is 500-600 ℃;
(5) After the oxidation is completed, a vacuum pump is started to enable the atmosphere of the oxidation device to be in a low-pressure state below 100mtorr;
(6) Cooling, breaking vacuum, and taking out the boat from the oxidation device;
(7) Removing the silicon wafer from the boat;
in the step (2), the pressure is controlled to be 300-760 torr, and O is introduced 2 The flow range is 5-30slm, and the time is 5-30 minutes.
2. The method for producing an ultra-thin oxide layer having high uniformity according to claim 1, wherein in step (1), the control pressure is 500to 760torr.
3. The method for producing an ultra-thin oxide layer with high uniformity according to claim 1, wherein in the step (2), the pressure is controlled to be 450-650 torr, and O is introduced 2 The flow range is 10-20slm, and the time is 10-20 minutes.
4. A process for preparing a highly uniform ultra-thin oxide layer according to claim 1, wherein in step (4), O is introduced 2 The flow range is 5-30slm, and the holding time is 2-30 minutes.
5. The method for producing an ultra-thin oxide layer with high uniformity according to claim 1, wherein in step (4), the temperature is controlled in the range of 500-550 ℃.
6. A process for preparing a highly uniform ultra-thin oxide layer according to claim 1, wherein in step (4), O is introduced 2 The flow range is 10-20slm, and the holding time is 3-10 minutes.
7. The method for producing an ultra-thin oxide layer with high uniformity according to claim 1, wherein in the step (6), the temperature is lowered to 400 to 570 ℃, and the boat is taken out of the oxidation apparatus after breaking the vacuum.
8. A method for producing ultra-thin oxide layers with high uniformity according to claim 7, wherein in step (6), the temperature is reduced to 450-500 ℃, and the boat is taken out of the oxidation apparatus after breaking the vacuum.
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Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5330935A (en) * 1990-10-24 1994-07-19 International Business Machines Corporation Low temperature plasma oxidation process
CN103367551A (en) * 2013-08-06 2013-10-23 中利腾晖光伏科技有限公司 Diffusion process of crystalline silicon solar cell
CN105374900A (en) * 2015-10-14 2016-03-02 横店集团东磁股份有限公司 Method for preparing monocrystalline silicon surface-passivated cell
CN106057980A (en) * 2016-08-03 2016-10-26 苏州阿特斯阳光电力科技有限公司 Phosphorus diffusion method of crystalline silicon solar cell
CN106409926A (en) * 2016-11-30 2017-02-15 庞倩桃 Multilayer passivation film of crystalline-silicon battery and manufacturing method thereof
CN107681018A (en) * 2017-09-14 2018-02-09 横店集团东磁股份有限公司 A kind of low-pressure oxidized technique of solar battery sheet
CN112186069A (en) * 2020-08-31 2021-01-05 晶澳(扬州)太阳能科技有限公司 Preparation method of uniform ultrathin tunneling oxide layer and battery

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2308100A1 (en) * 2008-07-28 2011-04-13 Day4 Energy Inc. Crystalline silicon pv cell with selective emitter produced with low temperature precision etch back and passivation process
US20130298984A1 (en) * 2012-05-11 2013-11-14 Nazir Pyarali KHERANI Passivation of silicon surfaces using intermediate ultra-thin silicon oxide layer and outer passivating dielectric layer

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5330935A (en) * 1990-10-24 1994-07-19 International Business Machines Corporation Low temperature plasma oxidation process
CN103367551A (en) * 2013-08-06 2013-10-23 中利腾晖光伏科技有限公司 Diffusion process of crystalline silicon solar cell
CN105374900A (en) * 2015-10-14 2016-03-02 横店集团东磁股份有限公司 Method for preparing monocrystalline silicon surface-passivated cell
CN106057980A (en) * 2016-08-03 2016-10-26 苏州阿特斯阳光电力科技有限公司 Phosphorus diffusion method of crystalline silicon solar cell
CN106409926A (en) * 2016-11-30 2017-02-15 庞倩桃 Multilayer passivation film of crystalline-silicon battery and manufacturing method thereof
CN107681018A (en) * 2017-09-14 2018-02-09 横店集团东磁股份有限公司 A kind of low-pressure oxidized technique of solar battery sheet
CN112186069A (en) * 2020-08-31 2021-01-05 晶澳(扬州)太阳能科技有限公司 Preparation method of uniform ultrathin tunneling oxide layer and battery

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
Growth of amorphous, anatase and rutile phase TiO2 thin films on Pt/TiO2/SiO2/Si (SSTOP) substrate for resistive random access memory (ReRAM) device application;Mabkhoot A. Alsaiari等;《Ceramics International》;第46卷(第10期);16310-16320 *

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