CN113135011B - Semiconductor chip high-temperature bearing jig and processing technology thereof - Google Patents

Semiconductor chip high-temperature bearing jig and processing technology thereof Download PDF

Info

Publication number
CN113135011B
CN113135011B CN202110388405.7A CN202110388405A CN113135011B CN 113135011 B CN113135011 B CN 113135011B CN 202110388405 A CN202110388405 A CN 202110388405A CN 113135011 B CN113135011 B CN 113135011B
Authority
CN
China
Prior art keywords
temperature
resistant
resistant substrate
jig
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202110388405.7A
Other languages
Chinese (zh)
Other versions
CN113135011A (en
Inventor
张文杰
鲁秦
顾滢
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ruisuosi Industrial Technology Suzhou Co ltd
Original Assignee
Ruisuosi Industrial Technology Suzhou Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ruisuosi Industrial Technology Suzhou Co ltd filed Critical Ruisuosi Industrial Technology Suzhou Co ltd
Priority to CN202110388405.7A priority Critical patent/CN113135011B/en
Publication of CN113135011A publication Critical patent/CN113135011A/en
Application granted granted Critical
Publication of CN113135011B publication Critical patent/CN113135011B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B37/00Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding
    • B32B37/12Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding characterised by using adhesives
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B37/00Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding
    • B32B37/0007Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding involving treatment or provisions in order to avoid deformation or air inclusion, e.g. to improve surface quality
    • B32B37/003Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding involving treatment or provisions in order to avoid deformation or air inclusion, e.g. to improve surface quality to avoid air inclusion
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B37/00Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding
    • B32B37/14Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding characterised by the properties of the layers
    • B32B37/26Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding characterised by the properties of the layers with at least one layer which influences the bonding during the lamination process, e.g. release layers or pressure equalising layers
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B38/00Ancillary operations in connection with laminating processes
    • B32B38/04Punching, slitting or perforating
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B38/00Ancillary operations in connection with laminating processes
    • B32B38/16Drying; Softening; Cleaning
    • B32B38/164Drying
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B37/00Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding
    • B32B37/14Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding characterised by the properties of the layers
    • B32B37/26Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding characterised by the properties of the layers with at least one layer which influences the bonding during the lamination process, e.g. release layers or pressure equalising layers
    • B32B2037/268Release layers
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B38/00Ancillary operations in connection with laminating processes
    • B32B38/04Punching, slitting or perforating
    • B32B2038/042Punching
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B38/00Ancillary operations in connection with laminating processes
    • B32B38/04Punching, slitting or perforating
    • B32B2038/047Perforating

Abstract

The invention discloses a processing technology of a semiconductor chip high-temperature bearing jig, which comprises the following steps: manufacturing a high-temperature-resistant adhesive layer: performing differential gluing on the two sides of the polyimide film; drilling a high-temperature-resistant substrate: taking a high-temperature-resistant substrate and drilling the high-temperature-resistant substrate; gluing with colloid: and (3) laminating the polyimide film with the high-temperature-resistant substrate to obtain a semi-finished product jig, and defoaming: according to the mode, a user can place products on the surface of the jig, the surface of the jig still keeps stable and proper viscosity after processing is finished, the products can be prevented from falling and shifting in the transportation process, a manipulator can be conveniently and easily removed after the products are processed, the jig can be repeatedly used for more than 50 times, the recycling cost is effectively reduced, and meanwhile, if dirt or adhesive surface damage is generated on the surface of the jig, the adhesive tape can be attached again after being detached.

Description

Semiconductor chip high-temperature bearing jig and processing technology thereof
Technical Field
The invention relates to the technical field of semiconductor chip jig casting, in particular to a semiconductor chip high-temperature bearing jig and a processing technology thereof.
Background
The traditional bearing jig for the semiconductor chip is characterized in that a high-temperature-resistant bonding layer is additionally arranged on the surface of a high-temperature-resistant plate in a printing or die pressing mode, the bonding layer provides certain adhesive force for fixing a bearing object on the surface of the jig, the bonding force formed in the mode is very good, but the same intelligent single-piece processing is adopted, the bonding layer needs to be arranged again when the bearing object is replaced every time, the cost is high, the capacity is low, the viscosity of the high-temperature bonding layer is uncontrollable, and the problem that the materials and the bearing jig are too strong in bonding force and cannot be taken out smoothly can often occur.
Disclosure of Invention
The invention mainly solves the problem that when a semiconductor chip is manufactured, the jig is fixed only by manufacturing the semiconductor chip by a single piece due to inconvenient adhesion of a bonding layer.
In order to solve the technical problems, the invention adopts a technical scheme that: the processing technology of the semiconductor chip high-temperature bearing jig comprises the following steps:
manufacturing a high-temperature-resistant adhesive layer: performing differential gluing on two sides of the polyimide film;
drilling a high-temperature-resistant substrate: taking a high-temperature-resistant substrate and drilling the high-temperature-resistant substrate;
gluing: attaching the polyimide film to the high-temperature-resistant substrate to obtain a semi-finished jig;
defoaming treatment: and performing defoaming treatment operation on the semi-finished product jig.
Further, the step of manufacturing the high temperature resistant adhesive layer further comprises:
attaching a release film: attaching the polyimide film subjected to differential gluing to a release film;
die cutting and punching: and die cutting and punching the polyimide film attached with the release film to punch a first exhaust structure and a first positioning structure to obtain the high-temperature-resistant adhesive layer.
Further, the step of drilling the high temperature resistant substrate further comprises:
and punching a second exhaust structure and a second positioning structure which are matched with the first exhaust structure and the first positioning structure on the high-temperature-resistant substrate.
Further, the step of differential gluing further comprises:
coating one surface of the polyimide film with a high-viscosity layer and coating the other surface of the polyimide film with a low-viscosity layer;
the thickness of the high-adhesion layer is larger than that of the polyimide film and that of the low-adhesion layer;
the high-viscosity layer has a viscosity greater than that of the low-viscosity layer.
Further, the step of defoaming further includes:
putting the semi-finished product jig into a vacuum defoaming box;
setting the pressure of the vacuum defoaming box to be 5-8Mpa;
setting the temperature of the vacuum defoaming box to be 40-60 ℃;
and defoaming the semi-finished product jig for 10-20 minutes.
Further, the step of glue lamination further comprises:
the high-temperature-resistant adhesive layer is attached to the high-temperature-resistant substrate according to the first positioning structure and the second positioning structure;
tearing off the release film of the high-viscosity layer, attaching the high-temperature-resistant substrate, and reserving the release film of the low-viscosity layer.
Further, the step of differential gluing further comprises:
performing differential gluing in a roll-to-roll rolling manner;
after the glue coating is finished, curing the high-temperature-resistant glue layer for 30-50 minutes at 180 ℃;
and after the curing is finished, attaching the release film.
Further, the first exhaust structure and the second exhaust structure are arranged in an array.
The invention provides a semiconductor chip high-temperature bearing jig, which comprises: the high-temperature-resistant substrate (10), the high-temperature-resistant adhesive layer, the second positioning structure (41) and the second exhaust structure (42);
the high-temperature-resistant adhesive layer comprises a polyimide film (22), and a high-viscosity layer (21) and a low-viscosity layer (23) which are arranged on two sides of the polyimide film (22);
the high-temperature-resistant adhesive layer is provided with a first positioning structure (31) and a first exhaust structure (32);
the high-temperature-resistant substrate (10) is provided with a second positioning structure (41) and a second exhaust structure (42);
the high-temperature-resistant substrate (10) is connected with the polyimide film (22) through the high-adhesion layer (21).
Further, the area of the first exhaust structure (32) is not less than 10% of the area of the high-temperature-resistant glue layer;
the area of the second exhaust structure (42) is not less than 10% of the area of the high-temperature-resistant substrate (10);
the high-temperature resistant substrate (10) is made of FR4 and has a thickness of 0.5-2mm.
The invention has the beneficial effects that:
1. the processing technology of the semiconductor chip high-temperature bearing jig can solve the problems that the jig does not warp, deform, bubble and the like even if the manufactured product is in a reflow soldering high temperature of 180-200 ℃.
2. The semiconductor chip high-temperature bearing jig can realize that a user places products on the surface of the jig, the surface of the jig still keeps stable and proper viscosity after processing, the products can be prevented from falling and shifting in the transportation process, a manipulator can be conveniently and easily removed after the products are processed, the jig can be repeatedly used for more than 50 times, the recycling cost is effectively reduced, and meanwhile, if dirt or adhesive surface damage occurs on the surface of the jig, an adhesive tape can be detached and attached again for use.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and other drawings can be obtained by those skilled in the art without creative efforts.
Fig. 1 is a schematic view of a processing process of a semiconductor chip high-temperature carrying fixture according to embodiment 1 of the invention;
fig. 2 is a side view of a semiconductor chip high temperature carrying fixture according to embodiment 2 of the present invention;
fig. 3 is a front view of a semiconductor chip high temperature carrying fixture according to embodiment 2 of the invention.
Wherein; 10. a high temperature resistant substrate; 21. a high adhesion layer; 22. a polyimide film; 23. a low-adhesion layer; 31. a first positioning structure; 32. a first exhaust structure; 41. a second positioning structure, 42 a second venting structure.
Detailed Description
The technical solutions of the present invention will be described clearly and completely with reference to the accompanying drawings, and it should be understood that the described embodiments are some, but not all embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It should be noted that in the description of the present embodiment, it should be understood that the terms "upper", "lower", "top", "bottom", "inner", "outer", and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, and are only for convenience of description and simplification of description, but do not indicate or imply that the device or element referred to must have a specific orientation, be configured and operated in a specific orientation, and thus, should not be construed as limiting the present invention.
Example 1
The invention relates to a processing technology of a semiconductor chip high-temperature bearing jig, which refers to fig. 1 and comprises the following steps:
s100, manufacturing a high-temperature-resistant adhesive layer;
carry out two-sided rubber coating with the polyimide film, this polyimide film thickness is 15um-50-um, with attached type membrane after the polyimide film rubber coating is accomplished, make high temperature resistant glue film, further include:
in order to ensure that the viscosities of the colloids on the two sides of the polyimide film are different, so that different glue hanging is performed, one side of the polyimide film is a high-viscosity layer, and the other side of the polyimide film is a low-viscosity layer, in this embodiment, the polyimide film is vertically placed, two pressure rollers roll on a vertical line of the polyimide film, each pressure roller is provided with a glue barrel, for convenience of description, the two glue barrels are named as a first glue barrel and a second glue barrel, the first glue barrel is used for gluing the polyimide film, for convenience of description, the glued surface of the first glue barrel is named as a high-viscosity layer, and the glued surface of the second glue barrel is named as a low-viscosity layer.
When the pressure roller is glued, the polyimide film which is fully coated with glue enters the drying box, the temperature of the drying box is 180 ℃, the drying box dries the glue, the drying time is 30-50 minutes, the glue is prevented from leaking in the mode, the assembly line is lost, meanwhile, after the glue is solidified and cooled, the polyimide film which is fully coated with the glue is attached to the release film, the attached polyimide film which is from the release film is conveyed out, and the high-temperature-resistant glue layer can be prepared in the mode.
S200, die cutting and punching;
die cutting and punching the high-temperature-resistant adhesive layer to form a first exhaust structure and a first positioning structure, and further comprising the following steps of:
in order to further ensure the heat resistance of the high temperature resistant adhesive layer, the embodiment provides a solution, the high temperature resistant adhesive layer is conveyed to a die cutting machine for die cutting and punching, the high temperature resistant adhesive layer is provided with first exhaust structures arranged in an array manner, the first exhaust structures are polygonal structures and penetrate through the whole high temperature resistant adhesive layer, the first exhaust structures are designed into exhaust holes, the hole diameter of each exhaust hole is smaller than the diameter of a semiconductor chip, the semiconductor chip is prevented from being transferred into the exhaust hole, the high temperature resistant adhesive layer needs to be arranged on a high temperature resistant substrate, so that the first exhaust structures on the high temperature resistant adhesive layer need to be matched with the second exhaust structures of the high temperature resistant substrate, and in order to ensure that the high temperature resistant adhesive layer is accurately matched with the high temperature resistant substrate, the surface of the high temperature resistant adhesive layer is further provided with a first positioning structure.
S300, drilling a high-temperature-resistant substrate;
the surface of the high-temperature-resistant substrate is drilled, the second exhaust structure which is matched with the high-temperature-resistant adhesive layer in an array mode is arranged, and in order to optimize the embodiment, the drilling mode is selected to be laser drilling or CNC drilling mode to be provided with the second positioning structure.
The positioning hole of the second positioning structure of the high-temperature-resistant substrate and the positioning hole of the first positioning structure of the high-temperature-resistant colloid are accurately aligned and attached, so that the exhaust structure can be accurately attached in a sleeved mode, and the exhaust structure cannot be deviated to block the exhaust structure.
S400, gluing;
the high-temperature-resistant adhesive layer is attached to the high-temperature-resistant substrate through the first positioning structure and the second positioning structure, the process is attached to the high-temperature-resistant substrate strictly according to the positioning structure, the process is the key for ensuring the high-temperature-resistant substrate and the high-temperature-resistant adhesive layer to be overlapped, when the high-temperature-resistant adhesive layer is attached to the high-temperature-resistant substrate, the high-temperature-resistant adhesive layer is torn off from the release film and attached to the high-temperature-resistant substrate, the low-viscosity layer is torn off when a user uses the high-temperature-resistant adhesive layer, dust is prevented from being contaminated, after the high-temperature-resistant adhesive layer is attached to the high-temperature-resistant substrate, an exhaust structure penetrating through the whole jig is formed, and a semi-finished jig is obtained.
S500, defoaming treatment;
in the embodiment, the defoaming pressure of the defoaming process adopted is 5-8Mpa, and the defoaming is performed for 10-20 minutes, so that the fluidity of the colloid is enhanced, and the bubbles are easy to discharge, the temperature of the device during the defoaming treatment can be increased to 40-60 ℃, the bubbles in the colloid of the semi-finished jig can be reduced to the minimum value close to 0 by the method, the bubbles can be removed by the defoaming, which is invisible to naked eyes and cannot be removed in the colloid attaching step, the colloid can be attached more tightly, and the bubbles can be prevented from being removed when the semi-finished jig is used at high temperature, so that the use is influenced, in the embodiment, the semi-finished jig adopting the steps S100-S400 is placed in a vacuum box for defoaming treatment, and similarly, the semi-finished jig can be placed in a centrifugal defoaming machine for defoaming treatment, so that the complete bubble-free high-temperature-resistant defoaming can be obtained.
Through the steps, when the semiconductor chip is attached to the low-adhesion layer, the jig is not warped, deformed and bubbled when the jig is subjected to reflow soldering at 180-200 ℃ immediately right above the exhaust structure, the jig is free of displacement and falling through stable viscosity of the low-adhesion layer, the jig can be reused for more than 50 times, the recycling cost is reduced, and meanwhile, if the surface of the jig is dirty or the adhesive layer is damaged, the adhesive layer can be attached again after being detached for use.
Example 2
The embodiment of the present invention provides a semiconductor chip high temperature carrying fixture, please refer to fig. 2 and fig. 3, which includes: the high-temperature-resistant substrate comprises a high-temperature-resistant substrate 10, a high-temperature-resistant adhesive layer, a first positioning structure 31, a first exhaust structure 32, a second positioning structure 41 and a second exhaust structure 42;
the high-temperature-resistant adhesive layer comprises a polyimide film 22, a high-viscosity layer 21 and a low-viscosity layer 23;
the thickness of the high-adhesion layer 21 and the low-adhesion layer 23 is 5-20um, the viscosity of the high-adhesion layer 21 is in the range of 500-1500gf/25mm, and the viscosity of the low-adhesion layer 23 is in the range of 2-30gf/25mm.
The high temperature resistant substrate 10 is made of FR4 and has a thickness of 0.5-2mm.
The polyimide film 22 has a thickness of 12um to 50um.
The high temperature resistant glue film is equipped with first location structure 31 and first exhaust structure 32, and first exhaust structure 32 is array exhaust hole and constitutes, and location when first location structure 31 is used for laminating with high temperature resistant base plate 10 for it is more accurate to laminate with high temperature resistant base plate 10.
The high temperature resistant substrate 10 is also provided with a second positioning structure 41 and a second exhaust structure 42, and the array distribution of the second exhaust structure 42 of the high temperature resistant substrate 10 can be matched with the first exhaust structure 32 of the high temperature resistant glue.
The second exhaust structure 42 of the refractory substrate 10 and the first exhaust structure 32 of the refractory adhesive layer are not less than 10% of their own area.
The high-temperature resistant substrate 10 is bonded to the high-adhesion layer 21, and the polyimide film 22 is connected to the high-adhesion layer 21 and the low-adhesion layer 23, respectively.
When the high temperature resistant adhesive layer is required to be attached to the high temperature resistant substrate 10, the first exhaust structure 32 of the high temperature resistant adhesive layer and the second exhaust structure 42 of the high temperature resistant substrate 10 form an exhaust structure penetrating through the whole jig.
The heat-resistant jig can still be stable, and has no deformation, no blister and no edge warping even under the condition of reflow soldering at 180-200 ℃.
The numbers of the embodiments disclosed in the embodiments of the present invention are merely for description, and do not represent the merits of the embodiments.
It will be understood by those skilled in the art that all or part of the steps of implementing the above embodiments may be implemented by hardware, and a program that can be implemented by the hardware and can be instructed by the program to be executed by the relevant hardware may be stored in a computer readable storage medium, where the storage medium may be a read-only memory, a magnetic or optical disk, and the like.
The above description is only an embodiment of the present invention, and not intended to limit the scope of the present invention, and all modifications of equivalent structures and equivalent processes performed by the present specification and drawings, or directly or indirectly applied to other related technical fields, are included in the scope of the present invention.

Claims (7)

1. A processing technology of a semiconductor chip high-temperature bearing jig is characterized by comprising the following steps:
manufacturing a high-temperature-resistant adhesive layer: performing differential gluing on the two sides of the polyimide film;
drilling a high-temperature resistant substrate: taking a high-temperature-resistant substrate and drilling the high-temperature-resistant substrate;
gluing with colloid: attaching the polyimide film to the high-temperature-resistant substrate to obtain a semi-finished jig;
defoaming treatment: performing defoaming treatment operation on the semi-finished jig;
the step of manufacturing the high temperature resistant adhesive layer further comprises the following steps:
attaching a release film: attaching the polyimide film subjected to differential gluing to a release film;
die cutting and punching: performing die cutting and punching on the polyimide film attached with the release film to punch a first exhaust structure and a first positioning structure to obtain a high-temperature-resistant adhesive layer;
the step of drilling the high temperature resistant substrate further comprises:
punching a second exhaust structure and a second positioning structure which are matched with the first exhaust structure and the first positioning structure on the high-temperature resistant substrate;
the step of differential sizing further comprises:
coating one surface of the polyimide film with a high-viscosity layer and coating the other surface of the polyimide film with a low-viscosity layer;
the thickness of the high-adhesion layer is larger than that of the polyimide film and that of the low-adhesion layer;
the high-viscosity layer has a viscosity greater than that of the low-viscosity layer.
2. The processing technology of the semiconductor chip high temperature bearing jig according to claim 1, wherein: the step of defoaming further comprises:
putting the semi-finished product jig into a vacuum defoaming box;
setting the pressure of the vacuum defoaming box to be 5-8Mpa;
setting the temperature of the vacuum defoaming box to be 40-60 ℃;
and defoaming the semi-finished product jig for 10-20 minutes.
3. The processing technology of the semiconductor chip high temperature bearing jig according to claim 1, wherein: the step of glue application further comprises:
the high-temperature-resistant adhesive layer is attached to the high-temperature-resistant substrate according to the first positioning structure and the second positioning structure;
tearing off the release film of the high-viscosity layer, attaching the high-temperature-resistant substrate, and reserving the release film of the low-viscosity layer.
4. The processing technology of the semiconductor chip high temperature bearing jig according to claim 1, wherein: the step of differential sizing further comprises:
performing differential gluing by using a roll-to-roll rolling manner;
after the glue coating is finished, curing the high-temperature-resistant glue layer for 30-50 minutes at 180 ℃;
and after the curing is finished, attaching the release film.
5. The processing technology of the semiconductor chip high temperature bearing jig according to claim 1, wherein: the first exhaust structure and the second exhaust structure are arranged in an array manner.
6. A semiconductor chip high temperature bearing jig is characterized by comprising: the high-temperature-resistant substrate (10), the high-temperature-resistant adhesive layer, the second positioning structure (41) and the second exhaust structure (42);
the high-temperature-resistant adhesive layer comprises a polyimide film (22), and a high-viscosity layer (21) and a low-viscosity layer (23) which are arranged on two sides of the polyimide film (22);
the high-temperature-resistant adhesive layer is provided with a first positioning structure (31) and a first exhaust structure (32);
the high-temperature-resistant substrate (10) is provided with a second positioning structure (41) and a second exhaust structure (42);
the high-temperature-resistant substrate (10) is connected with the polyimide film (22) through the high-adhesion layer (21).
7. The semiconductor chip high temperature bearing jig according to claim 6, wherein: the area of the first exhaust structure (32) is not less than 10% of the area of the high-temperature-resistant glue layer;
the area of the second exhaust structure (42) is not less than 10% of the area of the high-temperature-resistant substrate (10);
the high-temperature resistant substrate (10) is made of FR4 and has a thickness of 0.5-2mm.
CN202110388405.7A 2021-04-12 2021-04-12 Semiconductor chip high-temperature bearing jig and processing technology thereof Active CN113135011B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202110388405.7A CN113135011B (en) 2021-04-12 2021-04-12 Semiconductor chip high-temperature bearing jig and processing technology thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202110388405.7A CN113135011B (en) 2021-04-12 2021-04-12 Semiconductor chip high-temperature bearing jig and processing technology thereof

Publications (2)

Publication Number Publication Date
CN113135011A CN113135011A (en) 2021-07-20
CN113135011B true CN113135011B (en) 2023-03-21

Family

ID=76811172

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202110388405.7A Active CN113135011B (en) 2021-04-12 2021-04-12 Semiconductor chip high-temperature bearing jig and processing technology thereof

Country Status (1)

Country Link
CN (1) CN113135011B (en)

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5846060B2 (en) * 2011-07-27 2016-01-20 信越化学工業株式会社 Wafer processing body, wafer processing member, wafer processing temporary adhesive, and thin wafer manufacturing method
CN205428891U (en) * 2015-12-23 2016-08-03 南通富士通微电子股份有限公司 Semiconductor carrier tool
US11186757B2 (en) * 2016-02-08 2021-11-30 Toray Industries, Inc. Resin composition, resin layer, permanent adhesive, adhesive for temporary bonding, laminated film, processed wafer, and method for manufacturing electronic component or semiconductor device
CN207685335U (en) * 2017-11-02 2018-08-03 丰盛印刷(苏州)有限公司 Chip sputtering jig
CN111276434B (en) * 2020-02-28 2023-10-03 深圳市海铭德科技有限公司 Coating jig rubberizing process of semiconductor chip

Also Published As

Publication number Publication date
CN113135011A (en) 2021-07-20

Similar Documents

Publication Publication Date Title
WO2018097266A1 (en) Adhesive sheet and method for peeling same
TWI605952B (en) Adsorption film and method of manufacturing the same, and Adsorption film having release film and method of manufacturing the same
CN201178524Y (en) Pressed coating type bearing tool construction
CN102244973A (en) Printed circuit board with blind hole structure and manufacturing method thereof
CN111885856A (en) Fusion method and tool for improving interlayer alignment precision of multilayer circuit board
JP2010129632A (en) Adhesive sheet with peeling sheet, metal plate sticking device, and metal plate sticking method
JPH03205197A (en) Structure of ic card
CN113135011B (en) Semiconductor chip high-temperature bearing jig and processing technology thereof
WO2020105485A1 (en) Semiconductor package manufacturing method
CN209676606U (en) A kind of the third flexible circuit board and production technology between single side and double-faced flexible wiring board
CN108848608B (en) Flexible circuit board and manufacturing method thereof
CN108012467A (en) The processing method and wiring board of rigid-flex combined board
JP2019079856A (en) Manufacturing method of multilayer substrate
CN113161241B (en) Preparation method of discrete semiconductor packaging support
JP5365204B2 (en) Wiring board manufacturing method
JP4330465B2 (en) Method for manufacturing fixture for thin substrate
CN202085394U (en) PCB with blind hole structure
TWI608778B (en) Multilayer printed wiring board manufacturing method
CN214800032U (en) Metal-based FR4 mixed-compression substrate
KR200483919Y1 (en) Embossed releasing film
CN211531419U (en) Circuit board
CN114615804B (en) Manufacturing method of flexible circuit board with 180-degree bending single-sided golden finger and two-sided plugging function
JP2007048807A (en) Jig for holding and transferring flexible substrate, and manufacturing method therefor
KR20170052078A (en) Continuous producting metallic foil laminate device and method thereby
CN113179580A (en) Metal-based FR4 mixed-compression substrate and production method thereof

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant