CN113131928A - Memristor-based exclusive-OR gate device and operation method thereof - Google Patents
Memristor-based exclusive-OR gate device and operation method thereof Download PDFInfo
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- CN113131928A CN113131928A CN201911419159.6A CN201911419159A CN113131928A CN 113131928 A CN113131928 A CN 113131928A CN 201911419159 A CN201911419159 A CN 201911419159A CN 113131928 A CN113131928 A CN 113131928A
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- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/20—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits characterised by logic function, e.g. AND, OR, NOR, NOT circuits
- H03K19/21—EXCLUSIVE-OR circuits, i.e. giving output if input signal exists at only one input; COINCIDENCE circuits, i.e. giving output only if all input signals are identical
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Abstract
The embodiment of the application provides an XOR gate device based on a memristor and an XOR logic operation method, wherein the XOR gate device comprises the memristor and a control circuit module, the control circuit module is used for converting two logic values subjected to XOR logic operation into a first preset voltage and a second preset voltage respectively, and applying the first preset voltage and the second preset voltage to a positive electrode and a negative electrode of the memristor respectively to enable the resistance value of the memristor to be in a first resistance value interval, a second resistance value interval or a third resistance value interval, wherein the resistance value of the second resistance value interval is smaller than that of the first resistance value interval, and the resistance value of the third resistance value interval is larger than that of the first resistance value interval; and determining a logic operation result of the two logic values according to a resistance value interval in which the resistance value of the memristor is located. The exclusive-OR gate logic device realizes exclusive-OR logic operation, and can reduce power consumption and circuit occupation area compared with an exclusive-OR gate logic circuit realized by elements such as a triode and the like.
Description
Technical Field
The application relates to the field of integrated circuits, in particular to an XOR gate device based on a memristor and an operation method of the XOR gate device.
Background
An exclusive or gate (XOR) logic circuit is a basic logic circuit in digital circuits. The exclusive-or gate logic circuit is combined with other logic circuits (such as an or gate, a nand gate and the like) in a digital circuit to jointly complete complex logic operation. Current xor gate logic circuits mainly include a plurality of Complementary Metal Oxide Semiconductor (CMOS) devices connected together. As shown in fig. 1, the current xor gate logic circuit includes 12 CMOS devices, so that the CMOS-based xor gate logic circuit uses more CMOS devices, occupies a larger area, consumes more power when performing an operation, and has no function of storing the result of the xor logic operation.
Disclosure of Invention
The embodiment of the application discloses an XOR gate device based on a memristor and an operation method thereof, and can reduce elements used by the existing XOR gate device and reduce the occupied area of the XOR gate device.
In a first aspect, an embodiment of the application provides an exclusive or gate device, where the exclusive or gate device includes a memristor and a control circuit module, a positive electrode of the memristor is connected with one output end of the control circuit module, a negative electrode of the memristor is connected with another output end of the control circuit module, and a resistance value of the memristor is in a first resistance value interval;
the control circuit module is used for: converting the two logic values subjected to the exclusive-or logic operation into a first preset voltage and a second preset voltage respectively, and applying the first preset voltage and the second preset voltage to the anode and the cathode of the memristor respectively to enable the resistance value of the memristor to be in a first resistance value interval, a second resistance value interval or a third resistance value interval, wherein the resistance value of the second resistance value interval is smaller than that of the first resistance value interval, and the resistance value of the third resistance value interval is larger than that of the first resistance value interval;
and determining a logic operation result of the two logic values according to a resistance value interval in which the resistance value of the memristor is located.
According to the characteristic that the resistance values of the memristor are different under different voltage conditions, the control circuit module converts two logic values needing to be subjected to the exclusive-OR operation into corresponding voltage signals to be input to the anode and the cathode of the memristor, and then the exclusive-OR operation result is determined according to the resistance value of the memristor. The XOR gate logic circuit is realized by the memristor and the control circuit module, so that the number of used elements of the existing XOR gate logic circuit can be reduced, the power consumption of XOR operation is reduced, and the occupied area of the XOR gate logic circuit is reduced.
In a specific embodiment, the control circuit module is specifically configured to: when the resistance value of the memristor belongs to a second resistance value interval or a third resistance value interval, determining that the logical operation result of the two logical values subjected to the exclusive OR logical operation is 1; and when the resistance value of the memristor belongs to a first resistance value interval, determining that the logic operation result of the two logic values subjected to the exclusive OR logic operation is 0.
In a specific embodiment, the control circuit module is specifically configured to: applying a reading voltage to the memristor, reading a current value flowing through the memristor, and determining that a logic operation result of the two logic values subjected to the exclusive-or logic operation is 1 when the current value belongs to a second current value interval or a third current value interval; when the current value belongs to a first current value interval, determining that the logical operation result of the two logical values subjected to the exclusive-or logical operation is 0; the first current value interval is determined by the reading voltage and the first resistance value interval, the second current value interval is determined by the reading voltage and the second resistance value interval, and the third current value interval is determined by the reading voltage and the third resistance value interval.
In a second aspect, an embodiment of the present application provides a logic operation method, where the method is used for the xor gate device according to the first aspect, and the method includes:
the control circuit module converts two logic values subjected to exclusive-or logic operation into a first preset voltage and a second preset voltage respectively, and applies the first preset voltage and the second preset voltage to the anode and the cathode of the memristor respectively, so that the resistance value of the memristor is in a first resistance value interval, a second resistance value interval or a third resistance value interval, the resistance value of the second resistance value interval is smaller than that of the first resistance value interval, and the resistance value of the third resistance value interval is larger than that of the first resistance value interval;
and the control circuit module determines a logic operation result of the two logic values according to the resistance value interval where the resistance value of the memristor is located.
In a specific embodiment, the determining, by the control circuit module, a logical operation result of the two logical values according to a resistance value interval in which the resistance value of the memristor is located includes: when the resistance value of the memristor belongs to a second resistance value interval or a third resistance value interval, the control circuit module determines that the logical operation result of the two logical values for performing the logical operation is 1; and when the resistance value of the memristor belongs to a first resistance value interval, determining that the logic operation result of the two logic values subjected to the exclusive OR logic operation is 0.
In a specific embodiment, the determining, by the control circuit module, a logical operation result of the two logical values according to a resistance value interval in which the resistance value of the memristor is located includes: the control circuit module applies reading voltage to the memristor, reads a current value flowing through the memristor, and determines that a logic operation result of the two logic values subjected to the exclusive-or logic operation is 1 when the current value belongs to a second current value interval or a third current value interval; when the current value belongs to a first current value interval, determining that the logical operation result of the two logical values subjected to the exclusive-or logical operation is 0; the first current value interval is determined by the reading voltage and the first resistance value interval, the second current value interval is determined by the reading voltage and the second resistance value interval, and the third current value interval is determined by the reading voltage and the third resistance value interval.
In a third aspect, an embodiment of the present application further provides a chip, where the chip includes a plurality of xor gate devices described in the first aspect, and when the chip performs a calculation including an xor logic operation, the xor gate devices described in the first aspect are used to implement the xor logic operation.
An embodiment of the present application further provides a computing device, which includes the chip described in the third aspect.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
FIG. 1 is a schematic diagram of an XOR gate logic circuit based on CMOS components;
FIG. 2 is a schematic diagram of an XOR gate device based on memristors according to an embodiment of the present application;
FIG. 3 is a schematic diagram of an XOR gate device based on memristors according to an embodiment of the present application to implement an XOR operation;
FIG. 4 is a schematic diagram of initialization of an XOR gate device based on memristors according to an embodiment of the present application;
FIG. 5 is a memristor resistance state transition schematic diagram of a memristor-based XOR gate device provided by an embodiment of the present application;
fig. 6 is a schematic flow diagram illustrating an exclusive-or operation implemented by an exclusive-or gate device based on a memristor according to an embodiment of the present application.
Detailed Description
To help those skilled in the art to better understand the technical solutions of the present application, some concepts related to the embodiments of the present application will be first described.
A memristor, called a memory resistor (memristor), is a resistor with a function of memorizing a resistance value. The memristor is a bipolar device and comprises a positive pole and a negative pole, and the resistance value of the memristor changes along with the change of the voltage applied to the positive pole and the negative pole of the memristor. When positive voltage is applied to the anode and the cathode of the memristor, if the value of the positive voltage is smaller than the value of the starting voltage corresponding to the memristor, the resistance value of the memristor is kept unchanged; if the value of the forward voltage applied to the memristor is larger than the value of the starting voltage and smaller than the value of the first critical voltage, the larger the applied forward voltage is, the smaller the resistance value of the memristor is; if the value of the forward voltage applied to the memristor is larger than or equal to the value of the first critical voltage, the resistance value of the memristor is not changed after being reduced to the minimum value. When negative voltage is applied to the positive electrode and the negative electrode of the memristor, if the value of the negative voltage is smaller than the value of the starting voltage, the resistance value of the memristor is kept unchanged; if the negative voltage applied to the memristor is larger than the starting voltage and smaller than the second threshold voltage, the resistance value of the memristor is larger when the applied negative voltage is larger, and when the applied negative voltage is larger than or equal to the second threshold voltage, the resistance value of the memristor does not change after being increased to the maximum value. When the voltage applied to the anode and the cathode of the memristor is removed, the memristor can keep the resistance value when the voltage of the anode and the cathode is removed, and therefore the function of memorizing the resistance value is achieved. The positive voltage and the negative voltage are voltage differences between a voltage applied to the positive pole of the memristor and a voltage applied to the negative pole of the memristor, and when the voltage differences are positive, the positive voltage is applied between the positive pole and the negative pole of the memristor, and when the voltage differences are negative, the negative voltage is applied between the positive pole and the negative pole of the memristor. The first threshold voltage and the second threshold voltage may have the same or different values.
The xor gate device is a logic circuit for performing an xor operation on two input logic values, the input logic value at each input terminal may be any one of 0 and 1, and if the two input logic values of the xor gate device are p or q, respectively, a truth table of the xor operation is shown in table 1 below.
TABLE 1
| Input p | Input q | Output of |
| 1 | 0 | 1 |
| 1 | 1 | 0 |
| 0 | 0 | 0 |
| 0 | 1 | 1 |
Fig. 1 is a schematic diagram of an exclusive or gate logic circuit based on CMOS components. The xor gate logic circuit shown in fig. 1 includes 12 CMOS devices from T1 to T12, wherein T1, T3, T5, T6, T9, and T10 are PNP transistors, T2, T4, T7, T8, T11, and T12 are NPN transistors, and VCC is high. When the input terminal a inputs a high level, the input terminal B inputs a low level, that is, the logic values p-1 and q-0 are xored, at this time, T2, T3, T5, T6, T7 and T12 are turned on, the remaining transistors are turned off, the high level of VCC is output through T5 and T6, which indicates that the output is 1, that is, the xored result indicating that the logic values p-1 and q-0 are 1. When the input end a inputs a high level, the input end B inputs a high level, that is, the logic values p-1 and q-1 are subjected to exclusive or operation, at this time, T2, T4, T5, T7, T8 and T9 are turned on, the rest of the transistors are turned off, the output end is grounded through T7 and T8, and the output is represented as 0, that is, the exclusive or result representing that the logic values p-1 and q-1 are 0. When the input terminal a inputs a low level and the input terminal B inputs a high level, the output terminal outputs a high level, that is, the exclusive or result indicating that the logic value p is 0 and q is 1. When the input terminal a inputs a low level and the input terminal B inputs a low level, the output terminal outputs a low level, that is, the exclusive or result indicating that the logic value p is 0 and q is 0.
The exclusive-OR gate logic circuit based on the CMOS element uses more CMOS elements, has higher power consumption and larger occupied area. In order to solve the above problem, an embodiment of the present application provides an xor gate device based on a memristor and an implementation method. According to the characteristic that the resistance value of the memristor can change under different voltage conditions, a voltage signal is used as input of the positive electrode and the negative electrode of the memristor, two logic values of exclusive-or operation are simulated, the resistance value of the memristor under the action of the positive voltage and the negative voltage is used as logic output, and the resistance value of the memristor is read to obtain a logic operation result. As shown in fig. 2, fig. 2 is an exclusive or gate device based on a memristor provided by an embodiment of the present application, and the exclusive or gate device includes a memristor 10 and a control circuit block 20. The positive electrode 101 of the memristor 10 is connected with the voltage output terminal 201 of the control circuit module 20, the negative electrode 102 of the memristor 10 is connected with the voltage output terminal 202 of the control circuit module 20, and the control circuit module 20 is used for providing input voltage for the memristor 10.
The output voltage Vp of the output terminal 201 of the control circuit block 20 is used as an input p of the exclusive-or operation, the output terminal 202 of the control circuit block 20 outputs the voltage Vq as an input q of the exclusive-or operation, that is, the input voltage Vp of the positive electrode 101 of the memristor 10 represents the logical value p, and the input voltage Vq of the negative electrode 102 represents the logical value q. In the embodiment of the present application, since the input value of the logic gate circuit is two values, i.e., 0 and 1, when the logic value to be logically operated is 0, one voltage output end of the control circuit module 20 outputs a voltage of 0 volt (V), and when the logic value to be logically operated is 1, the voltage output end of the control circuit module 20 outputs a voltage Vh, i.e., the voltage of 0V represents the logic value 0, and the voltage of Vh represents the logic value 1. Then the input voltage to the memristor 10 includes four cases as shown in table 2 when the exclusive or gate device shown in fig. 2 is used to perform the exclusive or logic operation.
TABLE 2
| Positive input Vp (p) | Negative input Vq (q) | |
| |
0 | |
| | Vh | |
| 0 | 0 | |
| 0 | Vh |
According to the characteristic that the resistance value of the memristor 10 changes along with the voltage applied to the positive electrode 101 and the negative electrode 102 of the memristor, the resistance value of the memristor 10 can be divided into three resistance states: a first resistance state, a second resistance state and a third resistance state. The first resistance state is a resistance value corresponding to the memristor 10 when a forward voltage is applied to the memristor 10 and the forward voltage is greater than a threshold voltage; the second resistance state is that when positive voltage or negative voltage is applied to the memristor 10, and the positive voltage or the negative voltage is larger than the starting voltage and smaller than the threshold voltage, the resistance value corresponding to the memristor 10 is obtained; the third resistance state is a resistance value corresponding to the memristor when a negative voltage is applied to the memristor 10 and the negative voltage is greater than a threshold voltage. The memristor 10 has a resistance in a first resistance state smaller than a resistance in a second resistance state, which is smaller than a resistance in a third resistance state.
It should be noted that, according to the characteristics of the memristor, when the positive voltage applied to the memristor 10 is greater than the threshold voltage, the resistance of the memristor may decrease to the minimum value, and when the negative voltage applied to the memristor 10 is greater than the threshold voltage, the resistance of the memristor may increase to the maximum value, that is, the first resistance state corresponds to the minimum resistance of the memristor 10, and the third resistance state corresponds to the maximum resistance of the memristor 10. Due to the error, in the embodiment of the present application, different resistance states correspond to a set of resistance intervals, for example, the resistance interval corresponding to the first resistance state is a resistance range of the first resistance state [ R0, R1], the resistance of the second resistance state is [ R2, R3], the resistance of the third resistance state is [ R4, R5], where R0 is a minimum resistance that can be reached by the memristor 10, and R5 is a maximum value that can be reached by the memristor 10.
In the embodiment of the present application, the value of Vh is greater than the value of the threshold voltage of the memristor 10, and when Vh is input to the positive electrode 101 and 0 is input to the negative electrode 102 of the memristor 10, the positive voltage Vh is input, and the resistance value of the memristor corresponds to the first resistance state. When Vh is input to the positive electrode 101 and 0 is input to the negative electrode 102 of the memristor 10, it is equivalent to performing an exclusive-or operation of which logical values p is 1 and q is 0, and the exclusive-or result of p being 1 and q being 0 is 1, that is, the result of the exclusive-or operation represented by the first resistance state of the memristor 10 is 1. When 0 is input into the positive electrode 101 and Vh is input into the negative electrode 102 of the memristor 10, the negative voltage Vh is input, and the resistance value of the memristor corresponds to the third resistance state. When 0 is input to the positive electrode 101 and Vh is input to the negative electrode 102 of the memristor 10, it is equivalent to performing an exclusive-or operation of which logical values p is 0 and q is 1, and the exclusive-or result of p is 0 and q is 1, that is, the result of the exclusive-or operation is 1 in the third resistance state of the memristor 10. Since the first and third resistance states of the memristor 10 both represent that the result of the exclusive-or operation is 1, the second resistance state of the memristor represents that the exclusive-or result is 0. Then the input voltage of the memristor 10, the resistance state of the memristor 10, and the corresponding xor result when performing the xor logic operation using the xor gate device shown in fig. 2 are shown in table 3.
TABLE 3
| Positive input Vp (p) | Negative input Vq (q) | Memristor resistance state | Corresponding |
| Vh | |||
| 0 | First resistance state | 1 | |
| Vh | Vh | |
0 |
| 0 | 0 | |
0 |
| 0 | Vh | Third resistance state | 1 |
According to the above analysis, when the xor gate device shown in fig. 2 is used again to perform the xor logic operation, when the two logic values for performing the xor operation are p-1 and q-1 or p-0 and q-0, the voltages applied to the positive electrode 101 and the negative electrode 102 of the memristor 10 are the same, and the resistance value of the memristor does not change. Because the memristor has the characteristic of memorizing the resistance value, after the last logic operation of the exclusive-or gate device, the resistance value of the memristor 10 may be in the first resistance state or the third resistance state, that is, the logic output result corresponding to the resistance value of the memristor 10 is 1. If the two logic values to be xored are both 0 or 1, the correct result of xored between 0 and 0 or xored between 1 and 1 should be 0, and the resistance of the corresponding memristor 10 should be the second resistance state. When the xor operation is performed between 0 and 0 or between 1 and 1, the input voltages of the two poles of the memristor 10 are the same, the resistance value of the memristor 10 remains unchanged and is still in the first resistance state or the third resistance state, that is, the output result of the xor operation between 0 and 0 or between 1 and 1 is 1, which results in an error calculation result. In order to prevent the above situation, in the embodiment of the present application, before the xor gate device performs the xor logic operation each time, the memristor 10 is adjusted to the second resistance state, so that when the xor logic operation of 0 and 1 is performed, the memristor 10 may be switched to the first resistance state or the third resistance state according to the input voltages of the positive electrode 101 and the negative electrode 102, so that the logic output result corresponding to the resistance state of the memristor 10 is 1; when performing an exclusive or logic operation between 0 and 0 or between 1 and 1, the memristor 10 may keep the second resistance state unchanged under the input voltages of the positive electrode 101 and the negative electrode 102, so that the logic output result corresponding to the resistance state of the memristor 10 is 0.
After a logic operation is performed using the exclusive or gate device shown in fig. 2, the resistance state of the memristor 10 needs to be determined to determine the result of the exclusive or logic operation. In the embodiment of the application, after the logic operation is performed, a reading voltage V0 smaller than the starting voltage is applied to the positive pole and the negative pole of the memristor 10, and since V0 is smaller than the starting voltage, the resistance value of the memristor 10 does not change. The resistance values of the three resistance states of the memristor 10 corresponding to the three intervals correspond to the three current intervals according to ohm's law, so that the result of the exclusive-or logic operation can be determined by reading the current value flowing through the memristor 10 through a voltage V0 which is smaller than the starting voltage and is applied to the positive electrode and the negative electrode of the memristor 10. If the resistance range of the first resistance state of the memristor 10 is [ R0, R1], the resistance of the second resistance state is [ R2, R3], the resistance of the third resistance state is [ R4, R5], after a positive voltage or a negative voltage with a voltage value of V0 is applied to the memristor 10, the current interval corresponding to the first resistance state is [ I0, I1], the current interval corresponding to the first resistance state is [ I2, I3], the three current intervals are [ I4, I5], respectively, the current interval corresponding to the first resistance state is [ I4, I5], when the xor gate device shown in fig. 2 is used to perform xor logic operation, the input voltage, the read current, and the corresponding xor result of the memristor 10 are shown in table 4.
TABLE 4
| Positive input Vp (p) | Negative input Vq (q) | Electric current | Corresponding XOR result |
| Vh | 0 | [I0，I1] | 1 |
| Vh | Vh | [I2，I3] | 0 |
| 0 | 0 | [I2，I3] | 0 |
| 0 | Vh | [I4，I5] | 1 |
The principle of the exclusive or gate device shown in fig. 2 for performing the exclusive or logic operation will be described in detail below. As shown in fig. 3, before each logic operation, the control circuit module 20 adjusts the resistance value of the memristor 10 to the second resistance state by adjusting the voltages input to the positive 101 and negative 102 poles of the memristor 10. The control circuit module 20 then adjusts the voltage pulses input to the positive 101 and negative 102 poles of the memristor 10 according to the two logic values that require logic operations. And finally, applying a reading voltage smaller than the starting voltage to two poles of the memristor 10, and determining a logic operation result of two logic values for performing logic operation by reading the magnitude of the current value flowing through the memristor 10.
Specifically, as shown in fig. 3, after the memristor 10 is adjusted to the second resistance state, when two logic values that need to be logically operated are p equal to 1 and q equal to 0, the output terminal 201 of the control circuit module 20 outputs a voltage pulse with a voltage Vp equal to Vh, the voltage Vq output by the output terminal 202 is 0, which is equivalent to the input forward voltage Vh, the resistance value of the memristor 10 is converted from the second resistance state to the first resistance state, and the first resistance state indicates that the result of the logical operation is 1, which is the exclusive or result of 1 and 0 is 1.
When two logic values that need to be logically operated are p is 1, q is 1, the output terminal 201 and the output terminal 202 of the control circuit module 20 simultaneously output a voltage pulse with a voltage Vq is Vh, and the input voltages of the positive electrode and the negative electrode of the memristor are the same, the resistance value of the memristor 10 is maintained in the second resistance state, which indicates that the result of the logical operation is 0, that is, the exclusive or result of 1 and 1 is 0.
When two logic values that need to be logically operated are p is 0, q is 0, the voltage Vp output by the output terminal 201 of the control circuit module 20 is 0, the voltage Vq output by the output terminal 202 is 0, and the input voltages of the positive electrode and the negative electrode of the memristor are the same, the resistance value of the memristor 10 is maintained in the second resistance state, which indicates that the result of the logical operation is 0, that is, the exclusive or result of 1 and 1 is 0.
When two logic values that need to be logically operated are p is 0, q is 1, the voltage Vp output by the output terminal 201 of the control circuit module 20 is 0, the voltage pulse with the voltage Vq is Vh output by the output terminal 202, which is equivalent to the input negative voltage Vh, the resistance of the memristor 10 is converted from the second resistance state to the third resistance state, where the third resistance state represents that the result of the logical operation is 1, that is, the exclusive or result of 1 and 0 is 1.
Since the exclusive-or gate device needs to convert the resistance of the memristor 10 to the second resistance state before each logic operation, the process of converting the memristor 10 to the second resistance state is described below. As shown in fig. 4, the resistance values of the memristor 10 include a first resistance state, a second resistance state, and a third resistance state. When the memristor is in the first resistance state, the control circuit module 20 inputs a voltage of 0V to the positive electrode 101 of the memristor 10, and inputs a voltage V1 to the negative electrode 102, which is equivalent to input a negative voltage V1, so that the resistance value of the memristor 10 is increased, and the memristor is converted from the first resistance state to the second resistance state. If the memristor 10 is in the third resistance state, the control circuit module 20 inputs a voltage V2 to the positive electrode 102 of the memristor 10, and inputs a voltage 0V to the negative electrode 102, which is equivalent to input a forward voltage V2, so that the resistance value of the memristor 10 is reduced, and the memristor is converted from the third resistance state to the second resistance state. Wherein the voltage V1 is greater than the starting voltage of the memristor 10 and less than the threshold voltage of the memristor 10 to enable the resistive state of the memristor 10 to transition from the first resistive state to the second resistive state and to prevent the memristor 10 from transitioning from the first resistive state to the third resistive state; the voltage V2 is greater than the firing voltage of the memristor 10 and less than the threshold voltage of the memristor 10 to enable the resistive state of the memristor 10 to transition from the third resistive state to the second resistive state and to prevent the memristor 10 from transitioning from the third resistive state to the first resistive state.
In one possible embodiment, the memristor 10 may be inter-switched between a first resistance state, a second resistance state, and a third resistance state. As shown in fig. 5, fig. 5 is a schematic diagram of state transition of a memristor provided by an embodiment of the present application. When the memristor 10 is in the first resistance state, the control circuit module 20 inputs a voltage of 0V to the positive electrode 101 of the memristor 10, and inputs a voltage V3 to the negative electrode, which is equivalent to input a negative voltage V3, so that the memristor can be converted from the first resistance state to the third resistance state. When the memristor is in the second resistance state, the control circuit module 20 inputs a voltage of V4 at the positive electrode 101 of the memristor 10, and inputs a voltage of 0V at the negative electrode, which is equivalent to input a forward voltage V4, so that the memristor can be converted from the second resistance state to the first resistance state; the control circuit module 20 inputs a voltage of 0V to the positive electrode 101 and a voltage V5 to the negative electrode 102 of the memristor 10, which is equivalent to input a negative voltage V5, so that the memristor can be converted from the second resistance state to the third resistance state. When the memristor is in the third resistance state, the control circuit module 20 inputs a voltage V6 to the positive electrode 101 and a voltage V0 to the negative electrode 102 of the memristor 10, which is equivalent to the input forward voltage V6, so that the memristor 10 can be converted from the third resistance state to the first resistance state. The values of V3, V4, V5, and V6 are all greater than the firing voltage of the memristor 10. In order to allow the resistance value of the memristor 10 to transition from the second resistance state to the first resistance state, V4 needs to be greater than the threshold voltage of the memristor, and in order to allow the resistance value of the memristor 10 to transition from the second resistance state to the third resistance state, V5 needs to be greater than the threshold voltage of the memristor.
In the embodiment of the application, according to the characteristic that the resistance values of the memristor are different under different voltage conditions, the control circuit module converts two logic values needing to be subjected to the exclusive-or operation into corresponding voltage signals to be input to the anode and the cathode of the memristor, and determines the exclusive-or operation result of data subjected to the exclusive-or operation by reading the resistance value of the memristor and according to the resistance value interval to which the resistance value of the memristor belongs. The XOR gate device is realized by the memristor and the control circuit module, and compared with the existing XOR gate logic circuit based on CMOS elements, the XOR gate device has the advantages that the elements used by the XOR gate device can be reduced, the power consumption of the circuit is reduced, and meanwhile, the occupied area of the XOR gate device is reduced. The memristor has the function of memorizing the resistance, and after the XOR gate device provided by the embodiment of the application is used for XOR operation, the memristor can keep the resistance of the memristor unchanged, so that the function of memorizing the result of the XOR operation is realized, other memory devices are not needed to store the result of the XOR operation, and the calculation and storage integration of the XOR operation is realized.
The embodiment of the application provides a method for performing logic operation on an exclusive or gate device based on a memristor, the method is applied to the exclusive or gate device including the memristor 10 and a control circuit module 20 shown in fig. 2, and as shown in fig. 6, the method includes:
s601, the control circuit module 20 converts the initial state of the memristor 10 into a second resistance state.
In the embodiment of the application, before performing the exclusive-or logic operation each time, the control circuit module 20 needs to determine the resistance state of the memristor 10, and when the control circuit module 20 determines that the memristor 10 is in the first resistance state or the third resistance state, the control circuit module 20 inputs a voltage to the positive electrode and the negative electrode of the memristor 10, and converts the resistance state of the memristor 10 into the second resistance state. Specifically, when the control circuit module 20 determines that the resistance value of the memristor 10 is in the first resistance state, the control circuit module 20 inputs a voltage of 0V at the positive electrode 101 of the memristor 10, and inputs a voltage V1 at the negative electrode 102, so that the memristor 10 is converted from the first resistance state to the second resistance state; when the memristor 10 is in the third resistance state, the control circuit module 20 inputs a voltage V2 to the positive electrode 102 of the memristor 10, and inputs a voltage 0V to the negative electrode 102, so that the memristor 10 is converted from the third resistance state to the second resistance state. When the control circuit module 20 determines that the memristor 10 is in the second resistive state, the control circuit module 20 does not adjust the resistive state of the memristor 10.
S602 and the control circuit module 20 respectively convert the two logic values subjected to the logic operation into corresponding voltage signals.
When the logical value to be subjected to the exclusive-or operation is 0, the logical value is converted into a voltage of 0V, and when the logical value to be subjected to the calculation is 1, the logical value is converted into a voltage Vh. Specifically, when the logical values that need to be subjected to the exclusive-or operation are p ═ 1 and q ═ 0, the control circuit module 20 sets the output voltage Vp of the output terminal 201 corresponding to the logical value p to Vh and sets the output voltage Vq of the output terminal 202 corresponding to the logical value q to 0V.
When the logical values that need to be subjected to the exclusive-or operation are p-1 and q-1, respectively, the control circuit module 20 sets the output voltage Vp of the output terminal 201 corresponding to the logical value p to Vh and sets the output voltage Vq of the output terminal 202 corresponding to the logical value q to Vh.
When the logical values that need to be subjected to the exclusive-or operation are p-0 and q-1, respectively, the control circuit module 20 sets the output voltage Vp of the output terminal 201 corresponding to the logical value p to 0, and sets the output voltage Vq of the output terminal 202 corresponding to the logical value q to Vh.
When the logical values that need to be subjected to the exclusive-or operation are p ═ 0 and q ═ 0, respectively, the control circuit module 20 sets the output voltage Vp of the output terminal 201 corresponding to the logical value p to 0, and sets the output voltage Vq of the output terminal 202 corresponding to the logical value q to 0.
S603, the control circuit module 20 inputs the voltage signal to the memristor 10.
The control circuit module 20 inputs Vp from the positive pole 101 of the memristor 10 and Vq from the negative pole 102 of the memristor 10.
S604, the control circuit 20 applies a read voltage to the memristor 10, reads a current value flowing through the memristor 10, and determines a result of the exclusive or operation according to the current value.
After the control circuit module 20 inputs the voltage signal into the memristor 10, applying a reading voltage V0 smaller than the starting voltage to the positive electrode and the negative electrode of the memristor 10, and then reading the current value flowing through the memristor 10, wherein if the current value belongs to [ I0, I1], the corresponding resistance value of the memristor 10 belongs to the first resistance state, it indicates that the exclusive-or operation result of the two logic values subjected to the exclusive-or operation is 1; if the current value belongs to [ I2, I3], and the resistance value of the corresponding memristor 10 belongs to the second resistance state, it indicates that the exclusive-or operation result of the two logic values subjected to the exclusive-or operation is 0; if the current value belongs to [ I4, I5] and the resistance value of the corresponding memristor 10 belongs to the third resistance state, the result of the exclusive-or operation of the two logic values subjected to the exclusive-or operation is 1.
The embodiment of the present application further provides a chip, where the chip includes the plurality of xor gate logic devices shown in fig. 2, and when the chip performs calculation including xor logic operation, the xor gate logic devices described in the above embodiments may be used to implement xor logic operation, and a method for implementing xor operation by the chip may refer to a method for implementing xor operation by using the memristor 10 and the control circuit module 20 by using the xor gate devices in the above embodiments, and details of the method are not repeated here.
The embodiment of the application also provides a computing device, which comprises the chip, and the computing device performs logic operation through the chip.
The above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same. Although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present invention.
Claims (6)
1. An exclusive-OR gate device is characterized by comprising a memristor and a control circuit module, wherein the positive electrode of the memristor is connected with one output end of the control circuit module, the negative electrode of the memristor is connected with the other output end of the control circuit module, and the resistance value of the memristor is in a first resistance value interval;
the control circuit module is used for: converting the two logic values subjected to the exclusive-or logic operation into a first preset voltage and a second preset voltage respectively, and applying the first preset voltage and the second preset voltage to the anode and the cathode of the memristor respectively to enable the resistance value of the memristor to be in a first resistance value interval, a second resistance value interval or a third resistance value interval, wherein the resistance value of the second resistance value interval is smaller than that of the first resistance value interval, and the resistance value of the third resistance value interval is larger than that of the first resistance value interval;
and determining a logic operation result of the two logic values according to a resistance value interval in which the resistance value of the memristor is located.
2. The xor gate device of claim 1, wherein the control circuit module is specifically configured to:
when the resistance value of the memristor belongs to a second resistance value interval or a third resistance value interval, determining that the logical operation result of the two logical values subjected to the exclusive OR logical operation is 1; and when the resistance value of the memristor belongs to a first resistance value interval, determining that the logic operation result of the two logic values subjected to the exclusive OR logic operation is 0.
3. The xor gate device of claim 1, wherein the control circuit module is specifically configured to:
applying a reading voltage to the memristor, reading a current value flowing through the memristor, and determining that a logic operation result of the two logic values subjected to the exclusive-or logic operation is 1 when the current value belongs to a second current value interval or a third current value interval; when the current value belongs to a first current value interval, determining that the logical operation result of the two logical values subjected to the exclusive-or logical operation is 0; the first current value interval is determined by the reading voltage and the first resistance value interval, the second current value interval is determined by the reading voltage and the second resistance value interval, and the third current value interval is determined by the reading voltage and the third resistance value interval.
4. A method of logical operation for an exclusive or gate device as claimed in any one of claims 1 to 3, the method comprising:
the control circuit module converts two logic values subjected to exclusive-or logic operation into a first preset voltage and a second preset voltage respectively, and applies the first preset voltage and the second preset voltage to the anode and the cathode of the memristor respectively, so that the resistance value of the memristor is in a first resistance value interval, a second resistance value interval or a third resistance value interval, the resistance value of the second resistance value interval is smaller than that of the first resistance value interval, and the resistance value of the third resistance value interval is larger than that of the first resistance value interval;
and the control circuit module determines a logic operation result of the two logic values according to the resistance value interval where the resistance value of the memristor is located.
5. The method of claim 4, wherein the control circuit module determines the logical operation result of the two logical values according to a resistance interval in which the resistance of the memristor is located, and comprises:
when the resistance value of the memristor belongs to a second resistance value interval or a third resistance value interval, the control circuit module determines that the logical operation result of the two logical values for performing the logical operation is 1; and when the resistance value of the memristor belongs to a first resistance value interval, determining that the logic operation result of the two logic values subjected to the exclusive OR logic operation is 0.
6. The method of claim 4, wherein the control circuit module determines the logical operation result of the two logical values according to a resistance interval in which the resistance of the memristor is located, and comprises:
the control circuit module applies reading voltage to the memristor, reads a current value flowing through the memristor, and determines that a logic operation result of the two logic values subjected to the exclusive-or logic operation is 1 when the current value belongs to a second current value interval or a third current value interval; when the current value belongs to a first current value interval, determining that the logical operation result of the two logical values subjected to the exclusive-or logical operation is 0; the first current value interval is determined by the reading voltage and the first resistance value interval, the second current value interval is determined by the reading voltage and the second resistance value interval, and the third current value interval is determined by the reading voltage and the third resistance value interval.
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| CN201911419159.6A CN113131928A (en) | 2019-12-31 | 2019-12-31 | Memristor-based exclusive-OR gate device and operation method thereof |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114204936A (en) * | 2022-02-18 | 2022-03-18 | 苏州浪潮智能科技有限公司 | Electronic equipment and logic gate circuit based on memristor thereof |
| CN116054816A (en) * | 2023-03-29 | 2023-05-02 | 山东云海国创云计算装备产业创新中心有限公司 | Encryption logic unit circuit, encryption chip, server and image encryption method |
| CN117595859A (en) * | 2024-01-19 | 2024-02-23 | 山东云海国创云计算装备产业创新中心有限公司 | Memristor-based logic circuit, output method and electronic equipment |
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2019
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114204936A (en) * | 2022-02-18 | 2022-03-18 | 苏州浪潮智能科技有限公司 | Electronic equipment and logic gate circuit based on memristor thereof |
| CN114204936B (en) * | 2022-02-18 | 2022-05-24 | 苏州浪潮智能科技有限公司 | Electronic equipment and logic gate circuit based on memristor thereof |
| CN116054816A (en) * | 2023-03-29 | 2023-05-02 | 山东云海国创云计算装备产业创新中心有限公司 | Encryption logic unit circuit, encryption chip, server and image encryption method |
| CN117595859A (en) * | 2024-01-19 | 2024-02-23 | 山东云海国创云计算装备产业创新中心有限公司 | Memristor-based logic circuit, output method and electronic equipment |
| CN117595859B (en) * | 2024-01-19 | 2024-05-14 | 山东云海国创云计算装备产业创新中心有限公司 | Memristor-based logic circuit, output method and electronic equipment |
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