CN113113511A - Preparation method of detector for inhibiting side wall leakage current by using passivation layer negative electrification - Google Patents
Preparation method of detector for inhibiting side wall leakage current by using passivation layer negative electrification Download PDFInfo
- Publication number
- CN113113511A CN113113511A CN202110388246.0A CN202110388246A CN113113511A CN 113113511 A CN113113511 A CN 113113511A CN 202110388246 A CN202110388246 A CN 202110388246A CN 113113511 A CN113113511 A CN 113113511A
- Authority
- CN
- China
- Prior art keywords
- mesa
- passivation layer
- infrared material
- mesa structure
- side wall
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000002161 passivation Methods 0.000 title claims abstract description 49
- 230000002401 inhibitory effect Effects 0.000 title claims abstract description 16
- 238000002360 preparation method Methods 0.000 title claims abstract description 14
- 239000000463 material Substances 0.000 claims abstract description 59
- 238000000034 method Methods 0.000 claims abstract description 26
- 238000005530 etching Methods 0.000 claims abstract description 15
- 238000000151 deposition Methods 0.000 claims abstract description 12
- 238000004151 rapid thermal annealing Methods 0.000 claims abstract description 9
- 238000001039 wet etching Methods 0.000 claims abstract description 9
- 238000001312 dry etching Methods 0.000 claims abstract description 8
- 230000008878 coupling Effects 0.000 claims abstract description 4
- 238000010168 coupling process Methods 0.000 claims abstract description 4
- 238000005859 coupling reaction Methods 0.000 claims abstract description 4
- 230000001939 inductive effect Effects 0.000 claims abstract description 4
- 239000010408 film Substances 0.000 claims description 23
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 claims description 12
- 238000005468 ion implantation Methods 0.000 claims description 12
- 238000000137 annealing Methods 0.000 claims description 10
- 238000009616 inductively coupled plasma Methods 0.000 claims description 10
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 10
- 229910052681 coesite Inorganic materials 0.000 claims description 9
- 229910052906 cristobalite Inorganic materials 0.000 claims description 9
- 229910052682 stishovite Inorganic materials 0.000 claims description 9
- 229910052905 tridymite Inorganic materials 0.000 claims description 9
- 239000000377 silicon dioxide Substances 0.000 claims description 8
- DDFHBQSCUXNBSA-UHFFFAOYSA-N 5-(5-carboxythiophen-2-yl)thiophene-2-carboxylic acid Chemical compound S1C(C(=O)O)=CC=C1C1=CC=C(C(O)=O)S1 DDFHBQSCUXNBSA-UHFFFAOYSA-N 0.000 claims description 6
- 238000002513 implantation Methods 0.000 claims description 6
- 239000010409 thin film Substances 0.000 claims description 6
- 239000008367 deionised water Substances 0.000 claims description 5
- 229910021641 deionized water Inorganic materials 0.000 claims description 5
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 5
- 238000004519 manufacturing process Methods 0.000 claims description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 3
- 229910020776 SixNy Inorganic materials 0.000 claims description 3
- 238000003486 chemical etching Methods 0.000 claims description 3
- 239000003792 electrolyte Substances 0.000 claims description 3
- 239000012535 impurity Substances 0.000 claims description 3
- 230000000873 masking effect Effects 0.000 claims description 3
- 238000001020 plasma etching Methods 0.000 claims description 3
- 229910052710 silicon Inorganic materials 0.000 claims description 3
- 239000010703 silicon Substances 0.000 claims description 3
- 239000000523 sample Substances 0.000 claims 1
- 239000010410 layer Substances 0.000 description 41
- 238000010586 diagram Methods 0.000 description 8
- 230000000694 effects Effects 0.000 description 7
- 230000008569 process Effects 0.000 description 4
- 230000008021 deposition Effects 0.000 description 2
- 230000005764 inhibitory process Effects 0.000 description 2
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 2
- 230000001629 suppression Effects 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- UCKMPCXJQFINFW-UHFFFAOYSA-N Sulphide Chemical compound [S-2] UCKMPCXJQFINFW-UHFFFAOYSA-N 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 238000001978 electrochemical passivation Methods 0.000 description 1
- 238000005566 electron beam evaporation Methods 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- 238000001659 ion-beam spectroscopy Methods 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 239000011241 protective layer Substances 0.000 description 1
- 230000002441 reversible effect Effects 0.000 description 1
- 238000005070 sampling Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
Images
Classifications
-
- H01L31/1868—
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/0217—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
- H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
- H01L21/02321—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment introduction of substances into an already existing insulating layer
-
- H01L31/0216—
-
- H01L31/09—
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Photometry And Measurement Of Optical Pulse Characteristics (AREA)
- Light Receiving Elements (AREA)
Abstract
The invention discloses a preparation method of a detector for inhibiting side wall leakage current by using passivation layer electronegation, which comprises the following steps: providing an infrared material, wherein a mesa mask is formed on the infrared material; etching the infrared material by adopting an inductive coupling plasma method; removing the mesa mask by dry etching or wet etching to form the infrared material with a mesa structure; depositing a dielectric film on the infrared material with the mesa structure to form a passivation layer with the mesa structure; according to the thickness of the mesa side wall of the passivation layer with the mesa structure, carrying out element doping on the passivation layer with the mesa structure; and after the passivation layer with the mesa structure is subjected to element doping, performing rapid thermal annealing treatment to obtain the detector for inhibiting the side wall leakage current by using the negative electrification of the passivation layer.
Description
Technical Field
The invention relates to the technical field of semiconductors, in particular to a preparation method of a detector for inhibiting side wall leakage current by using negative electrification of a passivation layer.
Background
The side wall leakage current of the detector is a component of the dark current of the whole device, and especially for narrow-bandgap devices, the suppression of the mesa side wall leakage current becomes an important means for improving the impedance performance of the device. At present, the suppression of the leakage current on the surface of the side wall of the detector mesa is mainly realized by reducing the density of surface states, and the realization modes comprise that surface atoms form a sulfide layer, a protective layer of special photoresist such as SU8, polyimide and the like is spin-coated, a dielectric film is deposited on the side wall, and a side wall wide band gap material grows epitaxially. In addition, the effect of inhibiting the leakage current of the side wall can be improved under certain reverse bias by combining the side wall and the additional gate electrode. However, the effect of suppressing the surface leakage current is limited in each process, and therefore, it is useful to develop a detector that can further enhance the effect of suppressing the sidewall surface leakage current.
Disclosure of Invention
In view of this, in order to further improve the effect of suppressing the side wall surface leakage current of the detector, the invention provides a method for manufacturing a detector for suppressing the side wall leakage current by using a negative electrochemical passivation layer.
The invention provides a preparation method of a detector for inhibiting side wall leakage current by using passivation layer negative electrification, which comprises the following steps: providing an infrared material, wherein a mesa mask is formed on the infrared material; etching the infrared material by adopting an inductive coupling plasma method; removing the mesa mask by dry etching or wet etching to form the infrared material with a mesa structure; depositing a dielectric film on the infrared material with the mesa structure to form a passivation layer with the mesa structure; according to the thickness of the mesa side wall of the passivation layer with the mesa structure, carrying out element doping on the passivation layer with the mesa structure; and after the passivation layer with the mesa structure is subjected to element doping, performing rapid thermal annealing treatment to obtain the detector for inhibiting the side wall leakage current by using the negative electrification of the passivation layer.
In some embodiments, the mesa mask comprises SiO2And (5) mesa masking.
In some embodiments, the residual thickness of the mesa mask is 0-400 nm after the infrared material is etched by using an inductively coupled plasma method.
In some embodiments, the dry etching comprises inductively coupled plasma etching, reactive ion etching; the wet etching is chemical etching with etching solution prepared from hydrofluoric acid, ammonium fluoride and deionized water.
In some embodiments, the mesa sidewalls of the infrared material with the mesa structure form an angle θ with the horizontal mesa of between 70 ° and 80 °.
In some embodiments, the dielectric film has a thickness of 500 to 1500 nm.
In some embodiments, the dielectric film is SiO2Or SixNy。
In some embodiments, the elemental doping is doping an element that can replace the silicon element in the electrolyte membrane to form an acceptor impurity.
In some embodiments, the element doping of the passivation layer with the mesa structure is performed by ion implantation with an implantation dose of 5 × 1010～1014cm-2In the meantime.
In some embodiments, the condition of the rapid thermal annealing is determined according to the implantation dosage of the ion implantation, the annealing temperature is less than or equal to 400 ℃, and the annealing time is less than or equal to 100 s.
The invention provides a detector obtained by the preparation method.
The invention provides a preparation method of a detector for inhibiting side wall leakage current by using negative electrification of a passivation layer. And doping the passivation layer under different doping conditions by an ion implantation process. The element doping enables the passivation layer formed by depositing the dielectric film to be negatively electrified from a negatively charged center, can inhibit leakage current formed by the negatively charged center caused by surface states, further can improve the inhibition effect of the leakage current on the surface of the side wall, and improves the impedance performance of the device.
Drawings
FIG. 1 is a flowchart of a method for fabricating a detector for suppressing a side-wall leakage current using a passivation layer negative current according to an embodiment of the present invention;
FIG. 2 is a schematic structural diagram of an infrared material with a mesa mask formed thereon according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram after etching an infrared material according to an embodiment of the present invention;
FIG. 4 is a schematic structural diagram of an infrared material after removing the mesa mask according to an embodiment of the present invention;
fig. 5 is a schematic structural diagram of a passivation layer formed by depositing a dielectric film according to an embodiment of the present invention.
[ description of reference ]
10-an infrared material; 20-mesa mask; 30-infrared material with mesa structure; 40-a dielectric thin film; theta-the included angle formed between the side wall of the table top structure and the horizontal table top; 301 — upper contact layer; 302-lower contact layer
Detailed Description
In order that the objects, technical solutions and advantages of the present invention will become more apparent, the present invention will be further described in detail with reference to the accompanying drawings in conjunction with the following specific embodiments.
In the related art, the mesa sidewall leakage current is suppressed by depositing a dielectric film on the sidewall of the detector mesa, but the effect of this method on suppressing the mesa sidewall leakage current is limited. The invention provides a preparation method of a detector for inhibiting side wall leakage current by using passivation layer negative electrification.
The invention provides a preparation method of a detector for inhibiting side wall leakage current by using passivation layer negative electrification, which comprises the following steps: providing an infrared material, wherein a mesa mask is formed on the infrared material; etching the infrared material by adopting an inductive coupling plasma method; removing the mesa mask by dry etching or wet etching to form the infrared material with a mesa structure; depositing a dielectric film on the infrared material with the mesa structure to form a passivation layer with the mesa structure; according to the thickness of the mesa side wall of the passivation layer with the mesa structure, carrying out element doping on the passivation layer with the mesa structure; and after the passivation layer with the mesa structure is subjected to element doping, performing rapid thermal annealing treatment to obtain the detector for inhibiting the side wall leakage current by using the negative electrification of the passivation layer.
Fig. 1 is a flowchart of a method for manufacturing a detector for suppressing a side wall leakage current by using a negative electrification of a passivation layer according to an embodiment of the present invention. As shown in fig. 1, the preparation method includes operations S101 to S106.
Fig. 2 is a schematic structural diagram of an infrared material with a mesa mask formed thereon according to an embodiment of the present invention.
In operation S101, an infrared material having a mesa mask formed thereon is provided.
As shown in fig. 2, a mesa mask (20) is formed over the infrared material (10).
According to an embodiment of the invention, the infrared material (10) may be one of: short wave infrared material, medium wave infrared material, long wave infrared material, very long wave infrared material.
According to an embodiment of the invention, the mesa mask (20) may be SiO2And (5) mesa masking.
Fig. 3 is a schematic structural diagram after the infrared material is etched according to the embodiment of the present invention.
In operation S102, the infrared material is etched by using an inductively coupled plasma method, so as to obtain the structure shown in fig. 3.
As can be seen from fig. 3, after the infrared material is etched by using the inductively coupled plasma method, the infrared material (30) with the mesa structure is formed, and the mesa mask (20) is disposed on the infrared material (30) with the mesa structure.
According to the embodiment of the invention, after the infrared material (10) is etched by adopting an inductively coupled plasma method, the residual thickness of the mesa mask (20) is 0-400 nm.
According to the embodiment of the invention, the infrared material (10) is etched by adopting an inductively coupled plasma method to reach the etching depth of the lower contact layer 302 of the infrared material (10).
Fig. 4 is a schematic structural diagram of the infrared material after the mesa mask is removed according to the embodiment of the present invention.
In operation S103, the mesa mask (20) is removed using dry etching or wet etching to form the infrared material (30) with the mesa structure.
As shown in fig. 4, the infrared material (30) with the mesa structure is formed, and an included angle between the mesa sidewall of the infrared material (30) with the mesa structure and the horizontal mesa is θ.
According to an embodiment of the invention, the dry etching includes inductively coupled plasma etching, reactive ion etching.
According to the embodiment of the invention, the wet etching is chemical etching by using an etching solution prepared from hydrofluoric acid, ammonium fluoride and deionized water.
According to the embodiment of the invention, in the etching solution of the wet etching, the ratio of hydrofluoric acid, ammonium fluoride and deionized water can be 1:4:5, wherein the hydrofluoric acid is analytically pure (the content is not less than 40%), and the ammonium fluoride solution is of MOS grade (the content is 40% +/-1%).
According to the embodiment of the invention, the included angle theta formed by the mesa side wall of the infrared material (30) with the mesa structure and the horizontal mesa is 70-80 degrees, for example, 70 degrees, 72 degrees, 75 degrees, 78 degrees and 80 degrees.
Fig. 5 is a schematic structural diagram of a passivation layer formed by depositing a dielectric film according to an embodiment of the present invention. In operation S104, a dielectric film (40) is deposited over the mesa-structured infrared material (30) to form a passivation layer with a mesa structure.
As shown in fig. 5, a dielectric film (40) is deposited on mesa sidewalls and horizontal mesas of infrared material (30) with mesa structures.
According to the embodiment of the invention, the thickness of the dielectric film (40) can be 500-1500 nm, for example, 500nm, 700nm, 1000nm, 1200nm, 1500 nm.
According to an embodiment of the present invention, the dielectric thin film (40) may be SiO2Or SixNy。
According to an embodiment of the invention, the dielectric film (40) may be deposited on the mesa-structured infrared material (30) in one of: plasma enhanced chemical vapor deposition, ion beam sputtering, electron beam evaporation.
In operation S105, the passivation layer with the mesa structure is doped with an element according to a thickness of a mesa sidewall of the passivation layer with the mesa structure.
According to an embodiment of the invention, the thickness of the dielectric film (40) on the mesa sidewalls is determined by sampling under a scanning electron microscope.
According to the embodiment of the present invention, the element doping is doping of an element capable of forming an acceptor impurity instead of a silicon element in the electrolyte thin film (40), and for example, boron element, aluminum element, gallium element, and indium element may be mentioned.
According to the embodiment of the invention, element doping of the passivation layer with the mesa structure is realized by means of ion implantation.
According to the embodiment of the invention, the implantation dosage of the ion implantation is 5 x 1010～1014cm-2May be, for example, 5 × 1010cm-2、1011cm-2、1012cm-2、1013cm-2、1014cm-2。
According to the embodiment of the invention, the deposition thickness d of the dielectric film (40) is determined by the projection range R of the ion implantation parameter under the target doping conditionpAnd range standard deviation Δ RpDetermining that d ═ Rp+4.3ΔRp。
In operation S106, after the passivation layer with the mesa structure is doped with the element, a rapid thermal annealing process is performed to obtain a detector that suppresses the sidewall leakage current by using negative electrification of the passivation layer.
According to the embodiment of the invention, the condition of the rapid thermal annealing is determined according to the implantation dosage of the ion implantation, and the annealing temperature is less than or equal to 400 ℃, for example, the annealing temperature can be 200 ℃, 250 ℃, 300 ℃, 350 ℃ and 400 ℃; the annealing time is 100 seconds or less, and may be 40 seconds, 60 seconds, 80 seconds, 90 seconds, or 100 seconds, for example.
The invention provides a detector obtained by the preparation method.
To more clearly illustrate the features of the present invention, the present invention will be further described with reference to an example of a method for fabricating a detector for suppressing a side wall leakage current by negatively electrifying a passivation layer.
Example 1
Taking one to form SiO2And etching the infrared material (10) in the pattern of the mesa mask (20) by adopting an inductively coupled plasma method to the depth of the infrared material (10) reaching the lower contact layer of the infrared material. Hydrofluoric acid, ammonium fluoride and deionized water in a ratio of 1:4:5 are used to prepare a BOE etching solution. Removing residual SiO by BOE corrosive solution2A mesa mask (20) forming an infrared material (30) with a mesa structure. Depositing a dielectric film (40) on the mesa-structured infrared material (30) by plasma enhanced chemical vapor deposition, wherein the dielectric film (40) is SiO2. The deposited dielectric film (40) was sampled, and the thickness of the dielectric film (40) on the mesa side wall was measured by a scanning electron microscope to be 600 nm. After the deposition of the dielectric film (40), the element doping is carried out by ion implantation. Determining the implantation dose of the ion implantation to be 5 x 10 according to the measured thickness of the dielectric film (40) on the side wall of the mesa10cm-2The doping energy was 120 KeV. And after the passivation layer with the mesa structure is subjected to element doping, performing rapid thermal annealing treatment, wherein the annealing temperature is 400 ℃, and the annealing time is 90 s. After the annealing is finished, the detector for inhibiting the side wall leakage current by using the passivation layer negative electrification can be obtained.
The embodiment of the invention provides a preparation method of a detector for inhibiting side wall leakage current by using negative electrification of a passivation layer. And doping the passivation layer under different doping conditions by an ion implantation process. The element doping enables the passivation layer formed by depositing the dielectric film to be negatively electrified from a negatively charged center, can inhibit leakage current formed by the negatively charged center caused by surface states, further can improve the inhibition effect of the leakage current on the surface of the side wall, and improves the impedance performance of the device.
The above-mentioned embodiments are intended to illustrate the objects, technical solutions and advantages of the present invention in further detail, and it should be understood that the above-mentioned embodiments are only exemplary embodiments of the present invention and are not intended to limit the present invention, and any modifications, equivalents, improvements and the like made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (10)
1. A preparation method of a detector for inhibiting side wall leakage current by using passivation layer negative electrification is characterized by comprising the following steps:
providing an infrared material, wherein a mesa mask is formed on the infrared material;
etching the infrared material by adopting an inductive coupling plasma method;
removing the mesa mask by dry etching or wet etching to form the infrared material with a mesa structure;
depositing a dielectric film on the infrared material with the mesa structure to form a passivation layer with the mesa structure;
according to the thickness of the mesa side wall of the passivation layer with the mesa structure, carrying out element doping on the passivation layer with the mesa structure;
and carrying out rapid thermal annealing treatment after carrying out element doping on the passivation layer with the mesa structure to obtain the detector for inhibiting the side wall leakage current by using the negative electrification of the passivation layer.
2. The method of claim 1, wherein the mesa mask comprises SiO2And (5) mesa masking.
3. The method according to claim 1, wherein the residual thickness of the mesa mask is 0 to 400nm after the infrared material is etched by using an inductively coupled plasma method.
4. The method according to claim 1, wherein the dry etching includes inductively coupled plasma etching, reactive ion etching; the wet etching is chemical etching by using an etching solution prepared from hydrofluoric acid, ammonium fluoride and deionized water.
5. The preparation method of claim 1, wherein an included angle θ formed between the mesa sidewall of the infrared material with the mesa structure and the horizontal mesa is between 70 ° and 80 °.
6. The method according to claim 1, wherein the dielectric thin film has a thickness of 500 to 1500 nm.
7. The method according to claim 1, wherein the dielectric thin film is SiO2Or SixNy。
8. The production method according to claim 7, characterized in that the element doping is doping of an element capable of forming an acceptor impurity in place of a silicon element in the electrolyte thin film.
9. The method according to claim 1, wherein the doping the passivation layer with the mesa structure is performed by ion implantation at a dose of 5 x 1010～1014cm-2To (c) to (d);
the condition of the rapid thermal annealing is determined according to the implantation dosage of the ion implantation, the annealing temperature is less than or equal to 400 ℃, and the annealing time is less than or equal to 100 s.
10. A probe obtained by the production method according to any one of claims 1 to 9.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110388246.0A CN113113511B (en) | 2021-04-12 | 2021-04-12 | Preparation method of detector for inhibiting side wall leakage current by using passivation layer negative electrification |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110388246.0A CN113113511B (en) | 2021-04-12 | 2021-04-12 | Preparation method of detector for inhibiting side wall leakage current by using passivation layer negative electrification |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN113113511A true CN113113511A (en) | 2021-07-13 |
| CN113113511B CN113113511B (en) | 2022-07-26 |
Family
ID=76715907
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202110388246.0A Active CN113113511B (en) | 2021-04-12 | 2021-04-12 | Preparation method of detector for inhibiting side wall leakage current by using passivation layer negative electrification |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN113113511B (en) |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5821585A (en) * | 1993-09-29 | 1998-10-13 | Mitsubishi Denki Kabushiki Kaisha | Thin film transistor and manufacturing method thereof |
| US20060273421A1 (en) * | 2005-06-02 | 2006-12-07 | Fujitsu Limited | Semiconductor photodetector and method for manufacturing the same |
| US20100301309A1 (en) * | 2009-06-01 | 2010-12-02 | Tennant William E | Lateral collection architecture for sls detectors |
| US20170179185A1 (en) * | 2015-04-19 | 2017-06-22 | Semi Conductor Devices-An Elbit Systems-Rafael Partnership | Semiconductor device |
| CN109285913A (en) * | 2018-11-14 | 2019-01-29 | 中国电子科技集团公司第四十四研究所 | Low tracking current mesa-type photodetectors and preparation method thereof |
| CN110176507A (en) * | 2019-05-31 | 2019-08-27 | 厦门市三安集成电路有限公司 | Passivating structure and photodiode of a kind of table top PIN and preparation method thereof |
| US20200292391A1 (en) * | 2019-03-14 | 2020-09-17 | Fujitsu Limited | Infrared detector, imaging device including the same, and manufacturing method for infrared detector |
-
2021
- 2021-04-12 CN CN202110388246.0A patent/CN113113511B/en active Active
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5821585A (en) * | 1993-09-29 | 1998-10-13 | Mitsubishi Denki Kabushiki Kaisha | Thin film transistor and manufacturing method thereof |
| US20060273421A1 (en) * | 2005-06-02 | 2006-12-07 | Fujitsu Limited | Semiconductor photodetector and method for manufacturing the same |
| US20100301309A1 (en) * | 2009-06-01 | 2010-12-02 | Tennant William E | Lateral collection architecture for sls detectors |
| US20170179185A1 (en) * | 2015-04-19 | 2017-06-22 | Semi Conductor Devices-An Elbit Systems-Rafael Partnership | Semiconductor device |
| CN109285913A (en) * | 2018-11-14 | 2019-01-29 | 中国电子科技集团公司第四十四研究所 | Low tracking current mesa-type photodetectors and preparation method thereof |
| US20200292391A1 (en) * | 2019-03-14 | 2020-09-17 | Fujitsu Limited | Infrared detector, imaging device including the same, and manufacturing method for infrared detector |
| CN110176507A (en) * | 2019-05-31 | 2019-08-27 | 厦门市三安集成电路有限公司 | Passivating structure and photodiode of a kind of table top PIN and preparation method thereof |
Also Published As
| Publication number | Publication date |
|---|---|
| CN113113511B (en) | 2022-07-26 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN110600542B (en) | GaN-based radio frequency device with II-shaped gate and preparation method thereof | |
| CN106972056B (en) | Anti- proton irradiation InP-base HEMT device and its processing method based on BCB passivation | |
| CN109103245A (en) | A kind of double-T shaped grid and production method and application | |
| US11257935B2 (en) | Gan rectifier suitable for operating under 35GHZ alternating-current frequency, and preparation method therefor | |
| US20200006529A1 (en) | Method for manufacturing isolation structure for ldmos | |
| CN112117351B (en) | Method for leading out electrical properties of mercury cadmium telluride pn junction and detector chip | |
| CN110854222B (en) | Double-sided preparation method of drift detector and drift detector | |
| CN107293482B (en) | Method for manufacturing gate electrode of gallium nitride high electron mobility transistor | |
| CN103451611B (en) | Be applicable to the low-leakage current HfO of gate dielectric layer 2the preparation method of film | |
| CN110875372B (en) | Field effect transistor and manufacturing method thereof | |
| US20090321833A1 (en) | VERTICAL PROFILE FinFET GATE FORMED VIA PLATING UPON A THIN GATE DIELECTRIC | |
| CN113113511B (en) | Preparation method of detector for inhibiting side wall leakage current by using passivation layer negative electrification | |
| CN111579609B (en) | PH sensor based on strontium titanate/lanthanum aluminate heterojunction and preparation method thereof | |
| CN104576832B (en) | Blocking impurity band detector manufacturing method based on SOI | |
| CN104576335A (en) | Composite mask for high-energy ion implantation | |
| CN107452833B (en) | The preparation method and detector of the blocking impurity band detector of micropore negative electrode structure | |
| CN102916043B (en) | MOS-HEMT device and manufacturing method thereof | |
| CN213782022U (en) | Metal contact structure of two-dimensional semiconductor material | |
| CN111129164B (en) | Schottky diode and preparation method thereof | |
| CN104616974A (en) | Removal method of composite mask for injecting high-energy particles | |
| CN113809170B (en) | Nitride device with low contact resistance and high Al component and preparation method thereof | |
| CN100446184C (en) | Polycrystalline silicon grating doping method | |
| CN217847966U (en) | Tube core of front metallization of 4H-SiC JBS diode | |
| CN113314416B (en) | Preparation method of upper dip angle structure of GaN-HEMT device | |
| WO2015110069A1 (en) | Ono structure-based sic terminal structure preparation method |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |