CN113113342B - Wafer bearing device and etching equipment - Google Patents
Wafer bearing device and etching equipment Download PDFInfo
- Publication number
- CN113113342B CN113113342B CN202010031142.XA CN202010031142A CN113113342B CN 113113342 B CN113113342 B CN 113113342B CN 202010031142 A CN202010031142 A CN 202010031142A CN 113113342 B CN113113342 B CN 113113342B
- Authority
- CN
- China
- Prior art keywords
- cover plate
- tray
- wafer
- gap
- insulating
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
- H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67017—Apparatus for fluid treatment
- H01L21/67063—Apparatus for fluid treatment for etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/673—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere using specially adapted carriers or holders; Fixing the workpieces on such carriers or holders
- H01L21/67303—Vertical boat type carrier whereby the substrates are horizontally supported, e.g. comprising rod-shaped elements
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
- Drying Of Semiconductors (AREA)
Abstract
The invention belongs to the field of semiconductor manufacturing, and discloses a wafer bearing device and etching equipment, wherein the wafer bearing device comprises a tray on which a wafer is placed and a cover plate which is arranged on the tray and presses the wafer, and a capacitor is arranged between the tray and the cover plate in an insulating way. According to the invention, the capacitor is arranged and formed between the tray and the cover plate in an insulating way, so that the strength and thickness of a sheath layer formed on the cover plate by the radio frequency system can be weakened, the additional electric field force generated at the edge of the wafer and deflected towards the direction of the cover plate can be further reduced, the deflection of charged particles in the etching process can be weakened, the pattern distortion in the etching process can be controlled, the etching uniformity of the edge of the wafer can be effectively improved, and the edge pattern distortion can be reduced or even completely eliminated.
Description
Technical Field
The present invention relates to the field of semiconductor manufacturing, and in particular, to a wafer carrier and etching apparatus.
Background
The patterned sapphire substrate (Patterned Sapphire Substrate) technology is a mainstream substrate technology in the field of LED illumination, can effectively reduce epitaxial crystal defects, improve epitaxial quality, and meanwhile, the external quantum extraction rate is improved and the light output direction is regulated and controlled to a certain extent through pattern parameter setting.
At present, the main stream preparation mode of the patterned sapphire substrate is final processing of patterning by adopting ICP etching, and the processing process of the sapphire wafer by ICP etching equipment also relates to a bearing device which is used for bearing and clamping the sapphire wafer so as to keep the required process state in an etching process cavity.
Fig. 1 is a schematic diagram of a currently mainstream carrying device, which comprises a tray 101, an annular cover plate 102, screws 103, a sealing ring 104 and other parts, wherein the tray 101 and the cover plate 102 are made of aluminum materials, a boss 105 is arranged on the tray 101, a groove for placing the sealing ring 104 and a through hole 106 penetrating the boss 105 are formed in the boss 105, the screws 103 are generally made of steel or other hard materials, and the sealing ring 104 is generally made of rubber with high F content. The tray 101 is closely contacted with the cover plate 102, the cover plate 102 presses the wafer 107 through a plurality of pressing claws, the wafer 107 is kept sealed with the boss 105 through the sealing ring 104, and finally the tray 101, the cover plate 102, the wafer 107 and the sealing ring 104 are fastened through screws 103.
When the existing carrying device is used for etching, the edge of the wafer can be divided into two large areas, namely an edge area which is not contacted with the cover plate 102 by the wafer 107, and a pressing claw area which is contacted with the cover plate 102 by the wafer 107; the phenomenon of poor pattern distortion, namely poor pattern symmetry, exists at the edge of the wafer during and after etching, as shown in fig. 2, fig. 2 shows that after patterning of the sapphire wafer, the central region, the edge region and the pinch region are compared, the edge region and the pinch region are obviously distorted, the cover plate 102 is conducted in contact with the tray 101, the cover plate 102 surface and the wafer 107 surface generate a sheath layer (namely an electric field for accelerating charged particles) under the action of radio frequency, so that a charge enrichment region is formed, a potential difference is formed between the cover plate 102 surface and the wafer 107 surface due to different intensities of the charge enrichment region formed at the surface, and then an additional electric field force (namely an electric field component Ex shown in fig. 3) deflected towards the cover plate 102 is generated at the edge of the wafer 107, the movement direction of the charged particles is changed, the charged particles are deflected, and the larger the electric field component Ex is, the more the charged particles are deflected seriously, the perpendicularity in the etching process is poorer, so that the pattern of the edge region and the pinch region is severely distorted, and the epitaxial crystal growth is seriously influenced, and the epitaxial quality is seriously influenced.
Disclosure of Invention
The invention aims to provide a wafer bearing device and etching equipment, which can effectively improve the etching uniformity of the wafer edge and reduce or even completely eliminate the distortion of an edge pattern.
To achieve the purpose, the invention adopts the following technical scheme:
the wafer bearing device comprises a tray on which a wafer is placed and a cover plate which is arranged on the tray and presses the wafer, wherein a capacitor is arranged between the tray and the cover plate in an insulating way.
Preferably, a gap is formed between the tray and the cover plate, and is insulated by the gap.
Preferably, the tray and the cover plate are connected through a fastener, and the fastener is insulated from at least one of the tray and the cover plate.
Preferably, the gap is filled with an insulating gas or an insulating material.
Preferably, the surfaces of the tray and the cover plate forming the gap are each attached with an insulating film layer.
Preferably, the thickness of the insulating film layer on the surface of the tray forming the gap is a first thickness, the thickness of the insulating film layer on the surface of the cover plate forming the gap is a second thickness, and the distance of the gap is the sum of the first thickness and the second thickness.
Preferably, an insulating block is arranged between the tray and the cover plate, and the insulating block is used for supporting the cover plate.
Preferably, the gap is greater than or equal to 1 micron.
The invention also provides etching equipment comprising the wafer bearing device.
The invention has the beneficial effects that: the capacitor is arranged and formed between the tray and the cover plate in an insulating way, so that the strength and the thickness of a sheath layer formed on the cover plate by the radio frequency system can be weakened, the additional electric field force generated at the edge of the wafer and deflected towards the direction of the cover plate can be further reduced, the deflection of charged particles in the etching process can be weakened, the distortion of patterns in the etching process can be controlled, the etching uniformity of the edge of the wafer can be effectively improved, and the distortion of the patterns at the edge can be reduced or even completely eliminated.
Drawings
FIG. 1 is a schematic view of a prior art carrying device;
FIG. 2 is a pattern of 300 μm at the front end of a wafer chuck region during use of a prior art carrier;
FIG. 3 is a schematic diagram of the electric field components at the cover press jaw of the prior art;
FIG. 4 is a schematic diagram of a wafer carrier according to the present invention;
FIG. 5 is a schematic diagram of the electric field components at the cover press jaw provided by the present invention;
FIG. 6 is a schematic view of another wafer carrier apparatus according to the present invention;
FIG. 7 is a schematic view of a third wafer carrier apparatus according to the present invention;
FIG. 8 is a schematic diagram of a fourth wafer carrier apparatus according to the present invention;
FIG. 9 is a schematic diagram of a fifth wafer carrier apparatus according to the present invention;
FIG. 10 is a schematic diagram of a sixth wafer carrier apparatus according to the present invention;
FIG. 11 is a schematic view of a seventh wafer carrier apparatus according to the present invention;
FIG. 12 is a schematic view of an eighth wafer carrier apparatus according to the present invention;
FIG. 13 is a pattern of 300 μm at the front end of the wafer chuck region when the wafer carrier of the present invention is in use.
In the figure:
1. a tray; 11. a boss; 12. a through hole; 2. a cover plate; 21. a pressing claw; 3. a fastener; 4. an insulating block; 5. a seal ring; 6. an insulating layer; 10. a wafer;
101. a tray; 102. a cover plate; 103. a screw; 104. a seal ring; 105. a boss; 106. a through hole; 107. a wafer.
Detailed Description
The invention is described in further detail below with reference to the drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting thereof. It should be further noted that, for convenience of description, only some, but not all of the structures related to the present invention are shown in the drawings.
In the description of the present invention, unless explicitly stated and limited otherwise, the terms "connected," "connected," and "fixed" are to be construed broadly, and may be, for example, fixedly connected, detachably connected, or integrally formed; can be mechanically or electrically connected; can be directly connected or indirectly connected through an intermediate medium, and can be communicated with the inside of two elements or the interaction relationship of the two elements. The specific meaning of the above terms in the present invention will be understood in specific cases by those of ordinary skill in the art.
In the present invention, unless expressly stated or limited otherwise, a first feature "above" or "below" a second feature may include both the first and second features being in direct contact, as well as the first and second features not being in direct contact but being in contact with each other through additional features therebetween. Moreover, a first feature being "above," "over" and "on" a second feature includes the first feature being directly above and obliquely above the second feature, or simply indicating that the first feature is higher in level than the second feature. The first feature being "under", "below" and "beneath" the second feature includes the first feature being directly under and obliquely below the second feature, or simply means that the first feature is less level than the second feature.
In the description of the present embodiment, the terms "upper", "lower", "right", etc. orientation or positional relationship are based on the orientation or positional relationship shown in the drawings, and are merely for convenience of description and simplicity of operation, and do not indicate or imply that the apparatus or elements referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus should not be construed as limiting the invention. Furthermore, the terms "first," "second," and the like, are used merely for distinguishing between descriptions and not for distinguishing between them.
The invention provides a wafer bearing device, as shown in fig. 4, which comprises a tray 1 and a cover plate 2, wherein the tray 1 is provided with a boss 11, a through hole 12 is arranged at the boss 11 in a penetrating way, a groove is arranged on the upper end surface of the boss 11, a sealing ring 5 is arranged in the groove, and a wafer 10 can be arranged on the sealing ring 5. The cover plate 2 is covered on the tray 1, and a pressing claw 21 extends from the inner side of the cover plate 2, and the pressing claw 21 can press the wafer 10 on the tray 1 for subsequent rf etching.
In this embodiment, the tray 1 and the cover 2 are insulated from each other to form a capacitor. The formation of this capacitance can weaken the electric field component Ex at the presser finger 21, and thus the deflection of charged particles during etching, so that the image distortion at the edge of the wafer 10 is reduced, weakened or completely eliminated.
In this embodiment, specifically, as shown in fig. 5, a capacitor is arranged and formed between the tray 1 and the cover plate 2 in an insulating manner, when rf energy acts on the cover plate 2 and the wafer 10, charges are accumulated on the surfaces of the cover plate 2 and the wafer 10 to form a charge enrichment region, and due to the formation of the capacitor, the intensities of the charge enrichment regions formed by the accumulated charges on the surfaces of the cover plate 2 and the wafer 10 are not greatly different or identical, so that the potential difference between the cover plate 2 and the wafer 10 is reduced or even eliminated, that is, an additional electric field force (i.e., an electric field component Ex shown in fig. 5) generated at the edge of the wafer 10 and deflected towards the cover plate 2 is reduced, so that deflection of charged particles in an etching process is further reduced, the charged particles are accelerated to bombard in an electric field component Ey direction, verticality of the charged particle motion is improved, etching effect is improved, etching uniformity at the edge of the wafer 10 is improved, and edge pattern distortion is reduced or even completely eliminated.
In this embodiment, a gap is formed between the tray 1 and the cover plate 2, and the gap insulates the tray 1 and the cover plate 2, that is, a capacitance is formed between the tray 1 and the cover plate 2 through the gap between the tray 1 and the cover plate 2, so that the strength and thickness of the charge enrichment region on the surface of the cover plate 2 are reduced, and the strength of the charge enrichment region on the surface of the wafer 10 is slightly different from or the same as that of the charge enrichment region, so as to weaken the deflection of charged particles in the etching process.
In this embodiment, the gap between the tray 1 and the cover 2 is greater than or equal to 1 μm, so as to ensure that a capacitance can be formed between the tray 1 and the cover 2, so as to reduce deflection of charged particles during etching.
As shown in fig. 4, the tray 1 and the cover plate 2 may be connected by a fastener 3 in the present embodiment, and the cover plate 2 is enabled to press the wafer 10. In this embodiment, the fastening member 3 may be a screw or other fastening structure capable of connecting the tray 1 and the cover 2 and forming a gap. In addition, in this embodiment, the fastener 3 is made of an insulating material (such as quartz or hard plastic), that is, the cover plate 2 and the tray 1 are not electrically conductive through the fastener 3. When the tray 1 and the cover plate 2 are connected, a countersunk hole can be formed in the tray 1, a threaded hole is formed in the cover plate 2, the tray 1 is penetrated through by the fastener 3 and is in threaded connection with the cover plate 2, and a certain distance is reserved between the tray 1 and the cover plate 2 to form a gap.
In this embodiment, the gap may be filled with an insulating gas or an insulating material, so that insulation between the tray 1 and the cover plate 2 can be further ensured by filling the gap with the insulating gas or the insulating material, and the gap between the tray 1 and the cover plate 2 can be stabilized, so that the capacitance value of the formed capacitor is stabilized. Alternatively, the whole wafer carrying device may be placed in a vacuum environment, that is, the gap may be in a vacuum state, and the capacitor may be formed. Of course, the capacitor can also be formed by blocking the insulating material at the ends of the two sides of the gap and then evacuating the interior of the gap.
In another embodiment, a countersunk hole may be formed on the tray 1, a threaded hole is formed on the cover plate 2, the fastener 3 passes through the tray 1 and is in threaded connection with the cover plate 2, and a certain distance is reserved between the tray 1 and the cover plate 2 to form a gap. The fastener 3 is not made of an insulating material, and in order to ensure insulation between the tray 1 and the cover plate 2, an insulating layer 6 may be provided between the fastener 3 and the countersunk hole of the tray 1, as shown in fig. 6 and 7, and in order to insulate the fastener 3 from the tray 1, the cover plate 2 is insulated from the tray 1.
In the third embodiment, as shown in fig. 8, a countersunk hole is formed in the tray 1, a blind hole is formed in the cover plate 2, an insulating layer 6 is disposed in the blind hole, and a fastener 3 passes through the tray 1 and is in threaded connection with the insulating layer 6, so that the cover plate 2 is insulated from the tray 1 while the tray 1 and the cover plate 2 are fixed. As shown in fig. 9, the insulating layer 6 may be disposed between the fastener 3 and the countersunk hole of the tray 1, and the fastener 3, the tray 1 and the cover plate 2 are all in an insulating state.
In a fourth embodiment, an insulating block 4 (shown in fig. 10-12) may be further provided between the tray 1 and the cover plate 2 on the basis of the wafer carrying device shown in fig. 7-9, and the thickness of the insulating block 4 may be slightly greater than or equal to the distance of the gap, which can fix the gap between the tray 1 and the cover plate 2 and can distribute the force of the fastener 3 conducted between the tray 1 and the cover plate 2. In addition, the insulating block 4 is arranged to avoid conduction between the tray 1 and the cover plate 2. In this embodiment, the insulating block 4 may be a ring structure, which is sleeved outside the fastener 3, or may be a block structure, and is directly disposed between the tray 1 and the cover plate 2. When the insulating block 4 is of an annular structure, the insulating sealing ring 5 can be used for replacing the insulating block 4 to fix the gap between the tray 1 and the cover plate 2.
In the fifth embodiment, the insulating film layer may be attached to each of the surfaces of the tray 1 and the cover plate 2 forming the gap, and in this case, the thickness of the insulating film layer on the surface of the tray 1 forming the gap may be referred to as a first thickness, the thickness of the insulating film layer on the surface of the cover plate 2 forming the gap may be referred to as a second thickness, and the distance of the gap may be the sum of the first thickness and the second thickness. That is, it is understood that the insulating film layer on the tray 1 and the insulating film layer on the cover plate 2 fill the gap. Through the setting of insulating film layer, can effectively realize the insulation between tray 1 and the apron 2 to make and form electric capacity between tray 1 and the apron 2.
According to the wafer carrying device, the capacitor is arranged and formed between the tray 1 and the cover plate 2 in an insulating manner, so that the strength and the thickness of a sheath layer formed on the cover plate 2 by the radio frequency system can be weakened, the additional electric field force generated at the edge of the wafer 10 and deflected towards the direction of the cover plate 2 is further reduced, the deflection of charged particles in the etching process is weakened, the distortion of patterns in the etching process is controlled, the etching uniformity of the edge of the wafer 10 is effectively improved, and the distortion of the patterns at the edge is reduced or even completely eliminated. After the wafer 10 is carried by the wafer carrying device in this embodiment and etched, the pattern morphology of 300 μm at the front end of the pressing claw area of the wafer 10 is as shown in fig. 13, and no pattern distortion is generated basically or the generated pattern distortion is small, so that the influence on the epitaxial crystal growth in the epitaxial process is reduced, and the epitaxial quality is improved.
The invention also provides etching equipment which comprises the wafer carrying device and can improve the etching uniformity of the edge of the wafer 10 and reduce or even completely eliminate the distortion of the edge pattern.
It is to be understood that the above examples of the present invention are provided for clarity of illustration only and are not limiting of the embodiments of the present invention. Various obvious changes, rearrangements and substitutions can be made by those skilled in the art without departing from the scope of the invention. It is not necessary here nor is it exhaustive of all embodiments. Any modification, equivalent replacement, improvement, etc. which come within the spirit and principles of the invention are desired to be protected by the following claims.
Claims (6)
1. The wafer carrying device is characterized by comprising a tray (1) and a cover plate (2), wherein the tray (1) is provided with a wafer (10), the cover plate (2) is arranged on the tray (1) and presses the wafer (10), and the tray (1) and the cover plate (2) are arranged in an insulating way to form a capacitor;
a gap is formed between the tray (1) and the cover plate (2), and is insulated by the gap;
the tray (1) is provided with a counter-sunk hole, the cover plate (2) is provided with a threaded hole, a fastener (3) penetrates through the tray (1) and is in threaded connection with the cover plate (2), a certain distance is reserved between the tray (1) and the cover plate (2) to form the gap, and the fastener (3) is insulated from at least one of the tray (1) and the cover plate (2);
an insulating block (4) is arranged between the tray (1) and the cover plate (2), the thickness of the insulating block (4) is slightly larger than or equal to the distance between the gaps, and the insulating block (4) is used for supporting the cover plate (2).
2. Wafer carrier according to claim 1, characterized in that the insulating block (4) is arranged in the gap and can be filled with insulating gas, and that the space between the tray (1) and the cover plate (2) is insulated by the insulating block (4) and the insulating gas.
3. Wafer carrying device according to claim 1, characterized in that the surfaces of the tray (1) and the cover plate (2) forming the gap are each provided with an insulating film layer.
4. A wafer carrier apparatus according to claim 3, wherein the thickness of the insulating film layer on the surface of the tray (1) forming the gap is a first thickness, the thickness of the insulating film layer on the surface of the cover plate (2) forming the gap is a second thickness, and the distance of the gap is the sum of the first thickness and the second thickness.
5. The wafer carrier apparatus of claim 1, wherein the gap is greater than or equal to 1 micron.
6. An etching apparatus comprising a wafer carrier as claimed in any one of claims 1 to 5.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010031142.XA CN113113342B (en) | 2020-01-13 | 2020-01-13 | Wafer bearing device and etching equipment |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010031142.XA CN113113342B (en) | 2020-01-13 | 2020-01-13 | Wafer bearing device and etching equipment |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN113113342A CN113113342A (en) | 2021-07-13 |
| CN113113342B true CN113113342B (en) | 2023-08-25 |
Family
ID=76708862
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202010031142.XA Active CN113113342B (en) | 2020-01-13 | 2020-01-13 | Wafer bearing device and etching equipment |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN113113342B (en) |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5292399A (en) * | 1990-04-19 | 1994-03-08 | Applied Materials, Inc. | Plasma etching apparatus with conductive means for inhibiting arcing |
| JP2001144069A (en) * | 1999-09-03 | 2001-05-25 | Ulvac Japan Ltd | Plasma etching apparatus for film-shaped substrate |
| CN106571322A (en) * | 2015-10-08 | 2017-04-19 | 北京北方微电子基地设备工艺研究中心有限责任公司 | Cover plate, bearing device and plasma processing apparatus |
| CN106876315A (en) * | 2015-12-14 | 2017-06-20 | 北京北方微电子基地设备工艺研究中心有限责任公司 | Pressure ring, pre-cleaning cavity and semiconductor processing equipment |
-
2020
- 2020-01-13 CN CN202010031142.XA patent/CN113113342B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5292399A (en) * | 1990-04-19 | 1994-03-08 | Applied Materials, Inc. | Plasma etching apparatus with conductive means for inhibiting arcing |
| JP2001144069A (en) * | 1999-09-03 | 2001-05-25 | Ulvac Japan Ltd | Plasma etching apparatus for film-shaped substrate |
| CN106571322A (en) * | 2015-10-08 | 2017-04-19 | 北京北方微电子基地设备工艺研究中心有限责任公司 | Cover plate, bearing device and plasma processing apparatus |
| CN106876315A (en) * | 2015-12-14 | 2017-06-20 | 北京北方微电子基地设备工艺研究中心有限责任公司 | Pressure ring, pre-cleaning cavity and semiconductor processing equipment |
Also Published As
| Publication number | Publication date |
|---|---|
| CN113113342A (en) | 2021-07-13 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP5788182B2 (en) | Radiation detector | |
| KR100511854B1 (en) | Electrostatic chuck device | |
| US3661761A (en) | Rf sputtering apparatus for promoting resputtering of film during deposition | |
| CN105529356B (en) | A kind of Flied emission transistor with vertical structure cylindrical conductive channel | |
| US10042059B2 (en) | Radiation detector using gas amplification, manufacturing method for radiation detector using gas amplification, and method for detecting radiation by radiation detector using gas amplification | |
| CN113113342B (en) | Wafer bearing device and etching equipment | |
| KR101682521B1 (en) | Apparatus for observing specimen, Cover assembly And Method for observing specimen | |
| CN104299988A (en) | Nano vacuum triode with planar emitting cathode and manufacturing method thereof | |
| WO2019027305A1 (en) | Method for manufacturing ultrasonic fingerprint sensor by using nanorod structure | |
| JP2002009043A (en) | Etching device and manufacturing method of semiconductor device using it | |
| CN106128906B (en) | Vertical type graphene film field-transmitting cathode and preparation method thereof, electrode | |
| CN101627461B (en) | Edge electrodes with variable power | |
| JP2023533099A (en) | Method and apparatus for transferring transfer layer | |
| CN104517797A (en) | Plasma treatment device | |
| JP2007208095A (en) | Stencil mask | |
| CN105655281A (en) | Press ring, bearing apparatus and semiconductor processing device | |
| CN112652515B (en) | Plasma etching device and edge ring thereof | |
| CN109449069A (en) | A kind of vacuum channel nanometer triode of base modulation and preparation method thereof | |
| CN111524802B (en) | Polysilicon gate etching method for MOS device with SGT structure | |
| KR100486613B1 (en) | Elecron beam source module with carbon nano tube and method for fabricating the same | |
| KR101192967B1 (en) | Electrostatic chuck for manufacturing LCD | |
| CN109994351B (en) | Ion implanter and method for manufacturing ion implanter chamber | |
| Blackburn et al. | Tungsten pedestal structure for nanotriode devices | |
| JP2013171859A (en) | Dry etching apparatus and adjustment method of dry etching apparatus, and manufacturing method of semiconductor device | |
| KR100480745B1 (en) | Method of manufacturing of diamond field emitter |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| CB02 | Change of applicant information | ||
| CB02 | Change of applicant information |
Address after: No.4, Gongye North 2nd Road, Songshanhu high tech Industrial Development Zone, Dongguan, Guangdong 523000 Applicant after: Guangdong Zhongtu Semiconductor Technology Co.,Ltd. Address before: No.4, Gongye North 2nd Road, Songshanhu high tech Industrial Development Zone, Dongguan, Guangdong 523000 Applicant before: DONGGUAN SINOPATT SEMICONDUCTOR TECHNOLOGY CO.,LTD. |
|
| GR01 | Patent grant | ||
| GR01 | Patent grant |