CN113111323A

CN113111323A - FT2232H program programming equipment and method based on SHA-1 identity authentication

Info

Publication number: CN113111323A
Application number: CN202110400688.2A
Authority: CN
Inventors: 洪泽; 张铆; 陈振娇; 张猛华
Original assignee: CETC 58 Research Institute
Current assignee: CETC 58 Research Institute
Priority date: 2021-04-14
Filing date: 2021-04-14
Publication date: 2021-07-13
Anticipated expiration: 2041-04-14
Also published as: CN113111323B

Abstract

The invention discloses FT2232H program programming equipment and a method based on SHA-1 identity authentication, which belong to the field of embedded application, carry out system identity authentication based on SHA-1 encryption algorithm, and adopt a USB2.0 communication chip FT2232H of FTDI and SOC to design an efficient and safe memory programming system. The memory programming system is divided into an upper computer and a lower computer, the upper computer is connected with a TAP interface of the SOC by utilizing an FT2232H asynchronous FIFO interface, and the TAP interface is connected with an OCD module of the lower computer SOC to finish the mutual transmission of data. The upper computer generates an MAC value by using an SHA-1 encryption algorithm and completes identity confirmation with the lower computer, and the quick programming of various memories can be realized by calling a dynamic link library DLL provided by the upper computer.

Description

FT2232H program programming equipment and method based on SHA-1 identity authentication

Technical Field

The invention relates to the technical field of embedded application, in particular to FT2232H program programming equipment and a method based on SHA-1 identity authentication.

Background

With the rapid development of technologies such as the internet, the internet of things and the like, embedded applications are increasingly popularized, and the use of a Flash memory cannot be separated from high-definition televisions, robots and automobiles and airplanes. FLASH has been widely used in embedded systems due to its characteristics of large storage capacity, high density, etc.

Because the Flash chips produced on the production line have no application program, each Flash chip can be used after the program is burnt. At present, the FLASH memory is mainly used for storing application programs developed by users. However, due to the breakthrough of packaging technology in recent years, it is very inconvenient for users to write Flash memories, especially when Flash chips are already soldered on the circuit.

Disclosure of Invention

The invention aims to provide FT2232H program programming equipment and a method based on SHA-1 identity authentication to solve the problems in the background art.

In order to solve the technical problem, the invention provides an FT2232H program programming device based on SHA-1 identity authentication, which comprises:

the upper computer is compiled based on C #, and comprises a dynamic link library FTCJTAG.dll and a driver ftd2xx.dll which are provided by an application layer APP and FT 2232;

the JTAG emulator comprises a JTAG Port physical interface;

the lower computer comprises a test port controller TAP, an on-chip debugger OCD and an SOC core;

the upper computer sends an instruction to the test port controller TAP by controlling the JTAG simulator, the test port controller TAP continues sending an instruction to the on-chip debugger OCD after receiving the instruction, and the upper computer and the lower computer realize data interaction through the layer of the on-chip debugger OCD.

Optionally, a FT2232H chip is integrated in the physical interface of the JTAG port, and a signal is communicated with the test port controller TAP after passing through the level shift chip.

Optionally, the generating, by the upper computer, a MAC value by using an SHA-1 encryption algorithm and the completing, by the lower computer, identity verification includes: the upper computer has the functions of SHA-1 encryption algorithm calculation, ROMID storage and random number generation;

the upper computer uses 64-bit ROMID and 448-bit random numbers to carry out SHA-1 encryption to generate a 160-bit MAC value 1;

the upper computer sends 448bit random numbers to the lower computer;

the lower computer encrypts SHA-1 according to the 64-bit ROMID and 448-bit random numbers to generate a 160-bit MAC value 2 and sends the MAC value 2 to the upper computer;

and the upper computer compares the MAC value 2 sent by the lower computer with the MAC value 1 generated by the upper computer, if the MAC values are equal, the identity verification is passed, and if the MAC values are unsuccessful, the identity authentication is failed.

The invention also provides an FT2232H program programming method based on SHA-1 identity authentication, which comprises the following steps:

the upper computer is written by C #, initializes FT2232H, TAP and OCD based on FTCJTAG.dll function interface, and controls the on-chip debugger OCD to operate SOC core to perform identity verification and programming;

the lower computer comprises normal initialization of the lower computer and programming drive of various memories.

Optionally, the programming driver is customized according to a driver code generated by the SOC core, and is used for processing initialization, identity authenticity identification and package command judgment of the SOC core; the subprogram adds ID reading, whole erasing, sector erasing, null detecting, reading or programming commands according to the requirement of the upper computer.

In the FT2232H program programming device and method based on SHA-1 identity authentication provided by the invention, system identity authentication is carried out based on an SHA-1 encryption algorithm, and an efficient and safe memory programming system is designed by adopting an FTDI (flash translation and integration) USB2.0 communication chip FT2232H and an SOC (system on chip). The memory programming system is divided into an upper computer and a lower computer, the upper computer is connected with a TAP interface of the SOC by utilizing an FT2232H asynchronous FIFO interface, and the TAP interface is connected with an OCD module of the lower computer SOC to finish the mutual transmission of data. The upper computer generates an MAC value by using an SHA-1 encryption algorithm and completes identity confirmation with the lower computer, and the quick programming of various memories can be realized by calling a dynamic link library DLL provided by the upper computer.

Drawings

FIG. 1 is a block diagram of a FT2232H programming device based on SHA-1 authentication provided by the present invention;

FIG. 2 is a diagram of an identity authentication architecture of the present invention;

FIG. 3 is a schematic diagram of the upper computer working process according to the present invention;

fig. 4 is a schematic diagram of the working process of the lower computer of the present invention.

Detailed Description

The following describes in detail a FT2232H programming device and method based on SHA-1 identity authentication according to the present invention with reference to the accompanying drawings and specific embodiments. Advantages and features of the present invention will become apparent from the following description and from the claims. It is to be noted that the drawings are in a very simplified form and are not to precise scale, which is merely for the purpose of facilitating and distinctly claiming the embodiments of the present invention.

Example one

The embodiment of the invention discloses FT2232H program programming equipment and a method based on SHA-1 identity authentication, and the main idea is to perform the programming function more efficiently and safely.

The programming device structure is shown in fig. 1 and comprises an upper computer, a JTAG emulator and a lower computer. The upper computer part comprises an application layer APP, a dynamic link library FTCJTAG.dll and a driver ftd2xx.dll which are provided by FT 2232; the JTAG simulator comprises a physical interface of JTAG Port, mainly integrates an FT2232H chip inside, signals communicate with a lower computer TAP after passing through a level conversion chip, wherein the level conversion chip is an SN74LVC2T45 chip, and converts a 3.3V level into a level required by FLASH between 1.8V and 5V according to a reference level of external FLASH; the lower computer part comprises a test port controller TAP, an on-chip debugger OCD and an SOC core. The upper computer sends an instruction to the test port controller TAP by controlling the JTAG simulator, the test port controller TAP continues to send an instruction to the on-chip debugger OCD after receiving the instruction, and the upper computer and the lower computer realize data interaction through the layer of the on-chip debugger OCD.

As shown in fig. 2, the upper computer and the lower computer have the same ID number and size of 64 bits, and the upper computer randomly generates a random value of 448 bits and sends the random value to the lower computer; the upper computer and the lower computer generate a 160-bit MAC value 1 and a MAC value 2 by using an SHA-1 encryption algorithm, the lower computer sends the MAC value 2 to the upper computer, the upper computer compares whether the MAC value 1 and the MAC value 2 are equal, if so, a programming program is executed, and if not, an error is reported. And the lower computer sets overtime waiting time, if the upper computer sends out a programming program within the specified time, the lower computer executes programming, otherwise, the lower computer does not execute programming.

As shown in fig. 3, the upper computer mainly includes: according to the method, the FT2232H device is opened according to the number of the FT2232H devices and the ID number of the FT2232H devices, initialization of the FT2232H devices is completed, the type of a JTAG simulator is obtained, initialization of the JTAG simulator is started, the timeout duration of the JTAG simulator is set, the frequency of the JTAG simulator is set, the mode of the JTAG simulator is set to be changed, GPIO pins of the JTAG simulator are set, initialization of the JTAG simulator is completed, the on-chip debugger OCD completes initialization, and downloading of a lower computer driver is started to complete command execution.

For example, in the erasing process, the erased packet data needs to be set firstly, the packet is downloaded to a designated packet processing area of the lower computer, a response signal sent by the lower computer to the upper computer is cleared, then the lower computer program starts to run, after the lower computer reads the information of the packet, the lower computer operates an erasing command according to the instruction, after the erasing is finished, the upper computer sends the response signal to the upper computer, after receiving the response signal, the upper computer stops running of the lower computer, and then the erasing thread is finished.

As shown in fig. 4, the lower computer mainly completes the following actions, the SOC core initialization, the pin multiplexing function setting, and the like, wherein the initialization of the lower computer requires to start a faster CPU clock, so that the access speed of the JTAG emulator, the speed of programming the lower computer sub-program SPI, and the initialization of the EMIF function module can be improved, and the FLASH program download of the SPIFLASH, NORFRASH, and ONCHIPFLASH can be completed according to the connected FLASH type.

The lower computer subprogram can add commands such as ID reading, whole erasing, sector erasing, null detection, reading, programming and the like according to the requirements of the upper computer.

The above description is only for the purpose of describing the preferred embodiments of the present invention, and is not intended to limit the scope of the present invention, and any variations and modifications made by those skilled in the art based on the above disclosure are within the scope of the appended claims.

Claims

1. An FT2232H program programming device based on SHA-1 identity authentication, characterized by comprising:

the JTAG emulator comprises a JTAG Port physical interface;

2. The SHA-1-authentication-based FT2232H programming device of claim 1, wherein the JTAG Port is integrated with FT2232H chip in the physical interface, and the signal is communicated with the test port controller TAP through level conversion chip.

3. The SHA-1 authentication-based FT2232H programming device according to claim 1, wherein the host computer generating the MAC value by using SHA-1 encryption algorithm and performing the identity verification with the lower computer includes:

the upper computer has the functions of SHA-1 encryption algorithm calculation, ROMID storage and random number generation;

the upper computer sends 448bit random numbers to the lower computer;

4. An FT2232H program programming method based on SHA-1 identity authentication is characterized by comprising the following steps:

5. The SHA-1 authentication-based FT2232H program burning device according to claim 4, wherein the burning driver is customized according to the driver code generated by the SOC core, and is used for processing the initialization, the identity authenticity identification and the package command judgment of the SOC core; the subprogram adds ID reading, whole erasing, sector erasing, null detecting, reading or programming commands according to the requirement of the upper computer.