CN113097864B - Vertical-cavity surface-emitting laser array and preparation method thereof - Google Patents
Vertical-cavity surface-emitting laser array and preparation method thereof Download PDFInfo
- Publication number
- CN113097864B CN113097864B CN202110645618.3A CN202110645618A CN113097864B CN 113097864 B CN113097864 B CN 113097864B CN 202110645618 A CN202110645618 A CN 202110645618A CN 113097864 B CN113097864 B CN 113097864B
- Authority
- CN
- China
- Prior art keywords
- substrate
- epitaxial structure
- light emitting
- forming
- emitting holes
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/30—Structure or shape of the active region; Materials used for the active region
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/10—Construction or shape of the optical resonator, e.g. extended or external cavity, coupled cavities, bent-guide, varying width, thickness or composition of the active region
- H01S5/18—Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities
- H01S5/183—Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities having only vertical cavities, e.g. vertical cavity surface-emitting lasers [VCSEL]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/30—Structure or shape of the active region; Materials used for the active region
- H01S5/32—Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/40—Arrangement of two or more semiconductor lasers, not provided for in groups H01S5/02 - H01S5/30
- H01S5/42—Arrays of surface emitting lasers
- H01S5/423—Arrays of surface emitting lasers having a vertical cavity
- H01S5/426—Vertically stacked cavities
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Optics & Photonics (AREA)
- Semiconductor Lasers (AREA)
Abstract
The embodiment of the invention provides a vertical cavity surface emitting laser array and a preparation method thereof, relating to the technical field of lasers, wherein the vertical cavity surface emitting laser array comprises a plurality of vertical cavity surface emitting lasers, and the preparation method comprises the following steps: forming a first epitaxial structure on a substrate; etching one side of the first epitaxial structure, which is far away from the substrate, to form a plurality of light emitting holes; and forming a second epitaxial structure covering the plurality of light emitting holes on one side of the first epitaxial structure, which is far away from the substrate. Embodiments of the present invention provide a vertical cavity surface emitting laser array and a method for manufacturing the same, so as to avoid forming a mesa structure, so that adjacent vertical cavity surface emitting lasers can be continuously connected, a distance between two adjacent vertical cavity surface emitting lasers is reduced, and a setting density of the vertical cavity surface emitting lasers in the vertical cavity surface emitting laser array is increased.
Description
Technical Field
The invention relates to a laser technology, in particular to a vertical cavity surface emitting laser array and a preparation method thereof.
Background
At present, in application scenarios such as 3D sensing (mobile phone, payment, security, and the like), vehicle sensing, medical treatment, and the like of numerous intelligent devices, there is a great market demand for vertical cavity surface emitting laser arrays, and higher requirements are also put forward for device density and size miniaturization thereof. In the conventional VCSEL array fabrication, in order to increase the device density, the number of light emitting points is usually increased, and the distance is reduced, but due to the limitation of the level of the semiconductor fabrication process at the present stage, there is a certain difficulty in further reducing the channel width between two adjacent light emitting units. For the existing arrangement, the spacing of the platform edge of the unit emitting hole is generally required to be 3-10 μm, and the spacing of the light emitting unit is 33-40 μm. If the distance between the light-emitting units is expected to be further reduced, if the width of the channel is directly reduced, the consistency of the generated different light-emitting point channel shapes cannot be ensured due to the fact that the limits of a photoetching process and a dry etching process are approached. Therefore, how to improve the existing fabrication process of the vcsel array to meet the increasingly stringent requirements for its density and size is a problem to be solved in the art.
Disclosure of Invention
Embodiments of the present invention provide a vertical cavity surface emitting laser array and a method for manufacturing the same, so as to avoid forming a mesa structure, so that adjacent vertical cavity surface emitting lasers can be continuously connected, a distance between two adjacent vertical cavity surface emitting lasers is reduced, and a setting density of the vertical cavity surface emitting lasers in the vertical cavity surface emitting laser array is increased.
In a first aspect, an embodiment of the present invention provides a method for manufacturing a vertical cavity surface emitting laser array, where the vertical cavity surface emitting laser array includes a plurality of vertical cavity surface emitting lasers, and the method includes:
forming a first epitaxial structure on a substrate;
etching one side of the first epitaxial structure, which is far away from the substrate, to form a plurality of light emitting holes;
and forming a second epitaxial structure covering the plurality of light emitting holes on one side of the first epitaxial structure, which is far away from the substrate.
Optionally, forming a first epitaxial structure on the substrate comprises:
forming a lower bragg reflector on the substrate;
forming an active layer on one side, far away from the substrate, of the lower Bragg reflector;
and forming a current blocking layer on one side of the active layer far away from the substrate.
Optionally, etching a side of the first epitaxial structure away from the substrate to form a plurality of light emitting holes, including:
etching and forming a plurality of first grooves exposing the active layer on the current blocking layer;
wherein the light emitting hole is formed at a position of the first groove.
Optionally, forming a second epitaxial structure covering the plurality of light emitting holes on a side of the first epitaxial structure away from the substrate includes:
and forming an upper Bragg reflector covering the plurality of light emitting holes on one side of the first epitaxial structure far away from the substrate.
Optionally, before forming an upper bragg reflector covering the plurality of light emitting holes on a side of the first epitaxial structure away from the substrate, the method further includes:
and forming a current diffusion layer covering the plurality of light emitting holes on one side of the first epitaxial structure, which is far away from the substrate.
Optionally, forming a first epitaxial structure on the substrate comprises:
forming a lower bragg reflector on the substrate;
forming an active layer on one side, far away from the substrate, of the lower Bragg reflector;
forming a low-doped layer on one side of the active layer far away from the substrate;
and forming a tunnel junction on one side of the low-doped layer far away from the substrate.
Optionally, etching a side of the first epitaxial structure away from the substrate to form a plurality of light emitting holes, including:
etching on the tunnel junction to form a plurality of second grooves exposing the low-doped layer;
wherein the light emitting holes are formed at positions between adjacent second grooves.
Optionally, after forming a second epitaxial structure covering the plurality of light emitting holes on a side of the first epitaxial structure away from the substrate, the method further includes:
and forming a plurality of upper metal layers on one side of the second epitaxial structure far away from the substrate and at positions between the adjacent light emitting holes.
Optionally, before forming a plurality of upper metal layers on a side of the second epitaxial structure away from the substrate and in a position between adjacent light emitting holes, the method further includes:
and forming a plurality of silicon nitride layers on one side of the second epitaxial structure, which is far away from the substrate, and above the plurality of light emitting holes in a one-to-one correspondence mode.
Optionally, after forming a second epitaxial structure covering the plurality of light emitting holes on a side of the first epitaxial structure away from the substrate, the method further includes:
and forming a lower metal layer covering the plurality of light emitting holes on one side of the substrate far away from the first epitaxial structure.
Optionally, after forming a second epitaxial structure covering the plurality of light emitting holes on a side of the first epitaxial structure away from the substrate, the method further includes:
and forming a plurality of lower metal layers on one side of the substrate far away from the first epitaxial structure and at positions between the adjacent light emitting holes.
Optionally, before forming a plurality of lower metal layers on a side of the substrate away from the first epitaxial structure and in positions between adjacent light emitting holes, the method further includes:
and forming a plurality of antireflection films on one side of the substrate, which is far away from the first epitaxial structure, and under the plurality of light emitting holes in a one-to-one correspondence manner.
Optionally, after forming a second epitaxial structure covering the plurality of light emitting holes on a side of the first epitaxial structure away from the substrate, the method further includes:
and forming an upper metal layer covering the plurality of light emitting holes on one side of the second epitaxial structure far away from the substrate.
Optionally, after forming a second epitaxial structure covering the plurality of light emitting holes on a side of the first epitaxial structure away from the substrate, the method further includes:
and forming a plurality of dielectric Bragg reflectors on one side of the second epitaxial structure far away from the substrate and above the plurality of light emitting holes in a one-to-one correspondence mode.
Optionally, after the second epitaxial structure is away from the substrate and a plurality of dielectric bragg reflectors are formed above the plurality of light emitting holes in a one-to-one correspondence, the method further includes:
and forming an upper metal layer on one side of the second epitaxial structure far away from the substrate and between two adjacent dielectric Bragg reflectors.
In a second aspect, an embodiment of the present invention provides a vertical cavity surface emitting laser array formed by the manufacturing method according to the first aspect, including:
a substrate;
a first epitaxial structure located on one side of the substrate; etching one side of the first epitaxial structure, which is far away from the substrate, to form a plurality of light emitting holes;
and the second epitaxial structure is positioned on one side, far away from the substrate, of the first epitaxial structure and covers the plurality of light emitting holes.
The embodiment of the invention provides a preparation method of a vertical cavity surface emitting laser array, which is characterized in that a first epitaxial structure is formed on a substrate, a plurality of light emitting holes are formed on one side of the first epitaxial structure, which is far away from the substrate, in an etching manner, and a second epitaxial structure covering the plurality of light emitting holes is formed on one side of the first epitaxial structure, which is far away from the substrate. The first epitaxial structure covers the substrate in a whole layer mode, a plurality of light emitting holes are formed in the first epitaxial structure, the second epitaxial structure covers the first epitaxial structure in a whole layer mode, and the second epitaxial structure covers the plurality of light emitting holes formed in the first epitaxial structure. Because the first epitaxial structure and the second epitaxial structure are uniformly laid layer by layer, the groove of the first epitaxial structure between two adjacent light emitting holes is not etched, and the groove of the second epitaxial structure between two adjacent light emitting holes is not etched, namely, a mesa structure is not formed, so that the adjacent vertical cavity surface emitting lasers can be continuously connected, the distance between the two adjacent vertical cavity surface emitting lasers is reduced, and the arrangement density of the vertical cavity surface emitting lasers in the vertical cavity surface emitting laser array is increased.
Drawings
FIG. 1 is a flow chart of a first method for fabricating a VCSEL array provided in an embodiment of the present invention;
FIG. 2 is a diagram illustrating a process for fabricating a first VCSEL array according to an embodiment of the present invention;
FIG. 3 is a flowchart of a second method for fabricating a VCSEL array provided in an embodiment of the invention;
FIG. 4 is a diagram illustrating a second fabrication process of a VCSEL array provided in an embodiment of the present invention;
FIG. 5 is a flowchart of a third method for fabricating a VCSEL array provided in an embodiment of the invention;
FIG. 6 is a diagram illustrating a process for fabricating a third VCSEL array provided in an embodiment of the invention;
FIG. 7 is a flowchart of a fourth method for fabricating a VCSEL array provided in an embodiment of the present invention;
FIG. 8 is a diagram illustrating a fourth exemplary fabrication process of a VCSEL array provided in an embodiment of the present invention;
FIG. 9 is a diagram illustrating a fifth exemplary fabrication process of a VCSEL array provided in an embodiment of the present invention;
FIG. 10 is a flowchart of a fifth method for fabricating a VCSEL array provided in an embodiment of the invention;
FIG. 11 is a diagram illustrating a process for fabricating a sixth VCSEL array according to an embodiment of the present invention;
FIG. 12 is a diagram illustrating a process for fabricating a seventh VCSEL array according to an embodiment of the invention;
FIG. 13 is a flowchart of a sixth method for fabricating a VCSEL array provided in an embodiment of the invention;
FIG. 14 is a diagram illustrating a process for fabricating an eighth VCSEL array provided in an embodiment of the present invention;
FIG. 15 is a diagram illustrating a process of fabricating a ninth VCSEL array according to an embodiment of the invention;
FIG. 16 is a flowchart illustrating a seventh method for fabricating a VCSEL array according to an embodiment of the invention;
FIG. 17 is a diagram illustrating a fabrication process of a tenth VCSEL array according to an embodiment of the present invention;
fig. 18 is a process diagram of an eleventh vcsel array according to an embodiment of the present invention.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting of the invention. It should be further noted that, for the convenience of description, only some of the structures related to the present invention are shown in the drawings, not all of the structures.
Fig. 1 is a flowchart of a method for manufacturing a first vertical cavity surface emitting laser array according to an embodiment of the present invention, fig. 2 is a diagram of a process for manufacturing the first vertical cavity surface emitting laser array according to the embodiment of the present invention, and referring to fig. 1 and fig. 2, a method for manufacturing a vertical cavity surface emitting laser array according to an embodiment of the present invention is used for manufacturing a vertical cavity surface emitting laser array, the vertical cavity surface emitting laser array includes a plurality of vertical cavity surface emitting lasers, and the method includes:
s101, a first epitaxial structure 20 is formed on the substrate 10.
In this step, the first epitaxial structure 20 may be grown on one side of the substrate 10 by means of epitaxial growth on the substrate 10, for example. The first epitaxial structure 20 may include a plurality of epitaxial layers.
And S102, etching the first epitaxial structure 20 away from the substrate 10 to form a plurality of light emitting holes H.
In this step, the light emitting hole H is a light emitting hole of the vertical cavity surface emitting laser, that is, the vertical cavity surface emitting laser emits a laser beam from the light emitting hole H to the outside of the vertical cavity surface emitting laser. Each of the vertical cavity surface emitting lasers may form one light emitting hole H, and the vertical cavity surface emitting laser array includes a plurality of light emitting holes H.
Exemplarily, referring to fig. 2, the first epitaxial structure 20 is etched to form a plurality of grooves, and the positions of the grooves correspond to the light emitting holes H of the vertical cavity surface emitting laser, that is, the positions of the first epitaxial structure 20 that are etched form the light emitting holes H of the vertical cavity surface emitting laser. In other embodiments, the position between adjacent grooves corresponds to the light emitting hole H of the vcsel, i.e., the position on the first epitaxial structure 20 that is not etched forms the light emitting hole H of the vcsel.
Illustratively, referring to fig. 2, the first epitaxial structure 20 is etched to form a plurality of grooves, the etching depth may be less than the thickness of the first epitaxial structure 20, and the grooves do not expose the substrate 10. When the first epitaxial structure 20 includes a plurality of epitaxial layers, only a portion of the plurality of epitaxial layers may be etched, leaving at least one epitaxial layer unetched.
And S103, forming a second epitaxial structure 30 covering the plurality of light emitting holes H on the side, away from the substrate 10, of the first epitaxial structure 20.
The embodiment of the invention provides a method for preparing a vertical cavity surface emitting laser array, which comprises the steps of forming a first epitaxial structure 20 on a substrate 10, etching one side of the first epitaxial structure 20, which is far away from the substrate 10, to form a plurality of light emitting holes H, and forming a second epitaxial structure 30, which covers the plurality of light emitting holes H, on one side of the first epitaxial structure 20, which is far away from the substrate 10. The first epitaxial structure 20 is entirely covered on the substrate 10, a plurality of light emitting holes H are formed on the first epitaxial structure 20, the second epitaxial structure 30 is entirely covered on the first epitaxial structure 20, and the second epitaxial structure 30 covers the plurality of light emitting holes H formed on the first epitaxial structure 20. Because the first epitaxial structure 20 and the second epitaxial structure 30 are uniformly and hierarchically laid, the groove of the first epitaxial structure 20 between two adjacent light emitting holes H is not etched, and the groove of the second epitaxial structure 30 between two adjacent light emitting holes H is not etched, that is, a mesa structure is not formed, so that adjacent vertical cavity surface emitting lasers can be continuously connected, the distance between two adjacent vertical cavity surface emitting lasers is reduced, and the arrangement density of the vertical cavity surface emitting lasers in the vertical cavity surface emitting laser array is increased.
Fig. 3 is a flowchart of a method for manufacturing a second vertical cavity surface emitting laser array according to an embodiment of the present invention, fig. 4 is a flowchart of a process for manufacturing the second vertical cavity surface emitting laser array according to the embodiment of the present invention, and referring to fig. 3 and fig. 4, the method for manufacturing the vertical cavity surface emitting laser array includes:
s201, a lower bragg reflector 21 is formed on the substrate 10.
And S202, forming an active layer 22 on the side, away from the substrate 10, of the lower Bragg reflector 21.
And S203, forming a current blocking layer 23 on the side, away from the substrate 10, of the active layer 22.
In this step, the current blocking layer 23 may include an N-type layer and a P-type layer, which form an inverted PN junction. If the lower bragg reflector 21 is of an N type, the N type layer in the current blocking layer 23 is located on the side of the P type layer away from the substrate 10; if the lower bragg mirror 21 is of the P-type, the P-type layer in the current blocking layer 23 is located on the side of the N-type layer away from the substrate 10.
S204, etching and forming a plurality of first grooves H1 exposing the active layer 22 on the current blocking layer 23; wherein a light emitting hole H is formed at the position of the first groove H1.
And S205, forming a current diffusion layer 31 covering the plurality of light emitting holes H on the side of the first epitaxial structure 20 away from the substrate 10.
In this step, a current diffusion layer 31 covering the plurality of light emitting holes H is formed on the side of the current blocking layer 23 away from the substrate 10. The current diffusion layer 31 fills the first groove H1 and is formed on the surface of the current blocking layer 23 on the side away from the substrate 10.
And S206, forming an upper Bragg reflector 32 covering the plurality of light emitting holes H on the side, away from the substrate 10, of the first epitaxial structure 20.
In this step, an upper bragg reflector 32 covering the plurality of light emitting holes H is formed on the side of the current diffusion layer 31 away from the substrate 10.
In the embodiment of the invention, the first epitaxial structure 20 includes the lower bragg reflector 21, the active layer 22 and the current blocking layer 23, a plurality of first grooves H1 exposing the active layer 22 are formed on the current blocking layer 23 by etching, and a light emitting hole H is formed at the position of the first groove H1. The second epitaxial structure 30 includes a current spreading layer 31 and an upper bragg mirror 32. In other embodiments, the second epitaxial structure 30 may also include only the upper bragg mirror 32, and in this case, step S205 may be omitted.
Fig. 5 is a flowchart of a method for manufacturing a third vertical cavity surface emitting laser array according to an embodiment of the present invention, fig. 6 is a flowchart of a process for manufacturing the third vertical cavity surface emitting laser array according to the embodiment of the present invention, and referring to fig. 5 and fig. 6, the method for manufacturing the vertical cavity surface emitting laser array includes:
s301, a lower bragg reflector 21 is formed on the substrate 10.
And S302, forming an active layer 22 on the side of the lower Bragg reflector 21 far away from the substrate 10.
And S303, forming a low-doped layer 24 on the side, away from the substrate 10, of the active layer 22.
And S304, forming a tunnel junction 25 on the side of the low-doped layer 24 far away from the substrate 10.
In this step, the tunnel junction 25 may include a highly N-doped layer and a highly P-doped layer. If the lower Bragg reflector 21 is N-type, the highly N-doped layer in the tunnel junction 25 is positioned on the side of the highly P-doped layer far away from the substrate 10; if the lower bragg mirror 21 is P-type, the highly P-doped layer in the tunnel junction 25 is located on the side of the highly N-doped layer remote from the substrate 10.
S305, etching and forming a plurality of second grooves H2 exposing the low-doped layer 24 on the tunnel junction 25; wherein the light emitting hole H is formed at a position between the adjacent second grooves H2.
In this step, after the tunnel junction 25 is etched to form a plurality of second grooves H2, the region of the tunnel junction 25 is reserved as the region of the light emitting hole H.
And S306, forming an upper Bragg reflector 32 covering the plurality of light emitting holes H on the side, away from the substrate 10, of the first epitaxial structure 20.
In this step, an upper bragg reflector 32 covering the plurality of light emitting holes H is formed on the side of the tunnel junction 25 away from the substrate 10. The upper bragg mirror 32 fills the second groove H2 and is formed on the surface of the tunnel junction 25 on the side away from the substrate 10.
In the embodiment of the present invention, the first epitaxial structure 20 includes the lower bragg reflector 21, the active layer 22, the low-doped layer 24, and the tunnel junction 25, a plurality of second grooves H2 exposing the low-doped layer 24 are formed on the tunnel junction 25 by etching, and a light emitting hole H is formed at a position between adjacent second grooves H2. The second epitaxial structure 30 includes an upper bragg mirror 32. In other embodiments, the second epitaxial structure 30 includes a current spreading layer 31 and an upper bragg mirror 32. Before step S306, the method may further include: a current diffusion layer 31 covering the plurality of light emitting holes H is formed on the first epitaxial structure 20 side away from the substrate 10, that is, the current diffusion layer 31 covering the plurality of light emitting holes H is formed on the tunnel junction 25 side away from the substrate 10.
Fig. 7 is a flowchart of a method for manufacturing a fourth vcsel array according to an embodiment of the present invention, fig. 8 is a flowchart of a process for manufacturing the fourth vcsel array according to an embodiment of the present invention, fig. 9 is a flowchart of a process for manufacturing a fifth vcsel array according to an embodiment of the present invention, and referring to fig. 4, fig. 7, and fig. 8, or referring to fig. 6, fig. 7, and fig. 9, the method for manufacturing the vcsel array includes:
s401, a first epitaxial structure 20 is formed on the substrate 10.
S402, etching and forming a plurality of light emitting holes H on one side of the first epitaxial structure 20 far away from the substrate 10.
And S403, forming a second epitaxial structure 30 covering the plurality of light emitting holes H on the side of the first epitaxial structure 20 away from the substrate 10.
S404, forming a plurality of silicon nitride layers 51 on the second epitaxial structure 30 away from the substrate 10 and above the plurality of light emitting holes H in a one-to-one correspondence.
In this step, a plurality of silicon nitride layers 51 are formed on the side of the upper bragg reflector 32 away from the substrate 10 and above the plurality of light emitting holes H in one-to-one correspondence. The silicon nitride layer 51 overlaps the light emitting holes H in a one-to-one correspondence in a direction perpendicular to the substrate 10, and the silicon nitride layer 51 completely covers the light emitting holes H in a one-to-one correspondence.
S405, a plurality of upper metal layers 41 are formed at positions between the adjacent light emitting holes H on the side of the second epitaxial structure 30 away from the substrate 10.
In this step, after the silicon nitride layer 51 is formed in step S404, the upper metal layer 41 is formed on the side of the upper bragg reflector 32 away from the substrate 10 by using the silicon nitride layer 51 as a mask pattern, and the upper metal layer 41 is located between two adjacent silicon nitride layers 51.
And S406, forming a lower metal layer 42 covering the plurality of light emitting holes H on the side of the substrate 10 far away from the first epitaxial structure 20.
In this step, the entire lower metal layer 42 is formed on the side of the substrate 10 remote from the first epitaxial structure 20.
In the embodiment of the invention, a plurality of silicon nitride layers 51 are formed on the side of the second epitaxial structure 30 away from the substrate 10 and above the plurality of light emitting holes H in one-to-one correspondence, and the upper metal layer 41 is formed on the side of the second epitaxial structure 30 away from the substrate 10 and between the adjacent silicon nitride layers 51. The light emitting mode of the vertical cavity surface emitting laser array is top emission. In other embodiments, step S404 may be omitted, that is, without forming the silicon nitride layer 51, a plurality of upper metal layers 41 may be formed directly on the second epitaxial structure 30 at a side away from the substrate 10 and between adjacent light emitting holes H.
Fig. 10 is a flowchart of a fifth method for manufacturing a vertical cavity surface emitting laser array according to an embodiment of the present invention, fig. 11 is a flowchart of a process for manufacturing a sixth vertical cavity surface emitting laser array according to an embodiment of the present invention, fig. 12 is a flowchart of a process for manufacturing a seventh vertical cavity surface emitting laser array according to an embodiment of the present invention, and referring to fig. 4, fig. 10, and fig. 11, or referring to fig. 6, fig. 10, and fig. 12, the method for manufacturing a vertical cavity surface emitting laser array includes:
s501, a first epitaxial structure 20 is formed on the substrate 10.
And S502, etching the first epitaxial structure 20 away from the substrate 10 to form a plurality of light emitting holes H.
And S503, forming a second epitaxial structure 30 covering the plurality of light emitting holes H on the side, away from the substrate 10, of the first epitaxial structure 20.
S504, a plurality of antireflection films 52 are formed on the substrate 10 away from the first epitaxial structure 20 and under the plurality of light emitting holes H in a one-to-one correspondence manner.
In this step, in the direction perpendicular to the substrate 10, the antireflection film 52 and the light emitting holes H are overlapped in a one-to-one correspondence, and the antireflection film 52 completely covers the light emitting holes H corresponding to them one by one.
And S505, forming a plurality of lower metal layers 42 on the side of the substrate 10 far away from the first epitaxial structure 20 and at positions between the adjacent light emitting holes H.
In this step, a lower metal layer 42 is formed on the side of the substrate 10 away from the first epitaxial structure 20, and the lower metal layer 42 is located between two adjacent antireflection films 52.
S506, forming an upper metal layer 41 covering the plurality of light emitting holes H on the side of the second epitaxial structure 30 away from the substrate 10.
In this step, the entire upper metal layer 41 is formed on the side of the upper bragg reflector 32 away from the substrate 10.
In the embodiment of the invention, a plurality of anti-reflection films 52 are formed on the side of the substrate 10 away from the first epitaxial structure 20 and under the plurality of light emitting holes H in a one-to-one correspondence manner, and a plurality of lower metal layers 42 are formed on the side of the substrate 10 away from the first epitaxial structure 20 and between adjacent anti-reflection films 52. The light emitting mode of the vertical cavity surface emitting laser array is bottom emission. In other embodiments, step S504 may be omitted, that is, without forming the antireflection film 52, the plurality of lower metal layers 42 may be formed directly on the side of the substrate 10 away from the first epitaxial structure 20 and between the adjacent light emitting holes H.
Fig. 13 is a flowchart of a method for manufacturing a sixth vertical cavity surface emitting laser array according to an embodiment of the present invention, fig. 14 is a flowchart of a process for manufacturing an eighth vertical cavity surface emitting laser array according to an embodiment of the present invention, fig. 15 is a flowchart of a process for manufacturing a ninth vertical cavity surface emitting laser array according to an embodiment of the present invention, and referring to fig. 4, fig. 13, and fig. 14, or referring to fig. 6, fig. 13, and fig. 15, the method for manufacturing a vertical cavity surface emitting laser array includes:
s601, a first epitaxial structure 20 is formed on the substrate 10.
And S602, etching and forming a plurality of light emitting holes H on one side of the first epitaxial structure 20 far away from the substrate 10.
And S603, forming a second epitaxial structure 30 covering the plurality of light emitting holes H on the side of the first epitaxial structure 20 away from the substrate 10.
And S604, forming a plurality of Dielectric Bragg Reflectors (DBR) 60 on the side of the second epitaxial structure 30 far away from the substrate 10 and above the plurality of light emitting holes H in one-to-one correspondence.
In this step, in a direction perpendicular to the substrate 10, the dielectric bragg reflectors 60 are overlapped with the light emitting holes H in a one-to-one correspondence, and the dielectric bragg reflectors 60 completely cover the light emitting holes H in a one-to-one correspondence.
S605, a plurality of upper metal layers 41 are formed at positions between the adjacent light emitting holes H on the side of the second epitaxial structure 30 away from the substrate 10.
In this step, an upper metal layer 41 is formed on the side of the second epitaxial structure 30 away from the substrate 10, and the upper metal layer 41 is located between two adjacent dielectric bragg mirrors 60.
And S606, forming a lower metal layer 42 covering the plurality of light emitting holes H on the side of the substrate 10 far away from the first epitaxial structure 20.
In the embodiment of the present invention, a plurality of dielectric bragg reflectors 60 are formed on the second epitaxial structure 30 at a side away from the substrate 10 and above the plurality of light emitting holes H in one-to-one correspondence. An upper metal layer 41 is formed between two adjacent dielectric bragg mirrors 60, and an entire lower metal layer 42 is formed on the side of the substrate 10 away from the first epitaxial structure 20. The light emitting mode of the vertical cavity surface emitting laser array is top emission.
Fig. 16 is a flowchart of a method for manufacturing a seventh vertical cavity surface emitting laser array according to an embodiment of the present invention, fig. 17 is a flowchart of a process for manufacturing a tenth vertical cavity surface emitting laser array according to an embodiment of the present invention, fig. 18 is a flowchart of a process for manufacturing an eleventh vertical cavity surface emitting laser array according to an embodiment of the present invention, and referring to fig. 4, fig. 16, and fig. 17, or referring to fig. 6, fig. 16, and fig. 18, the method for manufacturing a vertical cavity surface emitting laser array includes:
s701, a first epitaxial structure 20 is formed on the substrate 10.
S702, etching and forming a plurality of light emitting holes H on one side of the first epitaxial structure 20 far away from the substrate 10.
And S703, forming a second epitaxial structure 30 covering the plurality of light emitting holes H on the side of the first epitaxial structure 20 away from the substrate 10.
S704, forming a plurality of dielectric bragg reflectors 60 on the side of the second epitaxial structure 30 away from the substrate 10 and above the plurality of light emitting holes H in a one-to-one correspondence.
S705, a plurality of upper metal layers 41 are formed at positions between the adjacent light emitting holes H on the side of the second epitaxial structure 30 away from the substrate 10.
In this step, an upper metal layer 41 is formed on the side of the second epitaxial structure 30 away from the substrate 10 and between two adjacent dielectric bragg mirrors 60.
S706, forming a plurality of lower metal layers 42 on a side of the substrate 10 away from the first epitaxial structure 20 and at positions between the adjacent light emitting holes H.
In the embodiment of the present invention, a plurality of dielectric bragg reflectors 60 are formed on the second epitaxial structure 30 at a side away from the substrate 10 and above the plurality of light emitting holes H in one-to-one correspondence. An upper metal layer 41 is formed between two adjacent dielectric bragg reflectors 60, and a plurality of lower metal layers 42 are formed at positions on the substrate 10 away from the first epitaxial structure 20 and between adjacent light emitting holes H. The light emitting mode of the vertical cavity surface emitting laser array is bottom emission.
It should be noted that, in each embodiment of the present invention, the order of forming the upper metal layer 41 and the lower metal layer 42 is not required, and in some embodiments, the upper metal layer 41 may be formed first, and then the lower metal layer 42 may be formed. In other embodiments, the lower metal layer 42 may be formed first, and then the upper metal layer 41 may be formed.
Based on the same inventive concept, the embodiment of the present invention provides a vertical cavity surface emitting laser array formed by the above-mentioned fabrication method, and referring to fig. 2, the vertical cavity surface emitting laser array includes a substrate 10, a first epitaxial structure 20, and a second epitaxial structure 30. The first epitaxial structure 20 is located on one side of the substrate 10. The side of the first epitaxial structure 20 away from the substrate 10 is etched to form a plurality of light emitting holes H. The second epitaxial structure 30 is located on a side of the first epitaxial structure 20 away from the substrate 10, and the second epitaxial structure 30 covers the plurality of light emitting holes H.
The embodiment of the invention provides a vertical cavity surface emitting laser array, wherein a first epitaxial structure 20 is formed on a substrate 10, a plurality of light emitting holes H are formed by etching on one side of the first epitaxial structure 20 away from the substrate 10, and a second epitaxial structure 30 covering the plurality of light emitting holes H is formed on one side of the first epitaxial structure 20 away from the substrate 10. The first epitaxial structure 20 is entirely covered on the substrate 10, a plurality of light emitting holes H are formed on the first epitaxial structure 20, the second epitaxial structure 30 is entirely covered on the first epitaxial structure 20, and the second epitaxial structure 30 covers the plurality of light emitting holes H formed on the first epitaxial structure 20. Because the first epitaxial structure 20 and the second epitaxial structure 30 are uniformly and hierarchically laid, the groove of the first epitaxial structure 20 between two adjacent light emitting holes H is not etched, and the groove of the second epitaxial structure 30 between two adjacent light emitting holes H is not etched, that is, a mesa structure is not formed, so that adjacent vertical cavity surface emitting lasers can be continuously connected, the distance between two adjacent vertical cavity surface emitting lasers is reduced, and the arrangement density of the vertical cavity surface emitting lasers in the vertical cavity surface emitting laser array is increased.
It should be noted that, because the vertical cavity surface emitting laser array provided in the embodiment of the present invention is formed by using the preparation method in the above embodiment, the vertical cavity surface emitting laser array formed by the preparation method can be used as the structure of the vertical cavity surface emitting laser array provided in the embodiment of the present invention. The structure of the VCSEL array is further described below as a partial example only.
Alternatively, referring to fig. 4, the first epitaxial structure 20 includes a lower bragg mirror 21, an active layer 22, and a current blocking layer 23. The lower bragg mirror 21 is located between the active layer 22 and the substrate 10, and the active layer 22 is located between the lower bragg mirror 21 and the current blocking layer 23. The current blocking layer 23 is etched to form a plurality of first grooves H1 exposing the active layer 22. A light emitting hole H is formed at the position of the first groove H1.
Further, referring to fig. 4, the second epitaxial structure 30 includes a current spreading layer 31 and an upper bragg mirror 32. A current spreading layer 31 is located between the upper bragg mirror 32 and the second epitaxial structure 30. Specifically, the current diffusion layer 31 is located between the current blocking layer 23 and the upper bragg mirror 32, and the current diffusion layer 31 fills the first groove H1, covering the current blocking layer 23 and the active layer 22 exposed by the first groove H1.
Alternatively, referring to fig. 6, the first epitaxial structure 20 includes a lower bragg reflector 21, an active layer 22, a low-doped layer 24, and a tunnel junction 25. The active layer 22 is located between the lower bragg mirror 21 and the low doped layer 24, and the low doped layer 24 is located between the active layer 22 and the tunnel junction 25. A plurality of second grooves H2 exposing the low-doped layer 24 are etched on the tunnel junction 25. Light emitting holes H are formed at positions between the adjacent second grooves H2.
Further, referring to fig. 6, the second epitaxial structure 30 includes an upper bragg mirror 32. The upper bragg mirror 32 fills the second groove H2, covering the tunnel junction 25 and the lowly doped layer 24 exposed by the second groove H2.
Alternatively, referring to fig. 8 and 9, the vertical cavity surface emitting laser array further includes a plurality of upper metal layers 41 and lower metal layers 42. The upper metal layer 41 does not overlap the light emitting hole H in a direction perpendicular to the substrate 10. The upper metal layer 41 avoids the light emitting hole H. Exemplarily, referring to fig. 8, the upper metal layer 41 overlaps the current blocking layer 23 in a direction perpendicular to the substrate 10. Exemplarily, referring to fig. 9, the upper metal layer 41 overlaps the tunnel junction 25 in a direction perpendicular to the substrate 10. The lower metal layer 42 is located on a side of the substrate 10 away from the first epitaxial structure 20, and the lower metal layer 42 covers the plurality of light emitting holes H in a direction perpendicular to the substrate 10.
Further, the vertical cavity surface emitting laser array further includes a plurality of silicon nitride layers 51. The silicon nitride layer 51 is located on the side of the second epitaxial structure 30 away from the substrate 10, and the silicon nitride layer 51 is overlapped with the light emitting holes H in a one-to-one correspondence in a direction perpendicular to the substrate 10. That is, the plurality of silicon nitride layers 51 are formed above the plurality of light emitting holes H in one-to-one correspondence.
Alternatively, referring to fig. 11 and 12, the vertical cavity surface emitting laser array further includes an upper metal layer 41 and a plurality of lower metal layers 42. The lower metal layer 42 is located on a side of the substrate 10 away from the first epitaxial structure 20, and the lower metal layer 42 does not overlap the light emitting hole H. The lower metal layer 42 avoids the light emitting hole H. The upper metal layer 41 is located on a side of the second epitaxial structure 30 away from the substrate 10, and the upper metal layer 41 covers the plurality of light emitting holes H.
Further, the vcsel array further includes a plurality of antireflection films 52. An anti-reflection film 52 is positioned on the substrate 10 side away from the first epitaxial structure 20. The reflection reducing films 52 are overlapped with the light emitting holes H in a one-to-one correspondence in a direction perpendicular to the substrate 10. That is, the plurality of antireflection films 52 are formed under the plurality of light emitting holes H in one-to-one correspondence.
Alternatively, referring to fig. 14 and 15, the vcsel array further includes a plurality of dielectric bragg mirrors 60. The dielectric bragg reflector 60 is located on one side of the second epitaxial structure 30 far from the substrate 10, and is perpendicular to the substrate 10, and the dielectric bragg reflector 60 is overlapped with the light emitting holes H in a one-to-one correspondence manner. That is, the plurality of dielectric bragg reflectors 60 are formed above the plurality of light emitting holes H in one-to-one correspondence.
Alternatively, referring to fig. 17 and 18, the vertical cavity surface emitting laser array further includes a plurality of upper metal layers 41 and a plurality of lower metal layers 42. In a direction perpendicular to the substrate 10, both the upper and lower metal layers 41 and 42 do not overlap the light emitting hole H. The upper and lower metal layers 41 and 42 avoid the light emitting hole H. The dielectric bragg mirrors 60 are in the same layer as the upper metal layer 41, and the upper metal layer 41 is located between two adjacent dielectric bragg mirrors 60.
It should be noted that "a plurality" in the embodiments of the present invention specifically means a plurality in a cross-sectional structure, specifically, it may mean a plurality in actual number, and may also mean a plurality of interrupted portions of one film layer due to the opening.
It is to be noted that the foregoing is only illustrative of the preferred embodiments of the present invention and the technical principles employed. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious modifications, rearrangements, combinations and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail by the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the present invention, and the scope of the present invention is determined by the scope of the appended claims.
Claims (5)
1. A method of fabricating a vertical cavity surface emitting laser array, the vertical cavity surface emitting laser array comprising a plurality of vertical cavity surface emitting lasers, the method comprising:
forming a first epitaxial structure on a substrate;
etching one side of the first epitaxial structure, which is far away from the substrate, to form a plurality of light emitting holes;
forming a second epitaxial structure covering the plurality of light emitting holes on one side of the first epitaxial structure, which is far away from the substrate;
forming a first epitaxial structure on a substrate, comprising:
forming a lower bragg reflector on the substrate;
forming an active layer on one side, far away from the substrate, of the lower Bragg reflector;
forming a current blocking layer on one side of the active layer far away from the substrate;
etching and forming a plurality of light emitting holes on one side of the first epitaxial structure far away from the substrate, wherein the method comprises the following steps:
etching and forming a plurality of first grooves exposing the active layer on the current blocking layer;
wherein the light emitting hole is formed at a position of the first groove;
wherein, forming a second epitaxial structure covering the plurality of light emitting holes on the side of the first epitaxial structure far away from the substrate comprises:
forming a current diffusion layer covering the plurality of light emitting holes on one side of the first epitaxial structure away from the substrate; the current diffusion layer is filled in the first groove and is formed on the surface of the current blocking layer, which is far away from one side of the substrate;
forming an upper Bragg reflector covering the plurality of light emitting holes on one side of the first epitaxial structure away from the substrate;
the current blocking layer comprises an N-type layer and a P-type layer and is formed in an epitaxial growth mode;
after a second epitaxial structure covering the plurality of light emitting holes is formed on the side of the first epitaxial structure away from the substrate, the method further comprises the following steps:
forming a plurality of silicon nitride layers on one side of the second epitaxial structure, which is far away from the substrate, and above the plurality of light emitting holes in a one-to-one correspondence manner;
and forming a plurality of upper metal layers on one side of the second epitaxial structure, which is far away from the substrate, and at positions between the adjacent light emitting holes by taking the silicon nitride layer as a mask pattern.
2. The method of claim 1, further comprising, after forming a second epitaxial structure covering the plurality of light emitting holes on a side of the first epitaxial structure away from the substrate:
and forming a lower metal layer covering the plurality of light emitting holes on one side of the substrate far away from the first epitaxial structure.
3. The method of claim 1, further comprising, after forming a second epitaxial structure covering the plurality of light emitting holes on a side of the first epitaxial structure away from the substrate:
and forming a plurality of lower metal layers on one side of the substrate far away from the first epitaxial structure and at positions between the adjacent light emitting holes.
4. The method according to claim 3, further comprising, before forming a plurality of lower metal layers on a side of the substrate away from the first epitaxial structure and between adjacent light emitting holes:
and forming a plurality of antireflection films on one side of the substrate, which is far away from the first epitaxial structure, and under the plurality of light emitting holes in a one-to-one correspondence manner.
5. A vertical cavity surface emitting laser array formed by the method of any one of claims 1 to 4, comprising:
a substrate;
a first epitaxial structure located on one side of the substrate; etching one side of the first epitaxial structure, which is far away from the substrate, to form a plurality of light emitting holes; the first epitaxial structure comprises a lower Bragg reflector, an active layer and a current blocking layer, the lower Bragg reflector is positioned between the active layer and the substrate, the active layer is positioned between the lower Bragg reflector and the current blocking layer, a plurality of first grooves exposing the active layer are formed on the current blocking layer in an etching mode, and light emitting holes are formed at the positions of the first grooves;
the second epitaxial structure is positioned on one side, far away from the substrate, of the first epitaxial structure and covers the plurality of light emitting holes; the second epitaxial structure comprises an upper Bragg reflector and a current diffusion layer, wherein the current diffusion layer is positioned between the upper Bragg reflector and the first epitaxial structure, fills the first groove and is formed on the surface of the current blocking layer on the side far away from the substrate;
the silicon nitride layers are positioned on one side, far away from the substrate, of the second epitaxial structure and are vertical to the substrate, and the silicon nitride layers and the light emitting holes are overlapped in a one-to-one correspondence mode;
a plurality of upper metal layers perpendicular to the substrate, the upper metal layers not overlapping the light emitting holes; the vertical cavity surface emitting laser array comprises the silicon nitride layer, and the upper metal layer is positioned between the adjacent light emitting holes;
the current blocking layer comprises an N-type layer and a P-type layer and is formed in an epitaxial growth mode.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110645618.3A CN113097864B (en) | 2021-06-10 | 2021-06-10 | Vertical-cavity surface-emitting laser array and preparation method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110645618.3A CN113097864B (en) | 2021-06-10 | 2021-06-10 | Vertical-cavity surface-emitting laser array and preparation method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN113097864A CN113097864A (en) | 2021-07-09 |
| CN113097864B true CN113097864B (en) | 2021-11-30 |
Family
ID=76665021
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202110645618.3A Active CN113097864B (en) | 2021-06-10 | 2021-06-10 | Vertical-cavity surface-emitting laser array and preparation method thereof |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN113097864B (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20150318666A1 (en) * | 2012-12-05 | 2015-11-05 | Mattias HAMMAR | Vertical-cavity surface-emitting transistor laser, t-vcsel and method for producing the same |
| CN106848835A (en) * | 2016-12-22 | 2017-06-13 | 华中科技大学 | A kind of Distributed Feedback Laser based on surface grating |
| CN110247302A (en) * | 2019-07-09 | 2019-09-17 | 华中科技大学 | A kind of surface-emitting laser based on surface grating |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP6303255B2 (en) * | 2011-12-02 | 2018-04-04 | 株式会社リコー | Surface emitting laser element and atomic oscillator |
| JP2019525485A (en) * | 2016-08-08 | 2019-09-05 | フィニサー コーポレイション | Etched planarization VCSEL |
| US11424597B2 (en) * | 2017-01-30 | 2022-08-23 | Oepic Semiconductors, Inc. | Tunnel junction for GaAs based VCSELs and method therefor |
| US10396529B2 (en) * | 2017-05-22 | 2019-08-27 | Finisar Corporation | VCSELs having mode control and device coupling |
| US20190252858A1 (en) * | 2018-02-12 | 2019-08-15 | Oepic Semiconductors, Inc. | Epitaxial planarization of tunnel junction and alike vcsel array and method therefor |
| CN110289552A (en) * | 2019-06-26 | 2019-09-27 | 北京工业大学 | High light beam quality planar laser with vertical cavity array and preparation method based on sub-wave length grating waveguide |
| CN110277732A (en) * | 2019-07-16 | 2019-09-24 | 河北工业大学 | VCSEL device and preparation method thereof with high dielectric constant limiting holes |
| CN112448268A (en) * | 2020-11-24 | 2021-03-05 | 华芯半导体科技有限公司 | VCSEL chip with lens structure and preparation method thereof |
-
2021
- 2021-06-10 CN CN202110645618.3A patent/CN113097864B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20150318666A1 (en) * | 2012-12-05 | 2015-11-05 | Mattias HAMMAR | Vertical-cavity surface-emitting transistor laser, t-vcsel and method for producing the same |
| CN106848835A (en) * | 2016-12-22 | 2017-06-13 | 华中科技大学 | A kind of Distributed Feedback Laser based on surface grating |
| CN110247302A (en) * | 2019-07-09 | 2019-09-17 | 华中科技大学 | A kind of surface-emitting laser based on surface grating |
Also Published As
| Publication number | Publication date |
|---|---|
| CN113097864A (en) | 2021-07-09 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| EP0858137B1 (en) | Surface emitting laser device and its method of manufacture | |
| CN110416874B (en) | Method for preparing small-spacing vertical cavity surface emitting laser array | |
| JP7210663B2 (en) | Generation of Arbitrary Patterns on Two-Dimensional Uniform Grid VCSEL Arrays | |
| JP6205088B1 (en) | Vertical cavity surface emitting laser | |
| US11522344B2 (en) | Optimizing a layout of an emitter array | |
| CN110299669B (en) | Vertical cavity surface emitting laser with special metal connecting layer and preparation method thereof | |
| CN109891692A (en) | The VCSEL array of infusion regrowth VCSEL and the isomery combination with different VCSEL types | |
| CN111313233A (en) | Laser device and manufacturing method and application thereof | |
| CN113097864B (en) | Vertical-cavity surface-emitting laser array and preparation method thereof | |
| CN113169519B (en) | Vertical Cavity Surface Emitting Laser (VCSEL) array and method of manufacture | |
| US6693934B2 (en) | Wavelength division multiplexed vertical cavity surface emitting laser array | |
| TWI809872B (en) | Vertical cavity surface emitting laser | |
| KR20230070406A (en) | Vertical cavity surface emitting laser device and manufacturing method thereof | |
| JP2009158709A (en) | Surface-emitting type semiconductor laser array and surface-emitting type semiconductor laser | |
| CN113851927A (en) | Semiconductor laser | |
| US11876348B2 (en) | Trench process for dense VCSEL design | |
| CN113422291B (en) | Laser device and manufacturing method and application thereof | |
| US11870217B2 (en) | Bi-directional vertical cavity surface emitting lasers | |
| CN111613967B (en) | Vertical cavity surface emitting laser for emitting coherent laser and manufacturing method thereof | |
| CN111431032B (en) | Laser and manufacturing method thereof | |
| TW202312612A (en) | Emitter with variable light reflectivity | |
| CN111799652A (en) | Optimizing the layout of an emitter array | |
| WO2023031058A1 (en) | Vertical cavity surface emitting laser (vcsel), laser sensor and method of producing a vcsel | |
| CN109510062A (en) | Bury Distributed Feedback Laser and preparation method thereof | |
| CN111106532A (en) | Long wavelength vertical cavity surface emitting semiconductor laser and preparation method thereof |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |