CN113077753A - Pixel driving circuit - Google Patents
Pixel driving circuit Download PDFInfo
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- CN113077753A CN113077753A CN202110391819.5A CN202110391819A CN113077753A CN 113077753 A CN113077753 A CN 113077753A CN 202110391819 A CN202110391819 A CN 202110391819A CN 113077753 A CN113077753 A CN 113077753A
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/3406—Control of illumination source
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/02—Improving the quality of display appearance
- G09G2320/0233—Improving the luminance or brightness uniformity across the screen
Abstract
The invention provides a pixel driving circuit, which comprises a light-emitting unit, thirteen switches and two capacitors. The driving current of the light emitting unit only flows through one of the switches, thereby saving power consumption. In addition, the pixel driving circuit can compensate the critical voltage and the operating voltage, so that the light-emitting unit can provide consistent brightness.
Description
Technical Field
The present disclosure relates to a pixel driving circuit of a light emitting diode.
Background
Light emitting diodes are widely used in various types of displays. The brightness of the light emitting diode during light emission is related to the magnitude of the driving current thereof, and the magnitude of the driving current is controlled by the driving transistor. However, the threshold voltage (Vth) of the driving transistor of each pixel in the display is different due to process variation, so that the leds in different pixels have different driving currents and the brightness of each led is different, thereby causing the display to have a non-uniform brightness when displaying images. In addition, the driving current is provided by the operating voltage, and the operating voltage is likely to generate a voltage drop due to the line resistance in the transmission path, so that the operating voltage of each pixel is different, and the driving current generates an error.
Therefore, it is an objective of research by those skilled in the art to compensate for the threshold voltage of the driving transistor of a pixel of a display and also compensate for the operating voltage.
Disclosure of Invention
An embodiment of the present disclosure provides a pixel driving circuit including the following elements. The light emitting unit has a first end and a second end, and the first end of the light emitting unit is connected to a first operating voltage. The first switch has a control end, a first end and a second end, the first end of the first switch is connected to the second end of the light-emitting unit, and the second end of the first switch is connected to the second operating voltage. The second switch has a control end, a first end and a second end, the first end of the second switch is connected to the second operating voltage, the second end of the second switch is connected to the control end of the first switch, and the control end of the second switch is connected to the first control signal. The third switch has a control end, a first end and a second end, the first end of the third switch is connected to the second operation voltage, and the control end of the third switch is connected to the first control signal. The fourth switch has a control end, a first end and a second end, the first end of the fourth switch is connected to the control end of the first switch and the second end of the second switch, and the control end of the fourth switch is connected to the second end of the third switch. The fifth switch has a control end, a first end and a second end, the first end of the fifth switch is connected to the first voltage, and the second end of the fifth switch is connected to the second end of the third switch and the control end of the fourth switch. The sixth switch has a control end, a first end and a second end, the first end of the sixth switch is connected to the control end of the fifth switch, the second end of the sixth switch is connected to the second control signal, and the control end of the sixth switch is connected to the third control signal. The seventh switch has a control end, a first end and a second end, the second end of the seventh switch is connected to the control end of the fifth switch and the first end of the sixth switch, and the control end of the seventh switch is connected to the fourth control signal. The eighth switch has a control end, a first end and a second end, the first end of the eighth switch is connected to a data voltage, and the second end of the eighth switch is connected to the control end of the eighth switch and the first end of the seventh switch. The first capacitor has a first end and a second end, the first end of the first capacitor is connected to the control end of the fifth switch, the first end of the sixth switch and the second end of the seventh switch, and the second end of the first capacitor is connected to the third control signal. The ninth switch has a control end, a first end and a second end, the first end of the ninth switch is connected to the second end of the first switch and the second operating voltage, and the control end of the ninth switch is connected to the first control signal. The tenth switch has a control terminal, a first terminal and a second terminal, the first terminal of the tenth switch is connected to the second terminal of the ninth switch, the second terminal of the tenth switch is connected to a diode voltage, and the control terminal of the tenth switch is connected to the first control signal. The second capacitor has a first end and a second end, the first end of the second capacitor is connected to the second end of the fourth switch, and the second end of the second capacitor is connected to the second end of the ninth switch and the first end of the tenth switch. The eleventh switch has a control end, a first end and a second end, the first end of the eleventh switch is connected to the second end of the fourth switch and the first end of the second capacitor, the second end of the eleventh switch is connected to the first operating voltage, and the control end of the eleventh switch is connected to the third control signal. And the twelfth switch is provided with a control end, a first end and a second end, the first end of the twelfth switch is connected to the second end of the fourth switch, the first end of the second capacitor and the first end of the eleventh switch, and the control end of the twelfth switch is connected to the fourth control signal. The thirteenth switch has a control end, a first end and a second end, the first end of the thirteenth switch is connected to the second end of the twelfth switch and the control end of the thirteenth switch, and the second end of the thirteenth switch is connected to a reference voltage.
In some embodiments, the pixel driving circuit operates in a first period, a second period, a third period, and a fourth period in sequence. In the first period, the first switch, the fourth switch, the fifth switch, the seventh switch, the ninth switch, and the twelfth switch are turned off, and the second switch, the third switch, the sixth switch, the tenth switch, and the eleventh switch are turned on. In the second period, the first switch, the fourth switch, the fifth switch, the sixth switch, the ninth switch, and the eleventh switch are turned off, and the second switch, the third switch, the seventh switch, the eighth switch, the tenth switch, the twelfth switch, and the thirteenth switch are turned on. In the first sub-period of the third period, the first to seventh switches, the tenth switch, the eleventh switch, and the twelfth switch are in the off state, and the ninth switch is in the on state. In a second sub-period of the third period, the second switch, the third switch, the sixth switch, the seventh switch, and the tenth to twelfth switches are in an off state, and the first switch, the fourth switch, the fifth switch, and the ninth switch are in an on state. In the fourth period, the first to seventh switches, the ninth switch, the eleventh switch, and the twelfth switch are off, and the second switch, the third switch, and the tenth switch are on.
In some embodiments, the first to fourth switches, the sixth switch, the seventh switch, the tenth switch, the eleventh switch, the twelfth switch, and the thirteenth switch are N-type transistors, and the fifth switch, the eighth switch, and the ninth switch are P-type transistors.
In some embodiments, the threshold voltage of the first switch is matched to the threshold voltage of the thirteenth switch, and the threshold voltage of the fifth switch is matched to the threshold voltage of the eighth switch.
In some embodiments, during the first period, the first control signal and the third control signal are at a first high level, the second control signal is at a second high level, and the fourth control signal is at a first low level. In the second period, the first control signal and the fourth control signal are at the first high level, the second control signal is at the second high level, and the third control signal is at the first low level. In the third period, the first control signal, the third control signal and the fourth control signal are at the first low level, and the second control signal is gradually reduced from the second high level to the second low level. In the fourth period, the first control signal is at the first high level, the second control signal is at the second high level, and the third control signal and the fourth control signal are at the first low level.
In some embodiments, the first operating voltage is greater than the second operating voltage, and the first operating voltage is greater than or equal to the first voltage.
In some embodiments, the light emitting unit is a light emitting diode.
In some embodiments, the size of the light emitting diode is sub-millimeter.
In some embodiments, the pixel driving circuit is disposed in the display panel.
In some embodiments, the pixel driving circuit is disposed in the backlight module.
In the pixel driving circuit, the threshold voltage and the operating voltage can be compensated, and the technical effect of saving power consumption is achieved.
Drawings
In order to make the aforementioned and other features and advantages of the invention more comprehensible, embodiments accompanied with figures are described in detail below.
Fig. 1 is a circuit architecture diagram illustrating a pixel driving circuit according to an embodiment.
Fig. 2 is a timing diagram illustrating various control signals in the pixel driving circuit according to one embodiment.
Fig. 3 is a switching schematic diagram illustrating a pixel driving circuit during a first period according to an embodiment.
Fig. 4 is a switching diagram illustrating a pixel driving circuit during a second period according to an embodiment.
Fig. 5 is a switching diagram illustrating a pixel driving circuit in a first sub-period during a third period according to an embodiment.
Fig. 6 is a switching diagram illustrating a pixel driving circuit during a second sub-period in a third period according to an embodiment.
FIG. 7 is a switching diagram illustrating a pixel drive circuit during a fourth period according to one embodiment.
Description of reference numerals:
100: pixel driving circuit
110: light emitting unit
C1: first capacitor
C2: second capacitor
T1-T13: switch with a switch body
ILED: electric current
110-1, C1-1, C2-1, T1-1, T2-1, T3-1, T4-1, T5-1, T6-1, T7-1, T8-1, T9-1, T10-1, T11-1, T12-1, T13-1: first end
110-2, C1-2, C2-2, T1-2, T2-2, T3-2, T4-2, T5-2, T6-2, T7-2, T8-2, T9-2, T10-2, T11-2, T12-2, T13-2: second end
T1-3, T2-3, T3-3, T4-3, T5-3, T6-3, T7-3, T8-3, T9-3, T10-3, T11-3, T12-3, T13-3: control terminal
A, B, C, D, E: node point
VDD, VSS: operating voltage
S1,S2,EM,Vsweep: control signal
VH: voltage of
VDATA: data voltage
VLED: voltage of the diode
Vref: reference voltage
210: the first period
220: the second period
230: the third period
230-1: the first sub-period
230-2: the second sub-period
240: the fourth period
VGH,Vsweep_H: high level
VGL,Vsweep_L: low level of electricity
Detailed Description
As used herein, the terms "first," "second," and the like, do not denote any particular order or order, but rather are used to distinguish one element from another or from another.
Fig. 1 is a circuit architecture diagram illustrating a pixel driving circuit according to an embodiment. The pixel driving circuit 100 may be disposed on a backlight module of a display device to provide a backlight source, or disposed in a display panel as a pixel, which is not limited in this disclosure. The pixel driving circuit 100 includes a light emitting unit 110, switches T1-T13, a first capacitor C1 and a second capacitor C2. The light emitting unit 110 is, for example, a light emitting diode, and the size of the light emitting diode may be on the sub-millimeter scale or other suitable size, which is not limited in this disclosure.
The light emitting unit 110 has a first terminal 110-1 and a second terminal 110-2, and the first terminal 110-1 of the light emitting unit 110 is connected to an operating voltage VDD. The switch T1 has a control terminal T1-3, a first terminal T1-1 and a second terminal T1-2, the first terminal T1-1 of the switch T1 is connected to the second terminal 110-2 of the light emitting unit 110, and the second terminal T1-2 of the switch T1 is connected to the operation voltage VSS. In this embodiment, the operating voltage VSS is lower than the operating voltage VDD. The switch T2 has a control terminal T2-3, a first terminal T2-1 and a second terminal T2-2, the first terminal T2-1 of the switch T2 is connected to the operation voltage VSS, the second terminal T2-2 of the switch T2 is connected to the control terminal T1-3 of the switch T1, and the control terminal T2-3 of the switch T2 is connected to the control signal EM. The switch T3 has a control terminal T3-3, a first terminal T3-1 and a second terminal T3-2, the first terminal T3-1 of the switch T3 is connected to the operation voltage VSS, and the control terminal T3-3 of the switch T3 is connected to the control signal EM. The switch T4 has a control terminal T4-3, a first terminal T4-1 and a second terminal T4-2, the first terminal T4-1 of the switch T4 is connected to the control terminal T1-3 of the switch T1 and the second terminal T2-2 of the switch T2, and the control terminal T4-3 of the switch T4 is connected to the second terminal T3-2 of the switch T3. The switch T5 has a control terminal T5-3, a first terminal T5-1, a second terminal T5-2, and a switch T5The first terminal T5-1 is connected to the voltage VH, and the second terminal T5-2 of the switch T5 is connected to the second terminal T3-2 of the switch T3 and the control terminal T4-3 of the switch T4. The switch T6 has a control terminal T6-3, a first terminal T6-1 and a second terminal T6-2, the first terminal T6-1 of the switch T6 is connected to the control terminal T5-3 of the switch T5, and the second terminal T6-2 of the switch T6 is connected to the control signal VsweepThe control terminal T6-3 of the switch T6 is connected to the control signal S1. The switch T7 has a control terminal T7-3, a first terminal T7-1 and a second terminal T7-2, the second terminal T7-2 of the switch T7 is connected to the control terminal T5-3 of the switch T5 and the first terminal T6-1 of the switch T6, and the control terminal T7-3 of the switch T7 is connected to the control signal S2. The switch T8 has a control terminal T8-3, a first terminal T8-1 and a second terminal T8-2, wherein the first terminal T8-1 of the switch T8 is connected to the data voltage VDATAThe second terminal T8-2 of the switch T8 is connected to the control terminal T8-3 of the switch T8 and the first terminal T7-1 of the switch T7. The first capacitor C1 has a first terminal C1-1 and a second terminal C1-2, the first terminal C1-1 of the first capacitor C1 is connected to the control terminal T5-3 of the switch T5, the first terminal T6-1 of the switch T6 and the second terminal T7-2 of the switch T7, and the second terminal C1-2 of the first capacitor C1 is connected to the control signal V1-2sweep。
The switch T9 has a control terminal T9-3, a first terminal T9-1 and a second terminal T9-2, the first terminal T9-1 of the switch T9 is connected to the second terminal T1-2 of the switch T1 and the operation voltage VSS, and the control terminal T9-3 of the switch T9 is connected to the control signal EM. The switch T10 has a control terminal T10-3, a first terminal T10-1 and a second terminal T10-2, the first terminal T10-1 of the switch T10 is connected to the second terminal T9-2 of the switch T9, and the second terminal T10-2 of the switch T10 is connected to the diode voltage VLEDThe control terminal T10-3 of the switch T10 is connected to the control signal EM. The second capacitor C2 has a first terminal C2-1 and a second terminal C2-2, the first terminal C2-1 of the second capacitor C2 is connected to the second terminal T4-2 of the switch T4, and the second terminal C2-2 of the second capacitor C2 is connected to the second terminal T9-2 of the switch T9 and the first terminal T10-1 of the switch T10. The switch T11 has a control terminal T11-3, a first terminal T11-1 and a second terminal T11-2, the first terminal T11-1 of the switch T11 is connected to the second terminal T4-2 of the switch T4 and the first terminal C2-1 of the second capacitor C2, the second terminal T11-2 of the switch T11 is connected to the operating voltage VDD, and the control terminal T11-3 of the switch T11 is connected to the control signal S1. The switch T12 has a control terminal T12-3, a first terminal T12-1, a second terminal T12-2, and a first terminal of the switch T12The terminal T12-1 is connected to the second terminal T4-2 of the switch T4, the first terminal C2-1 of the second capacitor C2 and the first terminal T11-1 of the switch T11, and the control terminal T12-3 of the switch T12 is connected to the control signal S2. The switch T13 has a control terminal T13-3, a first terminal T13-1 and a second terminal T13-2, the first terminal T13-1 of the switch T13 is connected to the second terminal T12-2 of the switch T12 and the control terminal T13-3 of the switch T13, and the second terminal T13-2 of the switch T13 is connected to the reference voltage Vref.
In this embodiment, the switches T1 to T13 are, for example, thin film transistors (thin film transistors), wherein the switches T1 to T4, T6, T7, and T10 to T13 are N-type transistors, and the switches T5, T8, and T9 are P-type transistors. In addition, the threshold voltage of the switch T1 is matched to the threshold voltage of the switch T13, and the threshold voltage of the switch T5 is matched to the threshold voltage of the switch T8, and the technical effect of threshold voltage matching will be described in detail below.
Fig. 2 is a timing diagram illustrating various control signals in the pixel driving circuit according to one embodiment. Referring to fig. 2, the pixel driving circuit operates in the first period 210, the second period 220, the third period 230 and the fourth period 240 in sequence, and returns to the first period 210 after the fourth period 240 is finished.
Fig. 3 is a switching schematic diagram illustrating a pixel driving circuit during a first period according to an embodiment. Referring to fig. 2 and 3, the first period 210 is used to reset the pixel driving circuit 100. During the first period 210, the control signal S1 and the control signal EM are at the high level VGHThe control signal S2 is at a low level VGLControl signal VsweepAt a high level Vsweep_HWherein the high level VGHCan be the same or different from the high level Vsweep_HThe disclosure is not so limited. Therefore, during the first period 210, the switches T1, T4, T5, T7, T9, T12 are in the off state. The switches T2, T3, T6, T10, and T11 are in the on state. During the period, the potentials of the node A and the node D are the same as the operating voltage VSS; the potential of the node B is the same as the operating voltage VDD; the potential of the node C is the same as the diode voltage VLED(ii) a The potential of the node E is the same as the control signal Vsweep。
FIG. 4 illustrates a pixel driving circuit during a second period according to one embodimentSchematic diagram of the switch of (1). Referring to fig. 2 and 4, the second period 220 is used for voltage compensation. In the second period 220, the control signal S1 is at the low level VGLThe control signal S2 and the control signal EM are high level VGHControl signal VsweepAt a high level Vsweep_H. Therefore, the switches T1, T4, T5, T6, T9, T11 are in the off state, and the switches T2, T3, T7, T8, T12, T13 are in the on state. During this period, the potentials of the node A and the node D are the same as the operation voltage VSS. The potential of node B is Vref+VTH_T13In which V isTH_T13Is the threshold voltage of switch T13. The potential of the node C is the same as the diode voltage VLED. The potential of the node E is VDATA-|VTH_T8L, wherein VTH_T8Is the threshold voltage of switch T8.
Fig. 5 is a switching diagram illustrating a pixel driving circuit in a first sub-period during a third period according to an embodiment. Referring to fig. 2 and 5, the third period 230 is divided into a first sub-period 230-1 and a second sub-period 230-2, the light emitting unit 110 is turned off in the first sub-period 230-1, and the light emitting unit 110 is turned on and emits light in the second sub-period 230-2. The lengths of the first sub-period 230-1 and the second sub-period 230-2 are determined by the data voltage VDATAAnd (4) determining. In other words, in this embodiment, the light emitting unit 110 is driven by Pulse Width Modulation (PWM), so as to determine the brightness of the pixel. Specifically, the control signal S1, the control signal S2, and the control signal EM are at the low level V during the third period 230GLAnd control signal VsweepFrom a high level Vsweep_HGradually decreases to a low level Vsweep_LWherein the low level Vsweep_LMay be the same or different from the low level VGLThe disclosure is not so limited.
In the first sub-period 230-1, the switches T1 to T7, T10, T11, and T12 are off, and the switch T9 is on. The potentials of the node A, the node C and the node D are the same as the operation voltage VSS. The potential of the node C is from V of the second period 220LEDChange to VSS of the first sub-period 230-1 by VSS-VLEDSo that the potential of node B is from Vref+VTH_T13Change to Vref+VTH_T13+VSS-VLED. Similarly, the potential of the node E is VDATA-|VTH_T8|+ΔVsweepWherein Δ VsweepRepresenting the control signal VsweepDue to the control signal VsweepSince the potential of the node E gradually decreases, the switch T5 is switched to the on state when the following equation 1 holds, and then the second sub-period 230-2 is entered.
[ mathematical formula 1]
Wherein VEIndicates the potential of the node E, VTH_T5Is the threshold voltage of switch T5. It is noted that, since the threshold voltage of the switch T5 is matched to the threshold voltage of the switch T8, two threshold voltages | V in the formula 1TH_T5|、|VTH_T8I cancel each other out, i.e. remove the effect of the threshold voltage of the switch T5. Furthermore, when the data voltage VDATAThe larger the value, the earlier the equation 1 is established, and the earlier the second sub-period 230-2 is entered.
Fig. 6 is a switching diagram illustrating a pixel driving circuit during a second sub-period in a third period according to an embodiment. Referring to fig. 2 and 6, in the second sub-period 230-2, the switches T2, T3, T6, T7, T10 to T12 are turned off, and the switches T1, T4, T5, and T9 are turned on. The potential of the node C is the same as the operation voltage VSS, and the potential of the node E is the same as VDATA-|VTH_T8|+ΔVsweep. In addition, since the switch T5 is turned on, the voltage level of the node D is the same as the voltage VH. In this embodiment, the operating voltage VDD is greater than or equal to the voltage VHBut a voltage VHLarge enough to turn on switch T4. Voltage VHIs applied to the control terminal T4-3 of the switch T4 to make the switch T4 in a conducting state, and the potentials of the node A and the node B are the same as Vref+VTH_T13+VSS-VLEDThereby turning on switch T1 to generate current ILEDThe current ILEDFlows through the light emitting unit 110 and the switch T1. Current ILEDIs shown in the following mathematical formula 2, wherein K is a constant and VAIs the potential of node A, the threshold voltage VTH_T13、VTH_T1Cancel each other out.
[ mathematical formula 2]
By compensation of the operating voltage VSS and the threshold voltage, the current ILEDThe operating voltage VSS and the threshold voltage of any switch are not considered. In the prior art, when the driving current passes through more than two switches, voltage drop is generated when the current is larger, so that the switches can enter a linear region, and the problem can be solved by increasing the cross voltage between the operating voltages VDD and VSS, but the power consumption is improved. In contrast, the current ILEDOnly one switch T1 will flow, thus having the technical effect of reducing power consumption.
FIG. 7 is a switching diagram illustrating a pixel drive circuit during a fourth period according to one embodiment. Referring to fig. 2 and 7, the fourth period 240 is used to turn off the light emitting unit 110. During the fourth period 240, the control signals S1 and S2 are at a low level VGLControl signal EM is high level VGHControl signal VsweepAt a high level Vsweep_H. During this time, the switches T1, T4 to T7, T9, T11, and T12 are in the off state, and the switches T2, T3, and T10 are in the on state. The potentials of the node A and the node D are the same as the operation voltage VSS. The potential of node B is Vref+VTH_T13. The potential of the node C is the same as the diode voltage VLED. The potential of the node E is VDATA-|VTH_T8|。
In the above embodiments, "connected" may be a direct connection.
Although the present invention has been described with reference to the above embodiments, it should be understood that various changes and modifications can be made therein by those skilled in the art without departing from the spirit and scope of the invention.
Claims (10)
1. A pixel driving circuit comprising:
the light-emitting unit is provided with a first end and a second end, and the first end of the light-emitting unit is connected to a first operating voltage;
a first switch having a control terminal, a first terminal and a second terminal, wherein the first terminal of the first switch is connected to the second terminal of the light-emitting unit, and the second terminal of the first switch is connected to a second operating voltage;
a second switch having a control terminal, a first terminal and a second terminal, the first terminal of the second switch being connected to the second operating voltage, the second terminal of the second switch being connected to the control terminal of the first switch, the control terminal of the second switch being connected to a first control signal;
a third switch having a control end, a first end and a second end, the first end of the third switch being connected to the second operating voltage, the control end of the third switch being connected to the first control signal;
a fourth switch having a control end, a first end and a second end, the first end of the fourth switch being connected to the control end of the first switch and the second end of the second switch, the control end of the fourth switch being connected to the second end of the third switch;
a fifth switch having a control terminal, a first terminal and a second terminal, the first terminal of the fifth switch being connected to a first voltage, the second terminal of the fifth switch being connected to the second terminal of the third switch and the control terminal of the fourth switch;
a sixth switch having a control terminal, a first terminal and a second terminal, wherein the first terminal of the sixth switch is connected to the control terminal of the fifth switch, the second terminal of the sixth switch is connected to a second control signal, and the control terminal of the sixth switch is connected to a third control signal;
a seventh switch having a control end, a first end and a second end, the second end of the seventh switch being connected to the control end of the fifth switch and the first end of the sixth switch, the control end of the seventh switch being connected to a fourth control signal;
an eighth switch having a control terminal, a first terminal and a second terminal, the first terminal of the eighth switch being connected to a data voltage, the second terminal of the eighth switch being connected to the control terminal of the eighth switch and the first terminal of the seventh switch;
a first capacitor having a first end and a second end, the first end of the first capacitor being connected to the control end of the fifth switch, the first end of the sixth switch and the second end of the seventh switch, the second end of the first capacitor being connected to the third control signal;
a ninth switch having a control end, a first end and a second end, the first end of the ninth switch being connected to the second end of the first switch and the second operating voltage, the control end of the ninth switch being connected to the first control signal;
a tenth switch having a control terminal, a first terminal and a second terminal, the first terminal of the tenth switch being connected to the second terminal of the ninth switch, the second terminal of the tenth switch being connected to a diode voltage, the control terminal of the tenth switch being connected to the first control signal;
a second capacitor having a first end and a second end, wherein the first end of the second capacitor is connected to the second end of the fourth switch, and the second end of the second capacitor is connected to the second end of the ninth switch and the first end of the tenth switch;
an eleventh switch having a control terminal, a first terminal and a second terminal, wherein the first terminal of the eleventh switch is connected to the second terminal of the fourth switch and the first terminal of the second capacitor, the second terminal of the eleventh switch is connected to the first operating voltage, and the control terminal of the eleventh switch is connected to the third control signal;
a twelfth switch having a control end, a first end and a second end, the first end of the twelfth switch being connected to the second end of the fourth switch, the first end of the second capacitor and the first end of the eleventh switch, the control end of the twelfth switch being connected to the fourth control signal; and
a thirteenth switch having a control end, a first end and a second end, wherein the first end of the thirteenth switch is connected to the second end of the twelfth switch and the control end of the thirteenth switch, and the second end of the thirteenth switch is connected to a reference voltage.
2. The pixel driving circuit of claim 1, wherein the pixel driving circuit operates in a first period, a second period, a third period and a fourth period sequentially,
wherein in the first period, the first switch, the fourth switch, the fifth switch, the seventh switch, the ninth switch and the twelfth switch are in an off state, the second switch, the third switch, the sixth switch, the tenth switch and the eleventh switch are in an on state,
wherein in the second period, the first switch, the fourth switch, the fifth switch, the sixth switch, the ninth switch and the eleventh switch are in the off state, the second switch, the third switch, the seventh switch, the eighth switch, the tenth switch, the twelfth switch and the thirteenth switch are in the on state,
wherein in a first sub-period of the third period, the first to seventh switches, the tenth switch, the eleventh switch and the twelfth switch are in the off state, the ninth switch is in the on state,
wherein in a second sub-period of the third period, the second switch, the third switch, the sixth switch, the seventh switch, and the tenth to twelfth switches are in the off state, the first switch, the fourth switch, the fifth switch, and the ninth switch are in the on state,
in the fourth period, the first switch, the fourth switch, the seventh switch, the ninth switch, the eleventh switch and the twelfth switch are in the off state, and the second switch, the third switch and the tenth switch are in the on state.
3. The pixel driving circuit according to claim 2, wherein the first to fourth switches, the sixth switch, the seventh switch, the tenth switch, the eleventh switch, the twelfth switch and the thirteenth switch are N-type transistors, and the fifth switch, the eighth switch and the ninth switch are P-type transistors.
4. The pixel driving circuit as claimed in claim 3, wherein a threshold voltage of the first switch is matched to a threshold voltage of the thirteenth switch, and a threshold voltage of the fifth switch is matched to a threshold voltage of the eighth switch.
5. The pixel driving circuit according to claim 3, wherein during the first period, the first control signal and the third control signal are at a first high level, the second control signal is at a second high level, the fourth control signal is at a first low level,
wherein during the second period, the first control signal and the fourth control signal are at the first high level, the second control signal is at the second high level, the third control signal is at the first low level,
wherein during the third period, the first control signal, the third control signal and the fourth control signal are at the first low level, the second control signal gradually decreases from the second high level to a second low level,
in the fourth period, the first control signal is at the first high level, the second control signal is at the second high level, and the third control signal and the fourth control signal are at the first low level.
6. The pixel driving circuit according to claim 5, wherein the first operating voltage is greater than the second operating voltage, and the first operating voltage is equal to or greater than the first voltage.
7. The pixel driving circuit as claimed in claim 1, wherein the light emitting unit is a light emitting diode.
8. A pixel driving circuit as claimed in claim 7, wherein the size of the light emitting diode is sub-millimeter.
9. The pixel driving circuit according to claim 1, wherein the pixel driving circuit is disposed in a display panel.
10. The pixel driving circuit as claimed in claim 1, wherein the pixel driving circuit is disposed in a backlight module.
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US202063037293P | 2020-06-10 | 2020-06-10 | |
US63/037,293 | 2020-06-10 | ||
TW109145074 | 2020-12-18 | ||
TW109145074A TWI742967B (en) | 2020-06-10 | 2020-12-18 | Pixel driving circuit |
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