CN113067464B - NMOS power tube grid driving module, driving circuit and switching power supply - Google Patents

NMOS power tube grid driving module, driving circuit and switching power supply Download PDF

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CN113067464B
CN113067464B CN202110611418.6A CN202110611418A CN113067464B CN 113067464 B CN113067464 B CN 113067464B CN 202110611418 A CN202110611418 A CN 202110611418A CN 113067464 B CN113067464 B CN 113067464B
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power tube
current
voltage
base
emitter
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CN113067464A (en
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贾生龙
李瑞平
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Shanghai Xinlong Semiconductor Technology Co ltd
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Shanghai Xinlong Semiconductor Technology Co ltd
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H1/00—Details of emergency protective circuit arrangements
    • H02H1/0007—Details of emergency protective circuit arrangements concerning the detecting means
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H7/00—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions
    • H02H7/10—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers
    • H02H7/12—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers for static converters or rectifiers
    • H02H7/1203—Circuits independent of the type of conversion

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  • Power Engineering (AREA)
  • Power Conversion In General (AREA)

Abstract

The invention provides an NMOS power tube grid driving module, a driving circuit and a switching power supply, and relates to the technical field of switching power supplies. The NMOS power tube grid electrode driving module is simple in internal circuit and suitable for a switching power supply driving circuit and a boost switching power supply. The NMOS power tube is rapidly turned on and off, so that the problem of large turn-on and turn-off loss when the NMOS power tube is applied to a switching power supply chip is solved, and the NMOS power tube has an overcurrent detection function and has the advantages of simple structure, low cost and high reliability.

Description

NMOS power tube grid driving module, driving circuit and switching power supply
Technical Field
The invention relates to the technical field of switching power supplies, in particular to an NMOS power tube grid driving module, a driving circuit and a switching power supply.
Background
The power tube inside the switch power supply chip has two types, namely a power triode and a power MOS tube, the power MOS tube is divided into a PMOS power tube and an NMOS power tube, and for the boost chip, a control circuit which selects the PMOS tube as the switch tube is completely different from a control circuit which selects the NMOS tube as the switch tube.
When different types of power MOS tubes work, the majority of carriers in the power MOS tubes are different, and compared with a PMOS power tube, the NMOS power tube has smaller on-resistance Rdson under the same unit area. Under the condition that the on-resistance Rdson is the same, the inter-electrode parasitic capacitance Ciss of the NMOS power tube is smaller than that of the PMOS power tube. And the larger the on-resistance Rdson of the power MOS tube is, the larger the on-loss of the switching power supply chip is, and the larger the parasitic capacitance Ciss is, the larger the switching loss of the power supply chip is. Therefore, the NMOS power tube has relatively better performance and wider application prospect.
When the NMOS power transistor is used as a power switch transistor in a switching power supply chip, the NMOS power transistor driving circuit often needs to add an external BOOST capacitor to provide a stable power supply for the driving circuit, a corresponding capacitor charging circuit, a level shift circuit and a driving circuit are also required to be arranged inside the chip, and the internal circuit structure is complex. In the prior art, overcurrent detection usually realizes overcurrent protection by sampling part of power tube current and calculating the current value of the power tube of the whole chip through proportion conversion, but the sampling precision is influenced by the integrated circuit process, the error is large, and the problem of poor precision of the sampled current exists.
Disclosure of Invention
In order to overcome the defects of the prior art, the invention provides the NMOS power tube grid driving module, the driving circuit and the switching power supply.
In order to achieve the above object, an embodiment of the present invention provides an NMOS power transistor gate driving module, including: the device comprises a reference current source module, a power tube driving module and an overcurrent detection module, wherein the reference current source module, the power tube driving module and the overcurrent detection module are realized by adopting a transistor integrated circuit process; the input end of the reference current source module comprises a VREF control signal end, the output end of the reference current source module is connected with the power tube driving module, and the reference voltage of the VREF control signal end is used for providing bias current for the power tube driving module; the input end of the power tube driving module comprises a DRIVER control signal end, the output end of the power tube driving module comprises a GATE signal output end, and the output signal of the GATE signal output end is controlled by acquiring the bias current of the reference current source module and the first control signal of the DRIVER control signal end, so that the on and off of an NMOS power tube externally connected with the GATE signal output end are controlled; the input end of the over-current detection module comprises a SOURCE signal input end, the output end of the over-current detection module comprises an OCP signal output end, the over-current detection module detects sampling voltage, the sampling voltage is the voltage of input current of the SOURCE signal input end at two ends of a sampling resistor, when the input current rises to an over-current value Iocp, the sampling voltage rises to an over-current protection voltage set threshold value, the voltage of the OCP signal output end rises to an over-current protection trigger voltage, and therefore an OCP over-current protection signal is output.
Optionally, the over-current detection module adjusts a first comparison current and a second comparison current according to the sampling voltage, and controls the OCP signal output end to output an OCP over-current protection signal when the sampling voltage increases until the first comparison current is equal to the second comparison current; the voltage of the first end of the sampling resistor is the voltage of the overcurrent first comparison end, the voltage of the second end of the sampling resistor is the voltage of the overcurrent second comparison end, the first comparison current is the current of the VREF control signal end flowing through the overcurrent first comparison end, and the second comparison current is the current of the VREF control signal end flowing through the overcurrent second comparison end.
Optionally, when the first control signal is at a high level, the parasitic capacitor of the NMOS power tube is charged through a GATE signal output terminal, so that the NMOS power tube is rapidly turned on; when the first control signal is at a low level, the parasitic capacitance of the NMOS power tube discharges the gnd end through the GATE signal output end, so that the NMOS power tube is quickly turned off.
Optionally, the reference current source module includes: PNP triode Q1, NPN triode Q2, resistance R1; wherein the emitter of Q1 is connected with the input voltage vcc terminal, the base of Q1 is used as the output terminal of the reference current source module and is connected with the collector of Q1, and the collector of Q1 is connected with the collector of Q2; the base of Q2 is connected with VREF control signal end, and the emitter of Q2 is connected with the first end of R1; a second terminal of R1 is connected to gnd terminal.
Optionally, the power tube driving module includes: the PNP triode Q3, the NPN triode Q4, the PNP triode Q5, the PNP triode Q6, the NPN triode Q7, the PNP triode Q8, the NPN triode Q9, the PNP triode Q10, the NPN triode Q11, the NPN triode Q12, the NPN triode Q13, a resistor R2, a resistor R3 and a voltage regulator DZ 1; the emitter of Q3 is connected with the input voltage end of vcc, the base of Q3 is connected with the base of Q1, and the collector of Q3 is respectively connected with the collector of Q4 and the base of Q5; the base electrode of Q4 is connected with the DRIVER control signal end, and the emitter electrode of Q4 is connected with the gnd end; an emitter of Q5 is connected with a positive electrode of DZ1, and a collector of Q5 is connected with a gnd terminal; an emitter of Q6 is connected with a vcc input voltage end, a base of Q6 is connected with a base of Q3, and a collector of Q6 is respectively connected with a collector of Q7 and a base of Q11; the base electrode of Q7 is connected with the DRIVER control signal end, and the emitter electrode of Q7 is connected with the gnd end; an emitter of Q8 is connected with a vcc input voltage end, a base of Q8 is connected with a base of Q6, and a collector of Q8 is respectively connected with a collector of Q9 and a base of Q13; the base electrode of Q9 is connected with the DRIVER control signal end, and the emitter electrode of Q9 is connected with the gnd end; an emitter of Q10 is connected with a vcc input voltage end, a base of Q10 is connected with a base of Q8, and a collector of Q10 is respectively connected with a cathode of DZ1, a collector of Q11 and a base of Q12; the Q11 emitter is connected with gnd terminal; a collector of Q12 is connected with a vcc input voltage end, a base of Q12 is connected with a first end of R2, and an emitter of Q12 is respectively connected with a second end of R2, a collector of Q13 and a GATE signal output end; the Q13 emitter is connected with gnd terminal; the first end of R3 is connected to the GATE signal output end, and the second end of R3 is connected to gnd.
Optionally, the over-current detection module includes: the device comprises an NPN triode Q14, an NPN triode Q15, a resistor R4, a resistor R5 and a resistor R6; wherein R4 is a sampling resistor; a collector of Q14 is respectively connected with the second end of R5 and the OCP signal output end, a base of Q14 is respectively connected with a base of Q15 and a collector of Q15, and an emitter of Q14 is connected with the first end of R4; a collector of Q15 is connected with the second end of R6, and an emitter of Q15 is connected with the second end of R4; the first end of R4 is connected with the SOURCE signal input end; a second end of R4 is connected with gnd end; a first end of R5 is connected with a VREF control signal end; a first terminal of R6 is connected to the VREF control signal terminal.
Optionally, the overcurrent first comparing end is a Q14 emitter, and the overcurrent second comparing end is a Q15 emitter.
Optionally, the ratio of reverse saturation currents IsQ14, IsQ15 of the Q14 and Q15 emitter junctions is N: 1.
the embodiment of the invention provides a switching power supply driving circuit, which comprises: the NMOS power tube, the power inductor and the NMOS power tube grid driving module are characterized in that a first end of the power inductor is connected with a vcc input voltage end of the NMOS power tube grid driving module, a grid of the NMOS power tube is connected with a GATE signal output end of the NMOS power tube grid driving module, a drain of the NMOS power tube is connected with a second end of the power inductor, a SOURCE of the NMOS power tube is connected with a SOURCE signal input end of the NMOS power tube grid driving module, and a gnd end of the NMOS power tube grid driving module is connected with an external ground gnd end.
The embodiment of the invention also provides a boost switching power supply which comprises the switching power supply driving circuit.
In conclusion, the beneficial effects of the invention are as follows:
according to the NMOS power tube grid electrode driving module, the output signal of the GATE signal output end is controlled through the first control signal of the DRIVER control signal end, so that the connection and disconnection of an NMOS power tube externally connected with the GATE signal output end are controlled, and the switching loss of the power tube in a switching power supply is greatly reduced; and by detecting the sampling voltage of the input current of the SOURCE signal input end at two ends of the sampling resistor, when the input current rises to an overcurrent value Iocp, the sampling voltage rises to an overcurrent protection voltage set threshold value, and the voltage of the OCP signal output end rises to an overcurrent protection trigger voltage, so that an OCP overcurrent protection signal is output to realize an overcurrent protection function. Compared with the existing overcurrent protection circuit, the embodiment of the invention has the advantages of small error and high precision.
According to the NMOS power tube gate drive module, the voltage difference between the gate voltage and the source voltage of the NMOS power tube is controlled at a fixed value, and the conduction loss of the NMOS tube is further reduced.
The switching power supply driving circuit and the switching power supply do not need additional BOOST capacitors for maintaining the grid electrode and source electrode working voltage of the NMOS tube, greatly simplify the internal circuit of the grid electrode driving module of the NMOS power tube, and have the characteristics of simple structure, low cost and high reliability.
In order to make the aforementioned and other objects, features and advantages of the present invention comprehensible, preferred embodiments accompanied with figures are described in detail below.
Drawings
Fig. 1 is a schematic structural diagram of a switching power supply according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of a gate driving module of an NMOS power transistor according to an embodiment of the present invention;
fig. 3 is a simulation waveform diagram of the DRIVER control signal terminal and the GATE signal output terminal provided by the embodiment of the present invention;
fig. 4 is a simulation diagram of an overcurrent protection function of the overcurrent detection module according to the embodiment of the present invention.
Detailed Description
The present invention will be described in further detail below with reference to specific examples in order to facilitate understanding by those skilled in the art.
Referring to fig. 1, a switching power supply according to an embodiment of the present invention includes a power circuit 20, an output circuit 30, and a switching power supply driving circuit 10. One end of the switching power supply driving circuit 10 is connected to the power supply circuit 20, and the other end of the switching power supply driving circuit 10 is connected to the output circuit 30. The switching power supply is a boost switching power supply.
In this embodiment, the power supply circuit 20 includes an input dc power vcc and an input filter capacitor C1 connected in parallel.
The output circuit 30 comprises a schottky diode D1, an energy storage capacitor C2 and a load resistor RL, wherein the anode of the schottky diode D1 is connected with the drain of the NMOS power tube M1 and the second end of the power inductor L1, the cathode of the schottky diode D1 is connected with the first ends of the energy storage capacitor C2 and the load resistor RL, and the second ends of the energy storage capacitor C2 and the load resistor RL are grounded.
The switching power supply drive circuit 10 includes: the power SOURCE circuit comprises an NMOS power tube M1, a power inductor L1 and an NMOS power tube GATE drive module 100, wherein a first end of the power inductor L1 is connected with a vcc input voltage end of the NMOS power tube GATE drive module 100, a GATE of the NMOS power tube M1 is connected with a GATE signal output end of the NMOS power tube GATE drive module 100, a drain of the NMOS power tube M1 is connected with a second end of the power inductor L1, a SOURCE of the NMOS power tube M1 is connected with a SOURCE signal input end of the NMOS power tube GATE drive module 100, and a gnd end of the NMOS power tube GATE drive module 100 is connected with an external ground gnd end.
In the embodiment of the present invention, the power circuit 20 and the output circuit 30 are only one implementation manner of a switch circuit, and a person skilled in the art may select different power circuits and output circuits as needed, which is not described herein again.
The switching power supply driving circuit and the switching power supply do not need additional BOOST capacitors for maintaining the grid electrode and source electrode working voltage of the NMOS tube, greatly simplify the internal circuit of the grid electrode driving module of the NMOS power tube, and have the characteristics of simple structure, low cost and high reliability.
In the embodiment of the present invention, referring to fig. 2, the NMOS power transistor gate driving module includes a reference current source module 1001, a power transistor driving module 1002, and an over-current detection module 1003, and the reference current source module 1001, the power transistor driving module 1002, and the over-current detection module 1003 are implemented by using a transistor integrated circuit process. Compared with a traditional switching power supply chip of a CMOS (complementary metal oxide semiconductor) process, each device in the NMOS power tube grid driving module is isolated from each other, so that the NMOS power tube grid driving module has good latch-up resistance and anti-interference capability and is suitable for a high-voltage high-power switching power supply.
In this embodiment, the input end of the reference current source module 1001 includes a VREF control signal end, the output end of the reference current source module 1001 is connected to the power tube driver module 1002, and the reference voltage of the VREF control signal end is used to provide a bias current for the power tube driver module 1002; the input end of the power tube driving module 1002 comprises a DRIVER control signal end, the output end of the power tube driving module 1002 comprises a GATE signal output end, and the output signal of the GATE signal output end is controlled by acquiring the bias current of the reference current source module 1001 and the first control signal of the DRIVER control signal end, so that the on and off of an NMOS power tube externally connected with the GATE signal output end are controlled; the input end of the over-current detection module 1003 comprises a SOURCE signal input end, the output end of the over-current detection module 1003 comprises an OCP signal output end, the over-current detection module 1003 detects the sampling voltage of the input current of the SOURCE signal input end at two ends of a sampling resistor, when the input current rises to an over-current value Iocp, the sampling voltage rises to an over-current protection voltage set threshold value, the voltage of the OCP signal output end rises to an over-current protection trigger voltage, and therefore an OCP over-current protection signal is output.
Specifically, in this embodiment, the reference current source module 1001 includes: PNP triode Q1, NPN triode Q2, resistance R1; wherein the emitter of Q1 is connected with the input voltage vcc terminal, the base of Q1 is used as the output terminal of the reference current source module and is connected with the collector of Q1, and the collector of Q1 is connected with the collector of Q2; the base of Q2 is connected with VREF control signal end, and the emitter of Q2 is connected with the first end of R1; a second terminal of R1 is connected to gnd terminal.
In this embodiment, when the first control signal of the DRIVER control signal terminal is at a high level, the power tube driving module 1002 charges the parasitic capacitance of the NMOS power tube through the GATE signal output terminal, so that the NMOS power tube is turned on quickly; when the first control signal is at a low level, the parasitic capacitance of the NMOS power tube discharges the gnd end through the GATE signal output end, so that the NMOS power tube is quickly turned off.
In other embodiments, when the first control signal of the DRIVER control signal terminal may also be at a low level, the power tube driving module charges the parasitic capacitance of the NMOS power tube through the GATE signal output terminal, so that the NMOS power tube is turned on quickly; and when the level is high, the GND end is discharged through the GATE signal output end, so that the NMOS power tube is quickly turned off.
Specifically, in this embodiment, the power tube driving module 1002 includes: the PNP triode Q3, the NPN triode Q4, the PNP triode Q5, the PNP triode Q6, the NPN triode Q7, the PNP triode Q8, the NPN triode Q9, the PNP triode Q10, the NPN triode Q11, the NPN triode Q12, the NPN triode Q13, a resistor R2, a resistor R3 and a voltage regulator DZ 1; the emitter of Q3 is connected with the input voltage end of vcc, the base of Q3 is connected with the base of Q1, and the collector of Q3 is respectively connected with the collector of Q4 and the base of Q5; the base electrode of Q4 is connected with the DRIVER control signal end, and the emitter electrode of Q4 is connected with the gnd end; an emitter of Q5 is connected with a positive electrode of DZ1, and a collector of Q5 is connected with a gnd terminal; an emitter of Q6 is connected with a vcc input voltage end, a base of Q6 is connected with a base of Q3, and a collector of Q6 is respectively connected with a collector of Q7 and a base of Q11; the base electrode of Q7 is connected with the DRIVER control signal end, and the emitter electrode of Q7 is connected with the gnd end; an emitter of Q8 is connected with a vcc input voltage end, a base of Q8 is connected with a base of Q6, and a collector of Q8 is respectively connected with a collector of Q9 and a base of Q13; the base electrode of Q9 is connected with the DRIVER control signal end, and the emitter electrode of Q9 is connected with the gnd end; an emitter of Q10 is connected with a vcc input voltage end, a base of Q10 is connected with a base of Q8, and a collector of Q10 is respectively connected with a cathode of DZ1, a collector of Q11 and a base of Q12; the Q11 emitter is connected with gnd terminal; a collector of Q12 is connected with a vcc input voltage end, a base of Q12 is connected with a first end of R2, and an emitter of Q12 is respectively connected with a second end of R2, a collector of Q13 and a GATE signal output end; the Q13 emitter is connected with gnd terminal; the first end of R3 is connected to the GATE signal output end, and the second end of R3 is connected to gnd.
In this embodiment, the over-current detection module 1003 adjusts a first comparison current and a second comparison current according to the sampling voltage, and controls the OCP signal output end to output an OCP over-current protection signal when the sampling voltage increases to a value that the first comparison current is equal to the second comparison current; the voltage of the first end of the sampling resistor is the voltage of the overcurrent first comparison end, the voltage of the second end of the sampling resistor is the voltage of the overcurrent second comparison end, the first comparison current is the current of the VREF control signal end flowing through the overcurrent first comparison end, and the second comparison current is the current of the VREF control signal end flowing through the overcurrent second comparison end.
Specifically, in this embodiment, the over-current detection module 1003 includes: the device comprises an NPN triode Q14, an NPN triode Q15, a resistor R4, a resistor R5 and a resistor R6; wherein R4 is a sampling resistor; a collector of Q14 is respectively connected with the second end of R5 and the OCP signal output end, a base of Q14 is respectively connected with a base of Q15 and a collector of Q15, and an emitter of Q14 is connected with the first end of R4; a collector of Q15 is connected with the second end of R6, and an emitter of Q15 is connected with the second end of R4; the first end of R4 is connected with the SOURCE signal input end; a second end of R4 is connected with gnd end; a first end of R5 is connected with a VREF control signal end; a first terminal of R6 is connected to the VREF control signal terminal.
In this embodiment, the over-current first comparison terminal is a Q14 emitter, and the over-current second comparison terminal is a Q15 emitter.
In this embodiment, the ratio of reverse saturation currents IsQ14, IsQ15 of the Q14 and Q15 emitter junctions is N: 1 and N are generally controlled within ten, and can be adjusted according to different set thresholds of the overcurrent protection voltage. The overcurrent protection voltage setting threshold value of the embodiment of the invention only depends on the parameter N, VT and can be preset, so that the overcurrent current value Iocp and the overcurrent protection trigger voltage are accurately determined through the overcurrent protection voltage setting threshold value.
The working principle of the embodiment of the invention is as follows:
the reference current source module 1001 generates a reference current I1 according to the reference voltage at the VREF control signal terminal. The concrete formula is as follows: i1= (VREF-Vbe 2)/R1. VREF is the reference voltage of the VREF control signal terminal, and Vbe2 is the junction voltage drop between the base and the emitter of transistor Q2. The reference current I1 provides a bias current for the power transistor driver module 1002.
The power tube driving module 1002 controls the on and off of an NMOS power tube externally connected to the GATE signal output end by obtaining the bias current and the first control signal of the DRIVER control signal end.
Referring to fig. 2 and 3, when the first control signal is high, Q7 and Q9 are turned on, Q11 and Q13 are turned off, and Q4 and Q5 are turned on. When Q5 is turned on and Q11 and Q13 are turned off, DZ1 is broken down, the breakdown voltage is VDZ, the voltage at the point A is clamped at VDZ, Q12 is turned on, the voltage of the GATE signal output end is the difference between VDZ and the voltage Vbe of the base electrode and the collector electrode of Q12 and is larger than the starting voltage Vth of the NMOS power tube, and at the moment, power voltage ends vcc, Q12 and the GATE signal output end form a path to charge the parasitic capacitance of the NMOS power tube and enable the NMOS power tube to be rapidly turned on.
When the first control signal is at low level, Q7 and Q9 are turned off, Q11 and Q13 are turned on, the voltage at point a is at low level, and the voltage at the GATE signal output terminal is at low level. At this time, Q12 is turned off, Q13 is turned on, the parasitic capacitance of the NMOS power transistor is discharged to the ground through Q13, and the NMOS power transistor is rapidly turned off.
In the power tube driving module 1002, R2 is used for setting the initial state of Q12 to be off, R3 is used for pulling down the signal at the GATE signal output end, and R2 and R3 can ensure that the NMOS tube is in the off state before the first control signal at the drive control signal end is generated in the initial power-on stage, so as to avoid a logic error of the NMOS power tube GATE driving module 100.
Referring to fig. 2, in the over-current detection module 1003, Q14, Q15, R4, R5 and R6 form a PTAT circuit. The resistance of R5 is equal to that of R6, the ratio of reverse saturation currents IsQ14, IsQ15 of the Q14 and Q15 emitter junctions is N: 1. the voltage VR4 at the two ends of the sampling resistor R4 is the difference between the base collector voltages of Q14 and Q15, and VR4= VbeQ15-VbeQ 14. According to the formula Vbe = VT l n (I/Is), wherein VT = kT/q, k Is Boltzmann constant, T Is thermodynamic temperature, q Is electric quantity of electrons, and Is reverse saturation current of the emitter junction; vbe is the junction voltage drop between the base and emitter of the triode. VR4= VT × ln (I4/IsQ 15) -VT × ln (I3/IsQ 14).
Referring to fig. 4, fig. 4 is a simulation diagram of the overcurrent protection function of the overcurrent detection module, when the NMOS power transistor is turned off, I3 is approximately equal to N × I4, and OCP is low. When the NMOS power transistor is turned on, the voltage VR4 across the sampling resistor R4 gradually increases as the input current I2 at the SOURCE signal input terminal gradually increases. Since VR4 increases linearly, the value of VbeQ14 decreases almost proportionally, and the value of VbeQ15 increases slightly, so that the current I3 flowing through Q14 becomes gradually smaller. According to the formula VOCP = VREF-I3R 5, wherein the reference voltage and R5 resistance are unchanged, the current I3 decreases, so that the voltage value VOCP at the OCP signal output terminal gradually increases and the OCP signal output terminal is gradually raised. On the other hand, a slight increase in the value of VbeQ15 results in a gradually larger current I4 flowing through Q15. When the current I3 is equal to the current I4, the input current I2 rises to an overcurrent current value Iocp, the voltage across the sampling resistor R4 rises to an overcurrent protection voltage setting threshold, the voltage at the OCP signal output end reaches an overcurrent protection trigger voltage, and the OCP signal output end outputs an OCP overcurrent protection signal.
According to the formula: VR4= I2 × R4= VbeQ15-VbeQ14= VT × ln (I4/IsQ 15) -VT × ln (I3/IsQ14) = VT × ln. VT lnN sets a threshold for the over-current protection voltage. At normal temperature, T =300K, VT is about 26mV, N is usually controlled within ten, so VT is tens of mV.
The above description is only a preferred embodiment of the present invention, and the protection scope of the present invention is not limited to the above embodiments, and all technical solutions belonging to the idea of the present invention belong to the protection scope of the present invention. It should be noted that modifications and embellishments within the scope of the invention may occur to those skilled in the art without departing from the principle of the invention, and are considered to be within the scope of the invention.

Claims (9)

1. An NMOS power tube gate drive module, comprising: the device comprises a reference current source module, a power tube driving module and an overcurrent detection module, wherein the reference current source module, the power tube driving module and the overcurrent detection module are realized by adopting a transistor integrated circuit process;
the input end of the reference current source module comprises a VREF control signal end, the output end of the reference current source module is connected with the power tube driving module, and the reference voltage of the VREF control signal end is used for providing bias current for the power tube driving module;
the input end of the power tube driving module comprises a DRIVER control signal end, the output end of the power tube driving module comprises a GATE signal output end, and the output signal of the GATE signal output end is controlled by acquiring the bias current of the reference current source module and the first control signal of the DRIVER control signal end, so that the on and off of an NMOS power tube externally connected with the GATE signal output end are controlled;
the input end of the over-current detection module comprises a SOURCE signal input end, the output end of the over-current detection module comprises an OCP signal output end, the over-current detection module detects sampling voltage, the sampling voltage is the voltage of input current of the SOURCE signal input end at two ends of a sampling resistor, when the input current rises to an over-current value Iocp, the sampling voltage rises to an over-current protection voltage set threshold value, the voltage of an OCP signal output end rises to an over-current protection trigger voltage, so that an OCP over-current protection signal is output, the over-current detection module adjusts first comparison current and second comparison current according to the sampling voltage, and when the sampling voltage is increased to the condition that the first comparison current is equal to the second comparison current, the OCP signal output end is controlled to output an OCP over-current protection signal; the voltage of the first end of the sampling resistor is the voltage of the overcurrent first comparison end, the voltage of the second end of the sampling resistor is the voltage of the overcurrent second comparison end, the first comparison current is the current of the VREF control signal end flowing through the overcurrent first comparison end, and the second comparison current is the current of the VREF control signal end flowing through the overcurrent second comparison end.
2. The GATE driver module of the NMOS power transistor of claim 1, wherein when the first control signal is high, the parasitic capacitor of the NMOS power transistor is charged through a GATE signal output terminal, so that the NMOS power transistor is turned on quickly; when the first control signal is at a low level, the parasitic capacitance of the NMOS power tube discharges the gnd end through the GATE signal output end, so that the NMOS power tube is quickly turned off.
3. The NMOS power tube gate drive module of claim 1, wherein said reference current source module comprises: PNP triode Q1, NPN triode Q2, resistance R1; wherein the emitter of Q1 is connected with the input voltage vcc terminal, the base of Q1 is used as the output terminal of the reference current source module and is connected with the collector of Q1, and the collector of Q1 is connected with the collector of Q2; the base of Q2 is connected with VREF control signal end, and the emitter of Q2 is connected with the first end of R1; a second terminal of R1 is connected to gnd terminal.
4. The NMOS power transistor gate drive module of claim 1, wherein said power transistor drive module comprises: the PNP triode Q3, the NPN triode Q4, the PNP triode Q5, the PNP triode Q6, the NPN triode Q7, the PNP triode Q8, the NPN triode Q9, the PNP triode Q10, the NPN triode Q11, the NPN triode Q12, the NPN triode Q13, a resistor R2, a resistor R3 and a voltage regulator DZ 1; the emitter of Q3 is connected with the input voltage end of vcc, the base of Q3 is connected with the base of Q1, and the collector of Q3 is respectively connected with the collector of Q4 and the base of Q5; the base electrode of Q4 is connected with the DRIVER control signal end, and the emitter electrode of Q4 is connected with the gnd end; an emitter of Q5 is connected with a positive electrode of DZ1, and a collector of Q5 is connected with a gnd terminal; an emitter of Q6 is connected with a vcc input voltage end, a base of Q6 is connected with a base of Q3, and a collector of Q6 is respectively connected with a collector of Q7 and a base of Q11; the base electrode of Q7 is connected with the DRIVER control signal end, and the emitter electrode of Q7 is connected with the gnd end; an emitter of Q8 is connected with a vcc input voltage end, a base of Q8 is connected with a base of Q6, and a collector of Q8 is respectively connected with a collector of Q9 and a base of Q13; the base electrode of Q9 is connected with the DRIVER control signal end, and the emitter electrode of Q9 is connected with the gnd end; an emitter of Q10 is connected with a vcc input voltage end, a base of Q10 is connected with a base of Q8, and a collector of Q10 is respectively connected with a cathode of DZ1, a collector of Q11 and a base of Q12; the Q11 emitter is connected with gnd terminal; a collector of Q12 is connected with a vcc input voltage end, a base of Q12 is connected with a first end of R2, and an emitter of Q12 is respectively connected with a second end of R2, a collector of Q13 and a GATE signal output end; the Q13 emitter is connected with gnd terminal; the first end of R3 is connected to the GATE signal output end, and the second end of R3 is connected to gnd.
5. The NMOS power tube gate driver module of claim 1, wherein said over-current detection module comprises: the device comprises an NPN triode Q14, an NPN triode Q15, a resistor R4, a resistor R5 and a resistor R6; wherein R4 is a sampling resistor; a collector of Q14 is respectively connected with the second end of R5 and the OCP signal output end, a base of Q14 is respectively connected with a base of Q15 and a collector of Q15, and an emitter of Q14 is connected with the first end of R4; a collector of Q15 is connected with the second end of R6, and an emitter of Q15 is connected with the second end of R4; the first end of R4 is connected with the SOURCE signal input end; a second end of R4 is connected with gnd end; a first end of R5 is connected with a VREF control signal end; a first terminal of R6 is connected to the VREF control signal terminal.
6. The NMOS power transistor gate drive module of claim 5, wherein the over-current first comparison terminal is a Q14 emitter and the over-current second comparison terminal is a Q15 emitter.
7. The NMOS power transistor gate drive module of claim 5, wherein a ratio of reverse saturation currents IsQ14, IsQ15 of the Q14 and Q15 emitter junctions is N: 1, wherein N is controlled to be within ten.
8. A switching power supply driving circuit, comprising: the NMOS power tube, the power inductor and the GATE drive module of the NMOS power tube as claimed in any one of claims 1 to 7, wherein a first end of the power inductor is connected to a vcc input voltage end of the GATE drive module of the NMOS power tube, a GATE of the NMOS power tube is connected to a GATE signal output end of the GATE drive module of the NMOS power tube, a drain of the NMOS power tube is connected to a second end of the power inductor, a SOURCE of the NMOS power tube is connected to a SOURCE signal input end of the GATE drive module of the NMOS power tube, and a gnd end of the GATE drive module of the NMOS power tube is connected to an external gnd end.
9. A switching power supply characterized by comprising the switching power supply drive circuit according to claim 8.
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