CN113067320B - Surge protection circuit and voltage adjustment method for surge protection circuit - Google Patents

Surge protection circuit and voltage adjustment method for surge protection circuit Download PDF

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Publication number
CN113067320B
CN113067320B CN202110343537.8A CN202110343537A CN113067320B CN 113067320 B CN113067320 B CN 113067320B CN 202110343537 A CN202110343537 A CN 202110343537A CN 113067320 B CN113067320 B CN 113067320B
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voltage
electrically connected
ptvs
interface
vrwm
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CN113067320A (en
Inventor
王勇
李兵虎
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Vivo Mobile Communication Co Ltd
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Vivo Mobile Communication Co Ltd
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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02HEMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H9/00Emergency protective circuit arrangements for limiting excess current or voltage without disconnection
    • H02H9/005Emergency protective circuit arrangements for limiting excess current or voltage without disconnection avoiding undesired transient conditions
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02HEMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H9/00Emergency protective circuit arrangements for limiting excess current or voltage without disconnection
    • H02H9/04Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess voltage
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02HEMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H9/00Emergency protective circuit arrangements for limiting excess current or voltage without disconnection
    • H02H9/04Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess voltage
    • H02H9/045Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess voltage adapted to a particular application and not provided for elsewhere
    • H02H9/046Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess voltage adapted to a particular application and not provided for elsewhere responsive to excess voltage appearing at terminals of integrated circuits
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02HEMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H3/00Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection
    • H02H3/006Calibration or setting of parameters

Abstract

The application discloses a surge protection circuit and a voltage regulation method of the surge protection circuit, wherein the surge protection circuit comprises a first interface, a second interface, a PTVS (pulse time versus voltage) tube, a voltage detector, a voltage controller and a voltage reducer; the cathode of the PTVS tube is electrically connected with the output end of the voltage reducer, the anode of the PTVS tube is electrically connected with the second interface, and the second interface is grounded; the voltage detector is electrically connected with the first interface and is used for detecting a first voltage, and the voltage detector is connected with the voltage controller so as to transmit the first voltage to the voltage controller; the input end of the voltage reducer is electrically connected with the first interface, the output end of the voltage reducer is electrically connected with the PTVS tube, and the control end of the voltage reducer is electrically connected with the voltage controller; the voltage controller is used for adjusting the second voltage of the output end of the voltage reducer according to the first voltage and the maximum reverse working voltage Vrwm of the PTVS tube so that the second voltage approaches the maximum reverse working voltage Vrwm.

Description

Surge protection circuit and voltage adjustment method for surge protection circuit
Technical Field
The application belongs to the technical field of electronics, and particularly relates to a surge protection circuit and a voltage adjustment method of the surge protection circuit.
Background
Power transient-voltage-suppression (PTVS) tubes are a common protection device used in current mobile phones and mobile devices. The PTVS tube can absorb surge fast, and damage to an integrated circuit caused by the surge is avoided. When the surge voltage reaches the maximum reverse operating voltage (Working reverse peak voltage, vrwm) of the PTVS transistor, the PTVS transistor avalanche breaks down forming a dump path to ground, leading the surge voltage to ground, thereby protecting the integrated circuit.
Vrwm of the PTVS tube is a fixed value, but the voltage of the integrated circuit typically varies according to the battery voltage. For example, vrwm of some PTVS tubes is 5V, while the voltage of the integrated circuit varies with the battery voltage, ranging from 3.4V to 4.45V. Therefore, only when the surge voltage reaches above 5V, the PTVS tube can play a role in protection, and for the surge voltage which does not reach 5V, the PTVS tube cannot play a role in protection, so that the integrated circuit cannot be protected maximally.
Disclosure of Invention
An object of the embodiments of the present application is to provide a surge protection circuit and a voltage adjustment method for the surge protection circuit, which can maximally protect an integrated circuit.
In order to solve the technical problems, the application adopts the following technical scheme:
in a first aspect, an embodiment of the present application discloses a surge protection circuit, including a first interface, a second interface, a PTVS tube, a voltage detector, a voltage controller, and a buck converter; the cathode of the PTVS tube is electrically connected with the output end of the voltage reducer, the anode of the PTVS tube is electrically connected with the second interface, and the second interface is grounded; the voltage detector is electrically connected with the first interface and is used for detecting a first voltage, and the voltage detector is connected with the voltage controller to transmit the first voltage to the voltage controller, wherein the first voltage is the voltage at the first interface and is not greater than a preset threshold value; the input end of the voltage reducer is electrically connected with the first interface, the output end of the voltage reducer is electrically connected with the PTVS tube, and the control end of the voltage reducer is electrically connected with the voltage controller; the voltage controller is used for adjusting a second voltage of an output end of the voltage reducer according to the first voltage and a maximum reverse working voltage Vrwm of the PTVS tube so that the second voltage approaches the maximum reverse working voltage Vrwm.
In a second aspect, an embodiment of the present application discloses a voltage adjustment method of a surge protection circuit, where the method includes: acquiring the first voltage; the second voltage is adjusted according to the maximum reverse operating voltage Vrwm and the first voltage of the PTVS transistor such that the second voltage approaches the maximum reverse operating voltage Vrwm.
In a third aspect, an embodiment of the present application provides an electronic device, including the surge protection circuit of the first aspect.
In a fourth aspect, embodiments of the present application provide an electronic device comprising a processor, a memory and a program or instruction stored on the memory and executable on the processor, the program or instruction implementing the steps of the method according to the second aspect when executed by the processor.
In a fifth aspect, embodiments of the present application provide a computer readable storage medium having stored thereon a program or instructions which, when executed by a processor, implement the steps of the method according to the second aspect.
The technical scheme that this application adopted can reach following beneficial effect:
according to the surge protection circuit disclosed by the embodiment of the application, the first voltage at the first interface is detected through the voltage detector, the first voltage is transmitted to the voltage controller, and the voltage controller adjusts the second voltage at the output end of the voltage reducer according to the first voltage and the maximum reverse working voltage Vrwm of the PTVS tube, so that the second voltage is close to the maximum reverse working voltage Vrwm. Therefore, the input voltage of the PTVS tube can be dynamically adjusted according to the voltage at the first interface, so that the input voltage is close to the maximum reverse working voltage Vrwm, and the protection integrated circuit with the maximum range is realized.
Drawings
FIG. 1 is a schematic diagram of a surge protection circuit disclosed in an embodiment of the present application;
FIG. 2 is another schematic diagram of a surge protection circuit disclosed in an embodiment of the present application;
FIG. 3 is a schematic diagram of yet another configuration of the surge protection circuit disclosed in an embodiment of the present application;
FIG. 4 is a flow chart of a voltage regulation method of the surge protection circuit disclosed in the embodiments of the present application;
FIG. 5 is another flow chart of a voltage regulation method of the surge protection circuit disclosed in the embodiments of the present application;
fig. 6 is a schematic structural diagram of an electronic device according to an embodiment of the present application.
Detailed Description
The following description of the embodiments of the present application will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are some, but not all, of the embodiments of the present application. All other embodiments, which can be made by one of ordinary skill in the art based on the embodiments herein without making any inventive effort, are intended to be within the scope of the present application.
The terms first, second and the like in the description and in the claims, are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that embodiments of the present application may be implemented in sequences other than those illustrated or described herein. Furthermore, in the description and claims, "and/or" means at least one of the connected objects, and the character "/", generally means that the associated object is an "or" relationship.
The surge protection circuit provided by the embodiment of the application is described in detail below by means of specific embodiments and application scenes thereof with reference to the accompanying drawings.
Fig. 1 is a schematic structural diagram of a surge protection circuit according to an embodiment of the present application, and as shown in fig. 1, the protection circuit mainly includes a first interface 110, a second interface 120, a PTVS tube 240, a voltage detector 210, a voltage controller 220, and a voltage reducer 230.
In the embodiment of the present application, the cathode of the PTVS tube 240 is electrically connected to the output end of the voltage reducer 230, the anode of the PTVS tube 240 is electrically connected to the second interface 120, and the second interface 120 is grounded; the voltage detector 210 is electrically connected to the first interface 110, the voltage detector 210 is configured to detect a first voltage, and the voltage detector 210 is connected to the voltage controller 220 to transmit the first voltage to the voltage controller 220, where in this embodiment, the first voltage is a voltage at the first interface 110, and the first voltage is not greater than a preset threshold; an input end of the voltage reducer 230 is electrically connected with the first interface 110, an output end of the voltage reducer 230 is electrically connected with the PTVS tube 240, and a control end of the voltage reducer 230 is electrically connected with the voltage controller 220; the voltage controller 220 is configured to adjust the second voltage at the output terminal of the voltage reducer 230 according to the first voltage and the maximum reverse operation voltage Vrwm of the PTVS transistor 240, so that the second voltage approaches the maximum reverse operation voltage Vrwm.
In a specific application, the first interface 110 is electrically connected to the integrated circuit to be protected by the surge protection circuit, so that the voltage at the first interface 110, i.e. the first voltage, is not greater than a preset threshold value, which may be set to vrwm+Δv for maximum range of protection of the integrated circuit, where Δv is not greater than the maximum step-down value of the step-down transformer 230. When surge energy comes, the surge energy enters from the first interface 110, passes through the voltage reducer 230, and then enters the PTVS tube 240, the PTVS tube 240 breaks down in an avalanche, and the surge energy passes through the PTVS tube 240 and is led to the ground from the second interface 120.
According to the surge protection circuit disclosed by the embodiment of the application, the voltage detector 210, the voltage controller 220 and the voltage reducer 230 are added on the basis of the original PTVS tube 240, and the voltage transmitted to the PTVS tube 240 can be dynamically adjusted according to the voltage of an integrated circuit to be protected, so that the voltage is ensured to be close to the maximum reverse working voltage Vrwm, and the integrated circuit is protected in the maximum range.
In the embodiment of the present application, the PTVS tube 240 with a lower maximum reverse operating voltage Vrwm may be selected, and combined with the voltage born by the buck converter 230, to achieve a higher protection voltage.
In one possible implementation, the voltage controller 220 may be configured to determine a control parameter based on the first voltage and the maximum reverse operating voltage Vrwm of the PTVS transistor 240, send the control parameter to the buck converter 230, and adjust the magnitude of the second voltage based on the control parameter by the buck converter 230 so that the second voltage approaches the maximum reverse operating voltage Vrwm.
In one possible implementation, as shown in fig. 2, the buck converter 230 may include a field effect transistor 231, wherein a gate of the field effect transistor 231 is electrically connected to the voltage controller 220, a drain of the field effect transistor 231 is electrically connected to the first interface 110, and a source of the field effect transistor 231 is electrically connected to a cathode of the PTVS transistor 240. Specifically, the voltage detector 210 detects the first voltage, and transmits the first voltage to the voltage controller 220, and the voltage controller 220 determines a control parameter according to the first voltage and the maximum reverse operating voltage Vrwm of the PTVS tube 240, where the control parameter is a gate-source voltage input to the gate of the field effect tube 231, and the field effect tube 231 adjusts the output second voltage according to the gate-source voltage, so that the second voltage is close to the maximum reverse operating voltage Vrwm. When the surge energy comes, that is, the voltage input by the first interface 110 is greater than the preset threshold, the surge energy enters from the first interface 110 and is transmitted to the field effect tube 231, the voltage output by the source electrode of the field effect tube 231 is greater than the maximum reverse working voltage Vrwm of the PTVS tube 240 and is transmitted to the PTVS tube 240, the PTVS tube 240 breaks down in an avalanche, and the surge energy passes through the PTVS tube 240 and goes to the ground along the second interface 120.
In one possible implementation of an embodiment of the present application, the buck converter 230 may further include a triode, wherein a base of the triode is electrically connected to the voltage controller 220, a collector of the triode is electrically connected to the first interface 110, and an emitter of the triode is electrically connected to a cathode of the PTVS transistor 240. The implementation is similar to that described above including the fet 231, and will not be described again here.
In the above possible implementation manner, when the voltage of the integrated circuit to be protected by the surge protection circuit changes, that is, the first voltage changes, the voltage controller 220 determines a new control parameter according to the changed first voltage and the maximum reverse operating voltage Vrwm of the PTVS transistor 240, and the voltage reducer 230 adjusts the voltage according to the new control parameter to protect the integrated circuit in the maximum range. For example, when the first voltage is changed, the voltage controller 220 outputs different gate-source voltages, and the fet 231 adjusts and outputs different second voltages according to the gate-source voltages, so as to maximize the protection of the integrated circuit.
In another possible implementation, as shown in fig. 3, the buck converter 230 may further include a plurality of field effect transistors 231, wherein the voltage controller 220 is electrically connected to the gates of the plurality of field effect transistors 231, the drains of the plurality of field effect transistors 231 are electrically connected to the first interface 110 after being connected in parallel, and the sources of the plurality of field effect transistors 231 are electrically connected to the cathode of the PTVS transistor 240 after being connected in parallel.
Optionally, the buck converter 230 may further include a plurality of transistors, wherein the voltage controller 220 is electrically connected to bases of the plurality of transistors respectively, collectors of the plurality of transistors are electrically connected to the first interface 110 after being connected in parallel, and emitters of the plurality of transistors are electrically connected to a cathode of the PTVS transistor 240 after being connected in parallel.
In the above-mentioned embodiment, when the first voltage is changed, the voltage controller 220 redetermines the control parameter according to the changed first voltage and the maximum reverse operating voltage Vrwm of the PTVS transistor 240, and turns on the corresponding fet 231 or triode according to the redetermined control parameter, so as to output the corresponding second voltage and the protection integrated circuit in the maximum range. Taking the buck converter 230 as an example, the buck converter 230 includes a plurality of field effect transistors 231, the maximum reverse operating voltage Vrwm of the PTVS transistor 240 is 5V, when the surge protection circuit is powered on for the first time, the first voltage detected by the voltage detector 210 is 5.5V, and the voltage controller 220 determines that the voltage needs to be reduced by 0.6V according to the first voltage and the maximum reverse operating voltage Vrwm, corresponding to the first field effect transistor 231, so that the first field effect transistor 231 is turned on and the second field effect transistor 231 is turned off. When the surge protection circuit is powered on for the second time, the value of the first voltage detected by the voltage detector 210 is 5V, and the voltage controller 220 determines that the voltage needs to be reduced by 0.1V again according to the changed first voltage and the maximum reverse operating voltage Vrwm, and corresponds to the second fet 231, so that the second fet 231 is turned on and the first fet 231 is turned off. So that the input voltage of PTVS tube 240 can be adjusted as the operating voltage of the protected device changes to achieve maximum protection of the integrated circuit.
Optionally, when the first voltage is closer to the maximum reverse operating voltage Vrwm, and the single fet 231 or triode cannot achieve lower voltage drop, the fets 231 and the triodes can be controlled to be turned on simultaneously according to the control parameters determined by the voltage controller 220, so as to maximally protect the integrated circuit.
In this embodiment of the present application, the multiple field effect transistors 231 or the triode disposed for the voltage reducer 230 can dynamically adjust the second voltage output by the voltage reducer 230 according to the voltage of the integrated circuit to be protected, so that the second voltage is always close to the maximum reverse working voltage Vrwm of the PTVS transistor 240, and the integrated circuit is protected to the maximum extent, and meanwhile, the normal operation of the integrated circuit is not affected, so that the protection performance is greatly improved.
Fig. 4 is a flowchart of a voltage adjustment method of a surge protection circuit according to an embodiment of the present application, and as shown in fig. 4, the voltage adjustment method of the surge protection circuit mainly includes the following steps.
S410, acquiring the first voltage.
In a specific application, step S410 may be performed by the voltage controller shown in fig. 1 to 3, and the manner in which the voltage controller obtains the first voltage may be that the voltage detector detects the first voltage and then sends the first voltage to the voltage controller, and a specific implementation manner may be referred to the description in the above surge protection circuit embodiment, which is not repeated herein.
S420, adjusting the second voltage according to the maximum reverse working voltage Vrwm and the first voltage of the PTVS tube, so that the second voltage approaches the maximum reverse working voltage Vrwm.
In a specific application, the voltage controller may pre-store the maximum reverse operation voltage Vrwm of the PTVS tube, and in S420, the voltage controller adjusts the second voltage according to the first voltage and the maximum reverse operation voltage Vrwm detected by the voltage detector and input by the first interface, and a specific implementation manner may be referred to the description in the above surge protection circuit embodiment, which is not repeated herein.
According to the voltage adjustment method of the surge protection circuit, the first voltage can be detected according to the voltage detector, and the voltage controller adjusts the voltage according to the first voltage and the maximum reverse working voltage Vrwm so as to output the second voltage which is close to the maximum reverse working voltage Vrwm. Therefore, by adopting the scheme provided by the embodiment of the application, the maximized protection integrated circuit can be realized by adding a voltage detector, a voltage controller and a voltage reducer on the basis of the original PTVS tube.
In one possible implementation, S420: adjusting the second voltage to be close to the maximum reverse operating voltage Vrwm according to the maximum reverse operating voltage Vrwm and the first voltage of the PTVS transistor may include: determining a control parameter from the maximum reverse operating voltage Vrwm and the first voltage of the PTVS tube; and sending the control parameter to the step-down device, and adjusting the second voltage by the step-down device according to the control parameter.
In this possible implementation, after sending the control parameter to the step-down transformer, the method may further include:
step 1, acquiring the changed first voltage detected by the voltage detector;
for example, the surge protection circuit is powered on for the second time, the first voltage powered on for the second time is changed compared with the first voltage powered on for the first time, and the voltage detector acquires the changed first voltage. Of course, the changed first voltage is still not greater than the preset threshold.
And 2, updating the control parameters according to the maximum reverse working voltage Vrwm and the changed first voltage, and transmitting the updated control parameters to the step-down transformer so as to adjust the second voltage at the output end of the step-down transformer, so that the second voltage approaches the maximum reverse working voltage Vrwm.
In the possible implementation manner, the voltage detector detects the changed second voltage, the control parameter determined by the voltage controller is updated in time, and the voltage reducer updates the output second voltage according to the new control parameter so as to ensure that the second voltage is still close to the maximum reverse working voltage Vrwm of the PTVS tube after the working voltage of the protected device is changed.
In the above possible implementation manner, after adjusting the output second voltage, the method may further include: and acquiring the surge voltage which is detected by the voltage detector and is input by the first interface, and prohibiting updating of the control parameter according to the surge voltage, so that the second voltage at the output end of the voltage reducer is larger than the maximum reverse working voltage Vrwm. By this step, when the surge voltage is temporarily applied, the control parameter is inhibited from being updated according to the surge voltage, so that the surge voltage at the output end of the voltage reducer can be larger than the maximum reverse operating voltage Vrwm of the PTVS tube, and thus the surge voltage can break down the PTVS tube, that is, the surge voltage can be led to the ground from the second interface.
Fig. 5 is a schematic flowchart of another voltage adjustment method of the surge protection circuit according to the embodiment of the present application. As shown in fig. 5, the method may include the following steps.
S510: the surge protection circuit is powered up.
S511: the voltage control module obtains a maximum reverse operating voltage Vrwm of the PTVS tube.
In this step, the maximum reverse operating voltage Vrwm of the PTVS tube may be stored in the voltage controller in advance, and the voltage controller may acquire the stored maximum reverse operating voltage Vrwm after determining that power is on.
S512: and judging whether the surge protection circuit is electrified for the first time. If the power is not first turned on, S530 is executed, and if the power is first turned on, S514 is executed.
S530: the voltage detection module detects a first voltage of the protected integrated circuit network.
S531: it is determined whether the difference between the currently detected first voltage and the last detected first voltage is equal to zero, and if so, S530 is returned, and if not, S532 is performed.
S532: the first voltage is updated.
In this step, the data of the first voltage input by the first interface is updated to the value of the first voltage currently detected, and the process proceeds to step S514.
S513: the voltage detection module detects a first voltage of the protected integrated circuit network.
S514: the first voltage is passed to a voltage controller.
S515: the voltage controller determines a control parameter and outputs the control parameter.
In this step, the voltage controller may determine the control parameter based on the first voltage and the maximum reverse operating voltage Vrwm.
S516: the voltage reducing module adjusts the voltage.
In this step, the step-down device adjusts the output second voltage according to the control parameter, for example, adjusts the second voltage to be the maximum reverse operation voltage Vrwm minus 0.1, that is, the step-down value of the step-down device is: the first voltage- (Vrwm-0.1) and the voltage input to the PTVS tube is the maximum reverse operating voltage Vrwm minus 0.1.
S517: and judging whether surge energy enters. If a surge is entered, go to step 518, otherwise return to step 530.
S518: the surge voltage transmitted across the PTVS tube is greater than or equal to the maximum reverse operating voltage Vrwm.
S519: the PTVS tube avalanche breaks down and the surge current is conducted away.
S520: the surge voltage disappears and the process returns to step 530.
The voltage adjusting method of the surge protection circuit provided by the embodiment of the application enables surge energy to be conducted away from the ground, and damage of the surge to the integrated circuit is avoided.
Optionally, as shown in fig. 6, the embodiment of the present application further provides an electronic device, where the terminal device may include a processor 610, a memory 609, and a program or an instruction stored in the memory 609 and capable of running on the processor 610, where the program or the instruction is executed by the processor 610 to implement each process of the foregoing embodiment of the noise reduction method, and the process may achieve the same technical effect, and for avoiding repetition, a description is omitted herein.
The embodiment of the application further provides a readable storage medium, on which a program or an instruction is stored, where the program or the instruction realizes each process of the voltage adjustment method embodiment of the surge protection circuit when being executed by a processor, and the same technical effect can be achieved, so that repetition is avoided, and no detailed description is given here.
Wherein the processor is a processor in the electronic device described in the above embodiment. The readable storage medium includes a computer readable storage medium such as a Read-Only Memory (ROM), a random access Memory (Random Access Memory, RAM), a magnetic disk or an optical disk, and the like.
The embodiment of the application further provides a chip, the chip includes a processor and a communication interface, the communication interface is coupled with the processor, the processor is used for running a program or an instruction, implementing each process of the voltage adjustment method embodiment of the surge protection circuit, and achieving the same technical effect, so as to avoid repetition, and no further description is provided here.
It should be understood that the chips referred to in the embodiments of the present application may also be referred to as system-on-chip chips, chip systems, or system-on-chip chips, etc.
The embodiments of the present application have been described above with reference to the accompanying drawings, but the present application is not limited to the above-described embodiments, which are merely illustrative and not restrictive, and many forms may be made by those of ordinary skill in the art without departing from the spirit of the present application and the scope of the claims, which are also within the protection of the present application.

Claims (12)

1. A surge protection circuit, comprising: a first interface, a second interface, a PTVS tube, a voltage detector, a voltage controller and a voltage reducer; wherein, the liquid crystal display device comprises a liquid crystal display device,
the cathode of the PTVS tube is electrically connected with the output end of the voltage reducer, the anode of the PTVS tube is electrically connected with the second interface, and the second interface is grounded;
the voltage detector is electrically connected with the first interface and is used for detecting a first voltage, and the voltage detector is connected with the voltage controller to transmit the first voltage to the voltage controller, wherein the first voltage is the voltage at the first interface and is not greater than a preset threshold value;
the input end of the voltage reducer is electrically connected with the first interface, the output end of the voltage reducer is electrically connected with the PTVS tube, and the control end of the voltage reducer is electrically connected with the voltage controller;
the voltage controller is used for adjusting a second voltage of an output end of the voltage reducer according to the first voltage and a maximum reverse working voltage Vrwm of the PTVS tube so that the second voltage approaches the maximum reverse working voltage Vrwm.
2. The surge protection circuit of claim 1 wherein the voltage controller is configured to determine a control parameter based on the first voltage and a maximum reverse operating voltage Vrwm of the PTVS transistor, and to adjust the second voltage based on the control parameter.
3. The surge protection circuit of claim 1 wherein the buck converter comprises: the grid electrode of the field effect tube is electrically connected with the voltage controller, the drain electrode of the field effect tube is electrically connected with the first interface, and the source electrode of the field effect tube is electrically connected with the cathode of the PTVS tube.
4. The surge protection circuit of claim 1 wherein the buck converter comprises: and the base electrode of the triode is electrically connected with the voltage controller, the collector electrode of the triode is electrically connected with the first interface, and the emitter electrode of the triode is electrically connected with the cathode of the PTVS tube.
5. The surge protection circuit of claim 1 wherein the buck converter comprises: the voltage controllers are respectively and electrically connected with the grids of the field effect transistors, the drains of the field effect transistors are connected in parallel and then electrically connected with the first interface, and the sources of the field effect transistors are connected in parallel and then electrically connected with the cathodes of the PTVS tubes.
6. The surge protection circuit of claim 1 wherein the buck converter comprises: the voltage controller is respectively and electrically connected with the bases of the triodes, the collectors of the triodes are electrically connected with the first interface after being connected in parallel, and the emitters of the triodes are electrically connected with the cathodes of the PTVS tubes after being connected in parallel.
7. A voltage regulation method of a surge protection circuit, applied to the surge protection circuit of any one of claims 1 to 6, the method comprising:
acquiring the first voltage;
the second voltage is adjusted according to the maximum reverse operating voltage Vrwm and the first voltage of the PTVS transistor such that the second voltage approaches the maximum reverse operating voltage Vrwm.
8. The method of claim 7, wherein adjusting the second voltage to be close to the maximum reverse operating voltage Vrwm based on the maximum reverse operating voltage Vrwm and the first voltage of the PTVS transistor comprises:
determining a control parameter from the maximum reverse operating voltage Vrwm and the first voltage of the PTVS tube;
and sending the control parameter to the step-down device, and adjusting the second voltage by the step-down device according to the control parameter.
9. The method of claim 8, further comprising, after sending the control parameter to the buck converter:
acquiring the changed first voltage detected by the voltage detector, wherein the changed first voltage is not greater than a preset threshold value;
and updating the control parameters according to the maximum reverse working voltage Vrwm and the changed first voltage, and transmitting the updated control parameters to the voltage reducer so as to adjust the second voltage to enable the second voltage to be close to the maximum reverse working voltage Vrwm.
10. The method according to any one of claims 8 to 9, wherein,
after adjusting the second voltage of the output, the method further comprises:
and acquiring the surge voltage input by the first interface, and prohibiting updating of the control parameters according to the surge voltage so that the second voltage is larger than the maximum reverse working voltage Vrwm, wherein the surge voltage is larger than a preset threshold value.
11. An electronic device comprising the surge protection circuit of any one of claims 1 to 6.
12. An electronic device comprising a processor, a memory and a program or instruction stored on the memory and executable on the processor, which when executed by the processor, implements the steps of the voltage regulation method of a surge protection circuit according to any one of claims 7 to 10.
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