CN113014837B - Photoelectric sensing pixel circuit - Google Patents

Photoelectric sensing pixel circuit Download PDF

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Publication number
CN113014837B
CN113014837B CN202110194463.6A CN202110194463A CN113014837B CN 113014837 B CN113014837 B CN 113014837B CN 202110194463 A CN202110194463 A CN 202110194463A CN 113014837 B CN113014837 B CN 113014837B
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transistor
unit
pole
amplifying
signal
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CN113014837A (en
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张盛东
安军军
廖聪维
梁键
彭志超
邱赫梓
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Peking University Shenzhen Graduate School
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Peking University Shenzhen Graduate School
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70—SSIS architectures; Circuits associated therewith
    • H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70—SSIS architectures; Circuits associated therewith
    • H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors
    • H04N25/77—Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70—SSIS architectures; Circuits associated therewith
    • H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors
    • H04N25/77—Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components
    • H04N25/778—Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components comprising amplifiers shared between a plurality of pixels, i.e. at least one part of the amplifier must be on the sensor array itself

Abstract

In one embodiment, an optoelectronic sensing pixel circuit is provided, which includes a photosensitive unit, an amplifying and driving unit, and a gating unit; a gate unit for gating the amplifying and driving unit in response to a row scan signal; the amplifying and driving unit comprises a readout unit, and the readout unit comprises a reset unit, a storage unit and an amplifying unit; the storage unit is used for accumulating the photo-generated current signals and converting the photo-generated current signals into corresponding voltage signals; the amplifying unit is used for amplifying the voltage signal converted by the storage unit and then outputting the amplified voltage signal; the amplifying unit comprises a transconductance unit which is used for converting the voltage signal converted by the storage unit into a current signal. Through the thin film transistor process, photoelectric sensing pixel circuits are integrated into an image sensing array, and then an image sensor is formed. Preferably, the photoelectric sensing pixel circuit can be integrated into a photoelectric image sensing array on the same substrate by two thin film transistor processes of different types of active layer materials.

Description

Photoelectric sensing pixel circuit
Technical Field
The present invention relates to a photoelectric sensor pixel circuit and an image sensor thereof, and more particularly, to a thin film transistor integrated photoelectric sensor pixel circuit and an image sensor thereof.
Background
The photoelectric imaging device is generally composed of an array type photoelectric sensing pixel circuit. The photoelectric sensing pixel circuit senses the optical signal and converts the optical signal into an electrical signal. The performance of the electro-optical pixel circuit determines the detection performance of the image sensor. An image sensing pixel circuit based on a Thin Film Transistor (TFT) technology is suitable for large-area integration of array photoelectric sensing, and is one of the mainstream directions of modern array photoelectric imaging. A typical application area of pixel circuits of the photoelectric type is in the field of medical diagnostics or health monitoring, for example, pixel circuits of the photoelectric type are key components of X-ray image sensors.
For high-end medical diagnosis or health monitoring equipment and other fields, photoelectric sensing pixel circuits have many places to be improved.
Disclosure of Invention
The present invention provides a novel photoelectric sensing pixel circuit, which is described in detail below.
In one embodiment, an optoelectronic sensing pixel circuit is provided, which mainly comprises two types of thin film transistors; the sensing pixel circuit comprises a photosensitive unit, an amplifying and driving unit and a gating unit;
the photosensitive unit is used for generating a photo-generated current signal when sensing a light signal;
the gating unit is used for responding to a line scanning signal and gating the amplifying and driving unit;
the amplifying and driving unit at least comprises a readout unit, and the readout unit comprises a reset unit, a storage unit and an amplifying unit; the storage unit is used for accumulating the photo-generated current signals and converting the photo-generated current signals into corresponding voltage signals; the reset unit resets the storage unit in response to a reset signal; the amplifying unit is used for amplifying the voltage signal converted by the storage unit and then outputting the amplified voltage signal; the amplifying unit comprises a transconductance unit, and the transconductance unit is used for converting the voltage signal converted by the storage unit into a current signal.
In one embodiment, the transconductance unit comprises an amplifying transistor T A Said gating unit comprising a switching transistor T S ；
The amplifying transistor T A For receiving the voltage signal converted by the memory cell, the amplifying transistor T A The first pole of the amplifying transistor T is grounded, the amplifying transistor T A Second pole of (2) and switching transistor T S The first pole of (a); the amplifying transistor T A For connecting the control pole thereofConverting the received voltage signal converted by the storage unit into a current signal and outputting the current signal through a second pole of the current signal;
the switching transistor T S Is used for receiving the line scanning signal when the switching transistor T is turned on S When the control electrode of the switching transistor T receives the line scanning signal S By outputting the current signal received from its first pole through its second pole.
In one embodiment, the light-sensitive cell comprises a phototransistor T L Said transconductance unit including an amplifying transistor T A Said gating unit comprising a switching transistor T S ；
The phototransistor T L For receiving a gating signal, said phototransistor T L Is connected to the operating voltage, said phototransistor T L Is connected with the reset unit; when the phototransistor T is L When the control electrode of the photoelectric transistor receives the gating signal, the photoelectric transistor T L The photo-generated current signal can be generated when the optical signal is sensed;
the amplifying transistor T A For receiving the voltage signal converted by the memory cell, the amplifying transistor T A First pole of and the switching transistor T S Of the amplifying transistor T, said amplifying transistor T A The second pole of the first diode is connected with the working voltage; the amplifying transistor T A The voltage signal which is received by the control electrode of the storage unit and converted by the storage unit is converted into a current signal and is output through the first electrode of the storage unit;
the switching transistor T S Is used for receiving the line scanning signal when the switching transistor T is turned on S When the control electrode of the switch transistor receives the line scanning signal, the switch transistor T S By outputting the current signal received from its first pole through its second pole.
In one embodiment, the transconductance unit and the gating unit are implemented by different types of thin film transistors.
In one embodiment, the transconductance unit is implemented by a low-temperature polysilicon thin film transistor, and the gating unit is implemented by an oxide thin film transistor; optionally, the transconductance unit is a PMOS transistor, and the gating unit is an NMOS transistor.
In an embodiment, the amplifying unit further includes a load unit, the load unit and the transconductance unit form a complementary operational amplifier structure, and the load unit is configured to convert a current signal of the transconductance unit into a voltage signal.
In one embodiment, the transconductance unit includes an amplifying transistor T A Said gating unit comprising a switching transistor T S The load unit comprises a bias transistor T B ；
The amplifying transistor T A The control electrode is used for receiving the voltage signal converted by the storage unit; the amplifying transistor T A First pole of and the switching transistor T S Is connected to the second pole; the amplifying transistor T A The second pole of (2) is grounded; the amplifying transistor T A The voltage signal received by the control pole of the storage unit and converted by the storage unit is converted into a current signal and is output through the first pole of the storage unit;
the switching transistor T S Is used for receiving the line scanning signal when the switching transistor T is turned on S When the control electrode of the transistor T receives the line scanning signal, the transistor T S Outputting the current signal received from the second pole thereof through the first pole thereof;
the bias transistor T B The control electrode of (a) is used for receiving a gating signal; the bias transistor T B First pole of and the switching transistor T S The first pole of (a); the bias transistor T B The second pole of the first diode is connected with the working voltage; when the bias transistor T is turned on B When the control electrode of the bias transistor T receives the gating signal B Will be controlled by the switching transistor T S The current signal output by the first pole is converted into a voltage signal and then output.
In one embodiment, the photosensitive cell comprises a phototransistor T with a double-gate structure L Said transconductance unit including an amplifying transistor T A Said gating unit comprising a switching transistor T S The load unit comprises a bias transistor T B ；
The phototransistor T L For receiving a first gating signal, said phototransistor T L For receiving a second gating signal, said phototransistor T L Is connected to the reset unit, the phototransistor T L The second pole of (2) is grounded; when the phototransistor T is L When an optical signal is sensed, the phototransistor T L Generating a photo-generated current signal under the control of the first and second strobe signals;
the amplifying transistor T A The control electrode is used for receiving the voltage signal converted by the storage unit; the amplifying transistor T A First pole of and the switching transistor T S Is connected to the second pole; the amplifying transistor T A The second pole of (2) is grounded; the amplifying transistor T A The voltage signal received by the control pole of the storage unit and converted by the storage unit is converted into a current signal and is output through the first pole of the storage unit;
the switching transistor T S Is used for receiving the line scanning signal when the switching transistor T is turned on S When the control electrode of the transistor receives the line scanning signal, the transistor T S Outputting the current signal received from the second pole thereof through the first pole thereof;
the bias transistor T B The control electrode of (a) is used for receiving a gating signal; the bias transistor T B First pole of and the switching transistor T S The first pole of (a); the bias transistor T B The second pole of the first diode is connected with the working voltage; when the bias transistor T is turned on B When the control electrode of the bias transistor T receives the gating signal, the bias transistor T B Will be controlled by the switching transistor T S The current signal output by the first pole is converted into a voltage signal and then output.
In one embodiment, the transconductance unit and the gating unit are the same unit, and the unit is an amplifying transistor T with a double-gate structure A (ii) a Or, the load unit and the gating unit are the same unit, and the unit is a bias transistor T with a double-grid structure B 。
In an embodiment, the transconductance unit and the gating unit are the same unit, and the unit is an amplifying transistor T with a dual-gate structure A In the case of (2), the load unit includes a bias transistor T B ；
The amplifying transistor T A The first control electrode is used for receiving the voltage signal converted by the storage unit; the amplifying transistor T A The second control electrode is used for receiving the line scanning signal; the amplifying transistor T A And a bias transistor T B The first pole of (a); the amplifying transistor T A The second pole of (2) is grounded; the amplifying transistor T A The memory cell is used for converting a voltage signal received by a first control electrode of the memory cell into a current signal and outputting the converted current signal through the first control electrode when a second control electrode of the memory cell receives the line scanning signal;
the bias transistor T B The control electrode of (a) is used for receiving a gating signal; the bias transistor T B The second pole of the first diode is connected with the working voltage; when the bias transistor T is turned on B When the control electrode of the bias transistor T receives the gating signal B Will be amplified by the amplifying transistor T A The current signal output by the first pole is converted into a voltage signal and then output.
In an embodiment, the amplifying and driving unit further includes a driving unit, and the driving unit is configured to convert the voltage signal output by the load unit into a current signal and output the current signal.
In one embodiment, the transconductance unit comprises an amplifying transistor T A Said load unit comprising a bias transistor T B The drive unit comprises a following transistor T SF (ii) a The gating unit includes a switching transistor T SW ；
The amplifying transistor T A The control electrode is used for receiving the voltage signal converted by the storage unit;the amplifying transistor T A And a bias transistor T B The first pole of (a); the amplifying transistor T A The second pole of (2) is grounded; the amplifying transistor T A The voltage signal received by the control pole of the storage unit and converted by the storage unit is converted into a current signal and is output through the first pole of the storage unit;
the bias transistor T B The control electrode of (a) is used for receiving a gating signal; the bias transistor T B The second pole of the first diode is connected with the working voltage; when the bias transistor T is turned on B When the control electrode of the bias transistor T receives the gating signal B Will be amplified by the amplifying transistor T A After the current signal output by the first pole is converted into a voltage signal, and passes through the bias transistor T B A first pole output of (a);
the following transistor T SF And said bias transistor T B Said follower transistor T, said follower transistor T SF Is connected to the operating voltage, said follower transistor T SF Second pole of (2) and switching transistor T SW The first pole of (a); the following transistor T SF For receiving its control electrode by said biasing transistor T B Is converted into a current signal and passes through a follower transistor T SF A second pole output of (a);
the switching transistor T SW For receiving said line scanning signal when said switching transistor T is turned on SW When the control electrode of the switching transistor T receives the line scanning signal SW The current signal received from the first pole thereof is output through the second pole thereof.
In one embodiment, the transconductance unit and the gating unit are the same unit, and the unit is an amplifying transistor T with a dual-gate structure A (ii) a Or, the load unit and the gating unit are the same unit, and the unit is a bias transistor T with a double-grid structure B (ii) a Or, the driving unit and the gating unit are the same unit which is a following transistor T with a double-grid structure SF 。
In one embodiment, the driving unit and the gating unit are the same unit, and the unit is a following transistor T with a dual-gate structure SF In the case where the transconductance cell includes an amplifying transistor T A The load unit comprises a bias transistor T B ；
The amplifying transistor T A The control electrode is used for receiving the voltage signal converted by the storage unit; the amplifying transistor T A And a bias transistor T B The first pole of (a); the amplifying transistor T A The second pole of (2) is grounded; the amplifying transistor T A The voltage signal received by the control pole of the storage unit and converted by the storage unit is converted into a current signal and is output through the first pole of the storage unit;
the bias transistor T B The control electrode of (a) is used for receiving a gating signal; the bias transistor T B First pole of and amplifying transistor T A Is connected; the bias transistor T B The second pole of the switch is connected with the working voltage; when the bias transistor T is turned on B When the control electrode of the bias transistor T receives the gating signal B Will be amplified by the amplifying transistor T A Is converted into a voltage signal and passed through the bias transistor T B A first pole output of (a);
the following transistor T SF And said bias transistor T B Of the following transistor T, the following transistor T SF For receiving said line scanning signal, said follower transistor T SF The first pole of the first switch is connected with the working voltage; the following transistor T SF For receiving by the bias transistor T at its first control electrode B Is converted into a current signal when the follower transistor T is turned on SF The second control electrode receives the line scanning signal and outputs the converted current signal through the second electrode.
In one embodiment, the transconductance unit and the load unit are implemented by different types of thin film transistors.
In one embodiment, the transconductance unit is implemented by an oxide thin film transistor, and the load unit is implemented by a low temperature polysilicon thin film transistor; optionally, the transconductance unit is an NMOS transistor, and the load unit is a PMOS transistor.
In one embodiment, the driving unit is implemented by an oxide thin film transistor; the gate unit is implemented by an oxide thin film transistor.
In one embodiment, the amplifying and driving unit is implemented by a thin film transistor; the gating unit is realized by a thin film transistor; optionally, the photosensitive unit is implemented by a thin film transistor.
According to the photoelectric type sensing pixel circuit of the above embodiments, in some embodiments, a new structure of the sensing pixel circuit is proposed, and in some embodiments, the pixel circuit is formed using a mixed type TFT; therefore, the sensor pixel circuit of some embodiments has an advantage of high gain, the sensor pixel circuit of some embodiments has an advantage of high readout frame rate, and the like.
Drawings
FIG. 1 is a schematic diagram of a sensing pixel circuit according to an embodiment;
fig. 2 (a), fig. 2 (b) and fig. 2 (c) are schematic diagrams of three structures of the sensing pixel circuit, respectively;
FIG. 3 is a schematic diagram of a specific circuit of a sensing pixel circuit according to an embodiment;
FIG. 4 is a timing diagram illustrating operation of a sensing pixel circuit according to one embodiment;
FIG. 5 is a schematic diagram of a specific circuit of a sensing pixel circuit according to an embodiment;
FIG. 6 is a timing diagram illustrating the operation of a sensing pixel circuit according to an embodiment;
FIG. 7 is a schematic diagram of a specific circuit of a sensing pixel circuit according to an embodiment;
FIG. 8 is a timing diagram illustrating operation of a sensing pixel circuit according to one embodiment;
FIG. 9 is a schematic diagram of a specific circuit of a sensing pixel circuit according to an embodiment;
FIG. 10 is a timing diagram illustrating the operation of a sensing pixel circuit according to one embodiment;
fig. 11 is a schematic configuration diagram of a specific circuit of a sensing pixel circuit of an embodiment;
FIG. 12 is a timing diagram illustrating the operation of a sensing pixel circuit according to an embodiment;
fig. 13 is a schematic configuration of a specific circuit of a sensing pixel circuit of an embodiment;
FIG. 14 is a timing diagram illustrating operation of a sensing pixel circuit according to one embodiment;
fig. 15 is a schematic configuration of a specific circuit of a sensing pixel circuit of an embodiment;
FIG. 16 is a timing diagram illustrating the operation of a sensing pixel circuit according to one embodiment;
FIG. 17 is a schematic diagram of a sensor pixel array of a photosensor according to an embodiment;
FIG. 18 is a schematic structural diagram of a sensor pixel array of a photoelectric sensor according to an embodiment;
fig. 19 is a longitudinal sectional view of a sensing pixel circuit integrated by a hybrid TFT.
Detailed Description
The present invention will be described in further detail with reference to the following detailed description and accompanying drawings. Wherein like elements in different embodiments are numbered with like associated elements. In the following description, numerous details are set forth in order to provide a better understanding of the present application. However, one skilled in the art will readily recognize that some of the features may be omitted or replaced with other elements, materials, methods in different instances. In some instances, certain operations related to the present application have not been shown or described in detail in order to avoid obscuring the core of the present application from excessive description, and it is not necessary for those skilled in the art to describe these operations in detail, so that they may be fully understood from the description in the specification and the general knowledge in the art.
Furthermore, the features, operations, or characteristics described in the specification may be combined in any suitable manner to form various embodiments. Also, the various steps or actions in the description of the methods may be transposed or transposed in order, as will be apparent to a person skilled in the art. Thus, the various sequences in the specification and drawings are for the purpose of describing certain embodiments only and are not intended to imply a required sequence unless otherwise indicated where such sequence must be followed.
The numbering of the components as such, e.g., "first", "second", etc., is used herein only to distinguish the objects as described, and does not have any sequential or technical meaning. The term "connected" and "coupled" when used in this application, unless otherwise indicated, includes both direct and indirect connections (couplings).
The inventors have conducted studies on a flat-panel type X-ray image sensor based on a thin-film transistor (TFT) technology.
In modern medical diagnosis or health monitoring, flat panel X-ray image sensors based on thin film transistor technology play a critical role, such as X-ray image sensing for clinical diagnosis of lung, orthopedics, and the like. Thanks to the rapid development of TFT information display technology towards larger size, higher resolution, higher frame rate and higher sensitivity, TFT image sensing technology is also in the process of continuous development. However, the conventional TFT flat panel image sensor is difficult to be applied to imaging of relatively fine organs/tissues such as cardiovascular and cerebrovascular vessels due to low spatial resolution, low read frame rate, low sensitivity, high dose requirement, and the like. Lower X-ray irradiation doses have been a goal pursued for high-quality X-ray image sensors. The conventional flat-panel X-ray image sensor is made based on an amorphous silicon TFT and an amorphous silicon photodiode (i.e. a PIN diode), and the basic principle is that the PIN diode senses visible light converted by X-rays to correspondingly obtain a photo-generated current, and the amorphous silicon TFT reads the photo-generated current converted by the X-rays to a peripheral reading circuit line by line. But it is also the inherent device characteristic defects of amorphous silicon TFTs that limit the further development of TFT flat panel image sensors. In particular, the mobility of a-Si TFTs (i.e., amorphous silicon TFTs) is low (typical value 0.5 c)m 2 V -1 .s -1 ) And the reliability is poor, when the pixel array is used for a TFT image sensor, a certain area is occupied by a read-out part element, and the filling factor of an X-ray read-out pixel part is low. And because of larger parasitic capacitance, parasitic resistance and the like in the a-Si TFT array, the complete transfer of the photo-generated charge amount in the sensing pixel circuit can be realized in a longer time, so that the reading frame rate of the image sensor is difficult to improve. For imaging applications such as cardiovascular and cerebrovascular systems, not only higher sensitivity but also higher readout frame rate are required. For these reasons, it is also difficult for the image readout circuit of the a-Si TFT to reduce the irradiation dose of the X-ray image sensor (the irradiation dose is proportional to the irradiation intensity and the irradiation time). For a conventional image readout circuit of an a-Si TFT, the value of the signal charge gain is generally less than 1, and the dynamic range of imaging is small due to dark-state current, noise charge, and the like. In general, the conventional X-ray image sensor has the disadvantages of small dynamic range, high exposure dose, and low readout frame rate. Therefore, how to overcome the defects of low reading frame rate, small dynamic range, high irradiation dose and the like of the traditional image sensor has not been researched in a fundamental way. The emerging TFT technology brings new possibilities for the development of higher performance photo-sensing pixels, and is expected to fundamentally solve these problems of conventional TFT image sensing arrays.
In view of the above, the inventors propose two improvement directions, one is to improve the structure of the pixel circuit, and the other is to find and adopt other types of TFTs.
Specifically, the TFT technology is developing toward higher mobility, better reliability, flexibility, etc., and the inventors have selected Oxide TFTs such as Low Temperature Polysilicon (LTPS) TFT and Indium Gallium Zinc Oxide (IGZO) TFT. These two types of TFTs are explained below separately.
The mobility of the polysilicon TFT can be improved to 100cm 2 V.s, and has good reliability, and the device characteristics can be maintained under long-time voltage/current biasIs constant. However, the leakage current of the polysilicon TFT is large, and the electrical characteristics such as threshold voltage, mobility, and the like exhibit large non-uniformity as the size of the TFT substrate increases. This non-uniformity is extremely detrimental for TFT flat panel detectors as it implies distortion of the read-out image. By contrast, oxide TFTs have excellent electrical uniformity, and high mobility (typically 10 cm) 2 V -1 .s -1 ) And better reliability. Although the mobility of the oxide TFT can not be equal to that of the low-temperature polysilicon TFT, the leakage current is extremely low, and is about one ten-thousandth of that of the low-temperature polysilicon TFT with the same size or even smaller; the low leakage current and excellent large-area preparation uniformity make the application of the oxide TFT to the TFT flat panel image detector very advantageous. And the oxide TFT has better photoelectric characteristics, so that the performance parameters such as the sensitivity of photoelectric detection can be obviously improved.
In some embodiments, the inventors consider improvements to the pixel circuit in combination with the advantages of high mobility of low temperature polysilicon TFTs and low leakage, good large area uniformity of oxide TFTs, i.e., hybrid TFT backplane technology. Compared with the traditional TFT backboard, the hybrid TFT backboard has higher effective signal value and lower noise value, namely higher signal to noise ratio, which is very beneficial to increasing the dynamic range of X-ray reading and reducing the irradiation dose of X-ray. In contrast, the pixel circuit of the low-temperature polysilicon TFT cannot achieve the same high signal-to-noise ratio as the pixel circuit of the hybrid TFT due to the high leakage current and the low charge/voltage gain of the pixel circuit of the oxide TFT. In some embodiments, the inventor considers that a PMOS type transistor corresponding to a low-temperature polysilicon TFT and an NMOS type transistor corresponding to an oxide TFT are combined to realize a complementary type operational amplifier structure, which has higher gain performance compared with an operational amplifier structure composed of a single type PMOS or NMOS, and can simplify a circuit structure while realizing high-performance operational amplifier. When two different types of thin film transistors are integrated, two types of TFTs can be stacked in a three-dimensional direction, for example, a low-temperature polysilicon TFT is arranged at the lower layer of a circuit, and an oxide TFT used as a photosensitive unit is arranged at the upper layer of the circuit, so that the spatial resolution of a pixel circuit can be improved. Thereby simultaneously improving the spatial resolution and the readout sensitivity of the X-ray image. More importantly, the low-temperature polysilicon TFT and the oxide TFT are suitable to be prepared on a flexible substrate, and flexible X-ray and other image sensors are very critical for medical health application. To date, no research has been found for forming a high-quality image sensor by using the technologies of oxide TFT and low-temperature polysilicon TFT in combination.
The idea of the invention is to adopt a mixed TFT to realize the design of a highly integrated photoelectric sensing pixel circuit and comprehensively improve the spatial resolution, the sensitivity and the signal-to-noise ratio of an X-ray image sensor.
Before describing the pixel circuit of the embodiments of the present invention, some devices involved in the pixel circuit will be described.
The transistors involved in the pixel circuit according to the embodiment of the present invention may be transistors of any structure, such as Bipolar Junction Transistors (BJTs) or Field Effect Transistors (FETs), without being particularly limited. When the transistor is a bipolar transistor, the control electrode of the transistor refers to a grid electrode of the bipolar transistor, the first electrode can be a collector electrode or an emitter electrode of the bipolar transistor, the corresponding second electrode can be an emitter electrode or a collector electrode of the bipolar transistor, and in the practical application process, the emitter electrode and the collector electrode can be interchanged according to the signal flow direction; when the transistor is a field effect transistor, the control electrode of the transistor refers to a gate electrode of the field effect transistor, the first electrode may be a drain electrode or a source electrode of the field effect transistor, and the corresponding second electrode may be a source electrode or a drain electrode of the field effect transistor. In addition, the Thin Film Transistor (TFT) involved in the pixel circuit according to the embodiment of the present invention may be an amorphous silicon TFT, a low temperature polysilicon TFT, an indium gallium zinc oxide TFT, or another metal oxide TFT, and may be an N-type (electron conductivity type) or a P-type (hole conductivity type), unless otherwise specified.
The TFT device involved in the pixel circuit of the embodiment of the present invention is generally made independent of the input light, i.e. without photoelectric response, by some method except that it is specifically referred to as a photo transistor or a photo/photo transistor, for example, a light shielding layer is applied to the light receiving side of the TFT. Similarly, the TFT device involved in the pixel circuit according to the embodiment of the present invention has only a single control electrode if it is not specifically described as a double-gate transistor or has two control electrodes.
The photosensitive unit referred to in the pixel circuit of the embodiment of the present invention refers to a device or a circuit for implementing photoelectric conversion, and unless otherwise specifically stated, the photosensitive unit may include, but is not limited to: photoelectric conversion devices such as photodiodes, photoelectric TFTs, amorphous selenium photoelectric thin films, perovskite photoelectric thin films, and the like; it is to be understood that, unless otherwise specifically noted, in various embodiments, the photoelectric device described above may be used as the photosensitive cell for illustrative purposes only, but this embodiment is not intended to correspond to the photosensitive cell, but is an optional photoelectric device for illustrating the function of the pixel circuit.
Referring to fig. 1, in some embodiments, an optoelectronic sensing pixel circuit (herein, referred to as a pixel circuit) may include a photosensitive unit 10, an amplifying and driving unit 30, and a gating unit 50. The light sensing unit 10 is used for generating a photo-generated current signal when sensing a light signal. The amplifying and driving unit 30 is used for storing and amplifying the photo-generated current signal, and the like-it should be noted that the amplification here refers to a broader amplification unless otherwise specified, and may be, for example, amplifying the current signal, converting the current signal into a voltage signal and then amplifying the voltage signal, or converting a small current signal into a relatively large voltage signal. The gate unit 50 is used to gate the amplifying and driving unit 30 in response to the row scanning signal so that the amplifying and driving unit 30 can output the amplified signal. In some embodiments, the pixel circuit is mainly composed of two types of thin film transistors, such as a low temperature polysilicon thin film transistor and an oxide thin film transistor.
A specific description of the amplifying and driving unit 30 is provided below.
Referring to fig. 2 (a), in some embodiments, the amplifying and driving unit 30 at least includes a readout unit 31, and the readout unit 31 includes a reset unit 32, a storage unit 35, and an amplifying unit 37. Specifically, the storage unit 35 is configured to accumulate the photo-generated current signal and convert the photo-generated current signal into a corresponding voltage signal; the storage unit 35 is used for storing, converting or integrating the output electrical signal of the photosensitive unit 10, so that the weak signal is easier to be processed and amplified subsequently; the reset unit 33 resets the storage unit 35 in response to a reset signal; the amplifying unit 37 is configured to amplify and output the voltage signal converted by the storage unit 35, for example, the amplifying unit 37 amplifies and converts the voltage signal stored in the storage unit 35 or directly amplifies and outputs the amplified voltage signal to the outside of the pixel circuit; in some specific embodiments, the amplifying unit 37 includes a transconductance unit 41, and the transconductance unit 41 is configured to convert the voltage signal converted by the storage unit 35 into a current signal, where the current signal is an output of the amplifying and driving unit 30.
In the embodiment of fig. 2 (a), further, the transconductance unit 41 and the gating unit 50 are implemented by different types of thin film transistors, for example, the transconductance unit 41 is implemented by a low temperature polysilicon thin film transistor, and the gating unit 50 is implemented by an oxide thin film transistor. In the embodiment of fig. 2 (a), further, the transconductance unit 41 is a PMOS transistor, and the gating unit 50 is an NMOS transistor.
Since the transconductance unit 41 adopts the low temperature polysilicon TFT with higher mobility, the pixel circuit has a higher transconductance value. When the transconductance unit 41 is a PMOS transistor and the gating unit 50 is an NMOS transistor, the transconductance unit 41 is connected in a source follower structure, and its transconductance value can be kept relatively constant and will not be affected by the characteristic difference of the TFT device. The gate unit 50 has a lower off-state current for the oxide TFT, so that the overall sensitivity of the pixel circuit is higher. Compared with the traditional photoelectric pixel circuit adopting a single type of TFT, the mixed type TFT pixel circuit in some embodiments of the invention combines the advantages of multiple types of TFTs, so that the pixel circuit has the advantages of high transconductance value and low off-state current value.
In other words, the transconductance unit 41 and the load unit 43 are formed by two different thin film transistors, for example, the transconductance unit 41 uses an oxide TFT, and the load unit 43 uses an LTPS TFT, and further, a logic structure of a CMOS may be formed, that is, an N-type device and a P-type device are combined with each other, compared with a case where all N-type or P-type devices are used, a product of a transconductance value and an output load value of a load is higher, that is, an amplification factor of a pixel circuit for a weak signal is increased, and an equivalent input pixel noise into a pixel when viewed from a pixel output terminal is reduced, that is, a sensitivity of the pixel circuit is improved, and a dynamic detection range for light signal intensity is increased. Also, when the loading unit 43 employs LTPS TFT, since LTPS has higher mobility, the output current of the pixel circuit is larger, so the readout period is shorter, the frame rate of the photoelectric image sensor can be increased, and it is advantageous to be applied to some photoelectric image sensors with high frame rate, such as CT and the like. Meanwhile, the transconductance unit 41 and the load unit 43 are formed by two different thin film transistors, namely, formed in two different process steps, a first type of thin film transistor is manufactured by adopting a high-temperature thin film transistor process, and a second type of thin film transistor is manufactured by adopting a low-temperature thin film transistor process above the space of the first type of thin film transistor, so that the design of a stacked thin film transistor integrated circuit is realized, the required pixel area is smaller, the spatial resolution of the pixel circuit is improved, and the resolution of the photoelectric image sensor is improved.
Referring to fig. 2 (b), based on fig. 2 (a), in some embodiments, the amplifying unit 37 in the amplifying and driving unit 30 may further include a load unit 43, the load unit 43 and the transconductance unit 41 form a complementary operational amplifier structure, such as a CMOS structure, and the load unit 43 is configured to convert the current signal of the transconductance unit 41 into a voltage signal, where the voltage signal is an output of the amplifying and driving unit 30.
In the embodiment of fig. 2 (b), further, the transconductance unit 41 and the load unit 43 are implemented by different types of thin film transistors, for example, the transconductance unit 41 is implemented by an oxide thin film transistor, and the load unit 43 is implemented by a low temperature polysilicon thin film transistor; in the embodiment of fig. 2 (b), further, the gate unit 50 is implemented by an oxide thin film transistor.
In the embodiment of fig. 2 (b), further, the transconductance unit 41 is an NMOS transistor, and the load unit 43 is a PMOS transistor.
The related amplifying part in the pixel circuit which is made of NMOS transistor or PMOS transistor can not form high-gain operational amplifier; for a conventional pixel circuit, a larger pixel area is often required to achieve a higher magnification, however, in a high-resolution image sensing array, the pixel size is strictly limited. In the present application, the transconductance unit 41 and the load unit 43 are introduced, and when the transconductance unit 41 is an NMOS transistor and the load unit 43 is a PMOS transistor, the pixel circuit has a high gain. Specifically, the transconductance unit 41 is an NMOS transistor, and the load unit 43 is a PMOS transistor, so that a CMOS structure is formed, thereby having a higher amplification factor; the pixel circuit with high amplification factor has the advantage of high sensitivity, and can realize high-precision photoelectric image detection; meanwhile, the N-type TFT and the P-type TFT are stacked or staggered in space of the integrated circuit, which is helpful for reducing the pixel area and improving the spatial resolution of the pixel circuit.
Referring to fig. 2 (c), based on fig. 2 (b), in some embodiments, the amplifying and driving unit 30 may further include a driving unit 39, and the driving unit 39 is configured to convert the voltage signal output by the load unit 43 into a current signal and output the current signal, where the current signal is the output of the amplifying and driving unit 30.
Similarly, in the embodiment of fig. 2 (c), further, the transconductance unit 41 and the load unit 43 are implemented by different types of thin film transistors, for example, the transconductance unit 41 is implemented by an oxide thin film transistor, and the load unit 43 is implemented by a low temperature polysilicon thin film transistor; in the embodiment of fig. 2 (c), further, the driving unit 39 is implemented by an oxide thin film transistor; the gate unit 50 is implemented by an oxide thin film transistor.
In the embodiment of fig. 2 (c), further, the transconductance unit 41 is an NMOS transistor, and the load unit 43 is a PMOS transistor.
In addition to the advantages of fig. 2 (b), the pixel circuit of fig. 2 (c) has another advantage of higher image sensing readout frame rate. Since a driving unit 39 is connected after the amplifying unit 37, it is possible not only to improve the read-out charge/voltage gain of the pixel circuit but also to reduce the read-out time of the signal charge/current. Therefore, when the pixel circuit is used for realizing X-ray imaging, large-area X-ray detection can be realized in a shorter time, so that the photoelectric image sensor has a higher reading frame rate, and the pixel circuit has important significance for high-frame-rate application of CT (computed tomography) examination and the like.
In the embodiments disclosed above, the amplifying and driving unit 30 in the pixel circuit may be implemented by a thin film transistor, for example, the reset unit 32 is implemented by a thin film transistor, the amplifying unit 37 is implemented (i.e., the transconductance unit 41 is implemented by a thin film transistor, and the load unit 43 is implemented by a thin film transistor in the case of having the load unit 43), and the driving unit 39 is implemented by a thin film transistor in the case of having the driving unit 39; the gate unit 50 in the pixel circuit is implemented by a thin film transistor. Further, the light sensing unit 10 is also implemented by a thin film transistor.
In addition, the circuit units included in the pixel circuit according to some embodiments of the present invention, such as the reset unit 32, the storage unit 35, the transconductance unit 41, the load unit 43, the driving unit 39, the gating unit 50, and the like, are only generalized and abbreviated as "circuitry modules" having this function. The use of only a single device in various embodiments is illustrated and does not represent that the cell is formed from a single device or that the cell may be implemented using multiple devices. For example, the load unit 43 may be a cascode structure or the like instead of using a common-source connection method as a load; for another example, the transconductance unit 41 may use a common source connection as the transconductance unit, or a source follower connection as the transconductance unit; for another example, the gating unit 50 may use a single device as a switch control, or a plurality of switching devices connected in parallel or in series as a control switch.
In addition, the pixel circuit according to some embodiments of the present invention may include one or more amplification units 37, and when a plurality of amplification units 37 are included, the amplification units 37 are connected in a cascade manner.
A description of some specific circuit components, structures, and operating principles and processes for implementing the above embodiments is provided below.
Fig. 3 is an example of a pixel circuit. The pixel circuit of fig. 3 comprises a light sensing unit 10, an amplifying and driving unit 30, and a gating unit 50, wherein the amplifying and driving unit 30 comprises a reset unit 32, a storage unit 35, an amplifying unit 37, and the amplifying unit 37 comprises a transconductance unit 41. Specifically, the light sensing unit 10 may include a photodiode PD; the reset unit 32 may include a reset transistor T R (ii) a The memory unit 35 may include a capacitor C1, and particularly, the memory unit 35 may be implemented by using a PN junction capacitance effect of the photodiode PD in a reverse bias state without adding an additional capacitance device; the transconductance cell 41 may include an amplifying transistor T A The gating unit 50 may include a switching transistor T S 。
Specifically, the capacitor C1 is connected in parallel across the photodiode PD, and the cathode of the photodiode PD is connected to the operating voltage V DD The end of the capacitor C1 connected to the anode of the photodiode PD is connected to the reset transistor T R First pole of (1), amplifying transistor T A The control electrode of (2) is connected; reset transistor T R For receiving a reset signal V R And the second pole is grounded. As described above, the amplifying transistor T A Is connected to the end of the capacitor C1 connected to the anode of the photodiode PD, thus amplifying the transistor T A Is used for receiving the voltage signal converted by the storage unit 35 and amplifying the transistor T A Is grounded, amplifying transistor T A Second pole and switching transistor T S Is connected; amplifying transistor T A For converting the voltage signal received by the control electrode of the storage unit 35 into a current signal and outputting the current signal through the second electrode of the storage unit. Switching transistor T S For receiving a line scanning signal V S When switching the transistor T S The control electrode receives a line scanning signal V S Time, switch transistor T S By outputting the current signal received from its first pole through its second pole, the output is the output of the amplifying unit 37 or the amplifying and driving unit 30.
In some embodiments, the reset transistor T R And a switching transistor T S Are all NMOS tubes, and can be oxide TFTs such as IGZO TFTs in type; amplifying transistor T A It can be PMOS tube, and the type can be LTPS TFT.
FIG. 4 is a timing diagram of the operation of the pixel circuit of FIG. 3, which can be divided into a reset phase t 1 At the light-sensitive stage t 2 And a read-out phase t 3 The following is a detailed description.
Reset stage t 1
At this stage, the reset signal V R At a high level, a line scanning signal V S Is low. Thus, the reset transistor T R Is turned on because the cathode of the photodiode PD is connected to the operating voltage V DD So that the photodiode PD is in a reverse-biased state and thus in the reset phase t 1 The anode of the photodiode PD is charged and pulled down to a low level, which may be V, for example SS -this is at the reset transistor T R The second pole, i.e. the ground to which the source is connected, is at a low level V SS In the case of (1). Due to node V in the graph IN Is pulled down to a low level, thereby amplifying the transistor T A Is turned on (i.e., turned on); due to the line scanning signal V S Is low, i.e. inactive, and the transistor T is switched on and off S In an off state (i.e., off, not conducting), there is no output current.
The reset phase is the phase necessary for the entire photo-sensing array, i.e. the array of photo-pixels. After resetting, each pixel circuit in the photoelectric sensing array reaches a uniform initial state, thereby eliminating the influence of possible residual charges in the image sensing array after exposure and image reading of a previous frame, and eliminating the phenomena of 'ghost', 'residual' and the like.
(II) light stage t 2
At this stage, the reset signal V R And a line scanning signal V S Are all low, so that the transistor T is reset R And a switching transistor T S Are all in the off state. The photodiode PD is in negative bias state, and generates photo-generated charge under illumination, so that the voltage point V of the lower plate of the capacitor C1 IN The dot voltage rises.
The illumination stage is a stage of converting optical information into electrical information through a light sensing tube and keeping the electrical information.
(III) readout phase t 3
At this stage, the reset signal V R Is low level, so that the reset transistor T R Continuing to be in a closed state; and after the illumination stage V IN The dot level is charged from a low level to a higher level by the photodiode PD, amplifying the transistor T A Connected low is the drain, so that the amplifying transistor T A In a saturated state. In the readout phase, the line scanning signal V S Is active high, which causes the switching transistor T to be switched on S Is in a conducting state, thereby making the output of the pixel circuit be I X The current of (2).
The read-out stage is to read out V IN The level of the spot is converted to a larger current and then read out at a specific time, which can be used for reading out under the array without interference.
For the pixel circuit of FIG. 3, the photo-generated charge gain A Q Comprises the following steps:
Figure BDA0002945604490000091
wherein gm is the transconductance value of the amplifying transistor, trd is the readout phase time, and Cst is the capacitance value of the storage unit in the pixel.
The pixel circuit of fig. 3 is a hybrid TFT photo-sensing pixel circuit, which is advantageous in terms of higher sensitivity and lower leakage current. Since the transconductance unit 41 adopts the LTPS TFT with higher mobility, the pixel circuit has a higher transconductance value, and the circuit has a larger charge gain according to the photo-generated charge gain formula of the pixel circuit. Therefore, the output signal value is larger, and the connection mode is a source following structure, so that the transconductance value can keep a relatively constant value and cannot be influenced by the difference of TFT devices; the gate unit 50 has a lower off-state current for the oxide TFT and a smaller output noise value, which makes the overall sensitivity of the pixel circuit higher. Compared with the traditional single-type photoelectric sensing pixel circuit, the mixed-type TFT photoelectric image sensor pixel circuit shown in FIG. 3 combines the advantages of multiple types of TFTs, so that the pixel circuit can have the advantages of high transconductance value and low off-state current value.
The signal-to-noise ratio (SNR) of the sensing pixel circuit can be expressed as:
Figure BDA0002945604490000092
wherein, V out-effect The effective value of the signal at the output end of the circuit and the effective value of the noise at the output end.
In summary, the sensing pixel circuit shown in fig. 3 has a higher signal-to-noise ratio due to a larger transconductance value and a lower leakage current.
Fig. 5 is another example of a pixel circuit. The pixel circuit of fig. 5 comprises a light sensing unit 10, an amplifying and driving unit 30, and a gating unit 50, wherein the amplifying and driving unit 30 comprises a reset unit 32, a storage unit 35, an amplifying unit 37, and the amplifying unit 37 comprises a transconductance unit 41. In particular, the light-sensitive cell 10 may comprise a phototransistor T L (ii) a The reset unit 32 may include a reset transistor T R (ii) a The memory cell 35 may include a capacitor C1; the transconductance cell 41 may include an amplifying transistor T A The gating unit 50 may include a switching transistor T S 。
In particular, a phototransistor T L For receiving a strobe signal V B Phototransistor T L Is connected to the working voltage V DD Phototransistor T L Is connected to the reset unit 32, in particular, the capacitor C1 is connected to the phototransistorPipe T L Between the first pole and the second pole; when the phototransistor T L The control electrode receives a strobe signal V B Time, phototransistor T L Capable of generating a photo-generated current signal when a light signal is sensed. Reset transistor T R Is used for receiving a reset signal V R The first pole is connected with a capacitor C1 to form a phototransistor T L Is connected to that end of the second pole, a reset transistor T R The second pole of (b) is grounded. Amplifying transistor T A For receiving the voltage signal converted by the memory cell 35, e.g. the amplifying transistor T A The control electrode of the first transistor is connected with a capacitor C1 to form a phototransistor T L The end of the second pole of (a) is connected; amplifying transistor T A First pole of and the switching transistor T S Is connected to the first pole of the amplifying transistor T A Second pole of (3) is connected to the operating voltage V DD (ii) a Amplifying transistor T A For converting the voltage signal received by the control electrode of the storage unit 35 into a current signal and outputting the current signal through the first electrode of the storage unit. Switching transistor T S For receiving a line scanning signal V S When switching the transistor T S The control electrode receives a line scanning signal V S Time, switch transistor T S By outputting the current signal received from its first pole through its second pole, the output is the output of the amplifying unit 37 or the amplifying and driving unit 30.
In some embodiments, the phototransistor T L Reset transistor T R And a switching transistor T S The transistors are NMOS transistors, and can be oxide TFTs such as IGZO TFTs, or amorphous silicon TFTs; amplifying transistor T A Can be PMOS tube, and the type can be LTPS TFT.
FIG. 6 is a timing diagram of the operation of the pixel circuit of FIG. 5, which can be divided into a reset phase t 1 At the light-sensitive stage t 2 And a read-out phase t 3 The following is a detailed description.
Reset stage t 1
At this stage, the reset signal V R At a high level, a line scanning signal V S And gating the signalNumber V B Are all low. Thus, the reset transistor T R Is turned on, the phototransistor T L Is charged and pulled down to a low level, which may be, for example, V SS This is at the reset transistor T R The second pole, i.e. the ground to which the source is connected, is at a low level V SS In the case of (c). Due to node V in the graph IN Is pulled down to a low level, thereby amplifying the transistor T A Is turned on (i.e., turned on); but since in the reset phase the line scanning signal V S And a strobe signal V B Are all low, so that the phototransistor T L And a switching transistor T S In an off state (i.e., off, not conducting), so there is no output current.
The reset stage is necessary for the whole photoelectric sensing array (i.e. the array formed by the photoelectric pixels), and after reset, each pixel circuit in the photoelectric sensing array reaches a uniform initial state, thereby eliminating the influence of possible residual charges in the image sensing array after exposure and image reading of the previous frame, and eliminating the phenomena of 'ghost', 'residual' and the like.
(II) light stage t 2
At this stage, the reset signal V R Line scanning signal V S And a strobe signal V B Are all low, so that the transistor T is reset R And a switching transistor T S Are all in the off state. Phototransistor T L Because of negative bias state, photo-generated charges are generated under illumination, so that the voltage point V of the lower plate of the capacitor C1 IN The dot voltage rises.
The illumination stage is a stage of converting optical information into electrical information through a light sensing tube and keeping the electrical information.
(III) readout phase t 3
At this stage, the reset signal V R And a strobe signal V B Are all low, which causes the reset transistor T to be reset R Is continuously in the closed state, and passes through the illumination stage and then is V IN Phototransistor T having point level negatively biased L Charging from low level to higher level, and reasonably setting parameters to enableAmplifying transistor T A In a saturated state. In the readout phase, the line scanning signal V S Is high, which causes the switching transistor T to be switched on S Is in a conducting state, thereby making the output of the pixel circuit be I X The current of (2).
The read-out stage is to read out V IN The level of the spot is converted into a larger current and then read out at a specific time, which can be used for reading out under the array without interference.
The pixel circuit of fig. 5 is a hybrid TFT photoelectric sensing pixel circuit, which has the following advantages: (1) The photoelectric TFT such as a-Si TFT or an oxide TFT is used as the photosensitive unit, so that the whole pixel circuit including the photosensitive unit is prepared by the triode process of the TFT, and an additional diode process or a photoresistor process is not needed for manufacturing the photosensitive unit, thereby being beneficial to the integration of the TFT circuit; (2) When the a-Si TFT is used as a photoelectric detection tube, a continuous photo-current (PPC) effect is not generated, the photoelectric response speed is high, and the photoelectric detection with high frame rate is facilitated; (3) The preparation process of the LTPS TFT is that the a-Si film layer is deposited firstly and then laser annealing is carried out to form the polycrystalline silicon, so that the a-Si TFT and the LTPS TFT have high process compatibility, and the problems of introduction of multi-component materials, heterogeneous integration and the like, and cross contamination and the like of different processes are avoided; (4) Higher photoresponsiveness when oxide TFTs are used as phototransistors; (5) When the oxide TFT is used as a switching transistor, the off-state current is smaller, so that the noise charge accumulated on a column readout line by a pixel circuit is less, and the signal-to-noise ratio and the dynamic range of the image sensor are favorably improved.
Fig. 7 is another example of a pixel circuit. The pixel circuit of fig. 7 comprises a light sensing unit 10, an amplifying and driving unit 30, and a gating unit 50, wherein the amplifying and driving unit 30 comprises a reset unit 32, a storage unit 35, an amplifying unit 37, and the amplifying unit 37 comprises a transconductance unit 41 and a load unit 43. Specifically, the light sensing unit 10 may include a photodiode PD; the reset unit 32 may include a reset transistor T R (ii) a The memory cell 35 may comprise a capacitor C1, in particular, may utilize light in a reverse biased stateThe storage unit 35 is realized by the PN junction capacitance effect of the photodiode PD without an additional capacitor device; the transconductance cell 41 may include an amplifying transistor T A The load unit 43 may include a bias transistor T B The gating unit 50 may include a switching transistor T S 。
Specifically, the capacitor C1 is connected in parallel to both ends of the photodiode PD, the anode of the photodiode PD is grounded, and the ends of the capacitor C1 connected to the cathode of the photodiode PD are respectively connected to the reset transistor T R Second pole, amplifying transistor T A The control electrode of (2) is connected; reset transistor T R Is used for receiving a reset signal V R The first pole is connected with a working voltage V DD . As described above, the amplifying transistor T A Is connected to the end of the capacitor C1 connected to the cathode of the photodiode PD, thus amplifying the transistor T A Is used for receiving the voltage signal converted by the storage unit 35 and amplifying the transistor T A First pole of the first transistor and the switching transistor T S Is connected to the second pole of the amplifying transistor T A The second pole of the first diode is grounded; amplifying transistor T A For converting the voltage signal received by the control electrode of the storage unit 35 into a current signal and outputting the current signal through the first electrode of the storage unit. Switching transistor T S For receiving a line scanning signal V S When switching the transistor T S The control electrode receives a line scanning signal V S While the transistor T S The current signal received from the second pole thereof is output through the first pole thereof. Biasing a transistor T B For receiving a strobe signal V B Biasing the transistor T B First pole of and the switching transistor T S Bias the transistor T B Second pole of (3) is connected to the operating voltage V DD (ii) a When biasing the transistor T B The control electrode receives a strobe signal V B While biasing the transistor T B Will be controlled by the switching transistor T S The current signal outputted from the first pole of (1) is converted into a voltage signal and outputted, and the output is the output of the amplifying unit 37 or the amplifying and driving unit 30.
In some embodiments, resetTransistor T R Amplifying transistor T A And a switching transistor T S Are NMOS tubes, and can be oxide TFTs such as IGZO TFTs; biasing a transistor T B Can be PMOS tube, and the type can be LTPS TFT.
In the pixel circuit shown in fig. 7, for different illumination signals or light signals, the photodiode PD generates different photo-generated currents, resulting in a node V IN Is different. Amplifying transistor T A And a bias transistor T B Form a CMOS structure, so that the pixel is opposite to the node V IN The amplification gain of the voltage is:
Figure BDA0002945604490000111
wherein, gm TA For amplifying the transistor T A Transconductance value of, ron TB For biasing the transistor T B The equivalent output impedance of (a); it can be seen that the load unit 43 and the transconductance unit 41 are a PMOS transistor and an NMOS transistor, respectively, and a CMOS structure can be formed, which significantly increases the amplification gain (transconductance value multiplied by load value).
FIG. 8 is a timing diagram of the operation of the pixel circuit of FIG. 7, which can be divided into a reset phase t 1 At the light-sensitive stage t 2 And a read-out phase t 3 The following specifically explains the present invention.
Reset stage t 1
At this stage, the reset signal V R And a strobe signal V B Are all high level, line scanning signal V S Is low. Thus, the reset transistor T R Is turned on, and the cathode of the photodiode PD is charged up to the high level V DD . Due to node V in the graph IN Is pulled up to a high level, thereby amplifying the transistor T A Is turned on (i.e., turned on). Due to the gating signal V B Is high, thus biasing the transistor T B Off (i.e., off, not conducting); due to the line scanning signal V S Is low, i.e. inactive, and the transistor T is switched on S Is in an off state (i.e., off, not conducting), soThere is no output current.
The reset stage is necessary for the whole photoelectric sensing array (i.e. the array formed by the photoelectric pixels), and after reset, each pixel circuit in the photoelectric sensing array reaches a uniform initial state, thereby eliminating the influence of possible residual charges in the image sensing array after exposure and image reading of the previous frame, and eliminating the phenomena of 'ghost', 'residual' and the like.
(II) light stage t 2
At this stage, the reset signal V R And a line scanning signal V S Are all low level, a strobe signal V B Is high level, thereby resetting the transistor T R Switching transistor T S And a bias transistor T B Are both in the off state. Under the action of illumination, the photodiode PD in negative bias state generates and outputs corresponding photo-generated current, so that the voltage point V of the upper plate of the capacitor C1 IN The dot voltage decreases accordingly.
The illumination stage is a stage of converting optical information or optical signals into electrical information through a light sensing tube and keeping the electrical information.
(III) readout phase t 3
At this stage, the reset signal V R Continues to be held low so that the reset transistor T R Is in a closed state; and after the illumination stage V IN The dot level is drained from the high level to a lower level by the photodiode PD, but by setting the parameters, the amplifying transistor T can still be made to A In a state of saturation. In the readout phase, the line scanning signal V S Is high, which causes the switching transistor T to be switched S In an open state (on state); while the strobe signal V B Is an analog low level, which causes the transistor T to be biased B In a saturation region; amplifying transistor T A And a bias transistor T B Has an amplifying function to make the pixel circuit output a voltage V X 。
The read-out stage is to convert V IN The level of the spot is pre-amplified and then read out to the circuitry outside the array for a specific row strobe time, thereby creating an image inside the active arrayThe readouts of the pixels are not interfered with each other.
The pixel circuit of fig. 7 is a hybrid TFT photo-sensing pixel circuit, which has the advantage of high gain; the related amplifying part in the pixel circuit which is made of NMOS transistor or PMOS transistor can not form high-gain operational amplifier; for the conventional pixel circuit, a larger pixel area is often required to achieve a higher magnification, however, in the high-resolution image sensing array, the pixel size is strictly limited. The pixel circuit of fig. 7 uses NMOS transistors to implement the transconductance unit 41 and PMOS transistors to implement the load unit 43, thereby forming a CMOS structure with a high amplification factor; the high-amplification-factor pixel circuit has the advantage of high sensitivity, and can realize high-precision photoelectric image detection; meanwhile, the N-type TFT and the P-type TFT are stacked or staggered in space of the integrated circuit, which is helpful for reducing the pixel area and improving the spatial resolution of the pixel circuit.
Fig. 9 is another example of a pixel circuit. The pixel circuit of fig. 9 comprises a light sensing unit 10, an amplifying and driving unit 30, and a gating unit 50, wherein the amplifying and driving unit 30 comprises a reset unit 32, a storage unit 35, an amplifying unit 37, and the amplifying unit 37 comprises a transconductance unit 41 and a load unit 43. In particular, the light-sensitive cell 10 may comprise a phototransistor T L In particular, the phototransistor T, which may be a double gate structure L (ii) a The reset unit 32 may include a reset transistor T R (ii) a The memory cell 35 may include a capacitor C1; the transconductance cell 41 may include an amplifying transistor T A The load unit 43 may include a bias transistor T B The gating unit 50 may include a switching transistor T S 。
Specifically, the capacitor C1 is connected in parallel to the phototransistor T L A first pole and a second pole; phototransistor T L For receiving a first strobe signal V B1 Phototransistor T L For receiving a second strobe signal V B2 Photo transistor T L Second pole of (2) to ground; when the phototransistor T L SensingAt the time of optical signal, the phototransistor T L Generating a photo-generated current signal under the control of the first and second gating signals; in particular, a phototransistor T L The lighting phase has the following characteristics: under illumination, when the phototransistor T is turned on L When the first control electrode of (1) is at a low level, the higher the potential of the second control electrode is, the phototransistor T is L Under the condition that potential difference exists between the source electrode and the drain electrode, the more photo-generated charges are generated; when the second control electrode is also at low level, the phototransistor T is L And (4) turning off, and generating no light-generated charges, namely, the source and drain poles are equivalent to open circuits. The capacitor C1 is connected with the phototransistor T L And also with the second pole of the reset transistor TR, the amplifying transistor T, respectively A The control electrode of (2) is connected; reset transistor T R Is used for receiving a reset signal V R The first pole is connected with a working voltage V DD . As described above, the amplifying transistor T A The control electrode of the first transistor is connected with a capacitor C1 to form a phototransistor T L Is connected to the first pole of the transistor, thereby amplifying the transistor T A Is used for receiving the voltage signal converted by the storage unit 35 and amplifying the transistor T A First pole of the first transistor and the switching transistor T S Is connected to the second pole of the amplifying transistor T A The second pole of the first diode is grounded; amplifying transistor T A For converting the voltage signal received by the control electrode of the memory cell 35 into a current signal and outputting the current signal through the first electrode of the memory cell. Switching transistor T S For receiving a line scanning signal V S When switching the transistor T S The control electrode receives a line scanning signal V S While, the transistor T S The current signal received from the second pole thereof is output through the first pole thereof. Biasing a transistor T B For receiving a strobe signal V B Biasing the transistor T B And a switching transistor T S Bias the transistor T B Second pole of (3) is connected to the operating voltage V DD (ii) a When biasing the transistor T B The control electrode receives a strobe signal V B While biasing the transistor T B Will be controlled by the switching transistor T S First pole ofThe output current signal is converted into a voltage signal and then output, which is the output of the amplifying unit 37 or the amplifying and driving unit 30.
Phototransistor T L Reset transistor T R Amplifying transistor T A And a switching transistor T S Are all NMOS tubes, and can be oxide TFTs such as IGZO TFTs in type; biasing transistor T B Can be PMOS tube, and the type can be LTPS TFT.
FIG. 10 is a timing diagram of the operation of the pixel circuit of FIG. 9, which can be divided into a reset phase t 1 At the light-sensitive stage t 2 And a read-out phase t 3 The following is a detailed description.
Reset stage t 1
At this stage, the reset signal V R Is high, so that the transistor T is reset R Is turned on, the upper plate or node V of the capacitor C1 IN Is charged and pulled up to a high level V DD . In the reset phase, the first strobe signal V B1 And a second strobe signal V B2 Are all high, which makes the phototransistor T L The state after being illuminated from the last period is initialized. In addition, due to node V IN Is charged and pulled up to a high level V DD Then, the amplifying transistor T is enabled A Is turned on (i.e., turned on). Gating signal V B May be low, thus biasing the transistor T B Is biased to the saturation region but due to the line scanning signal V S Is low, so that the transistor T is switched S In an off state (i.e., off, not conducting), so there is no output current.
The reset stage is necessary for the whole photoelectric sensing array (i.e. the array formed by the photoelectric pixels), and after reset, each pixel circuit in the photoelectric sensing array reaches a uniform initial state, thereby eliminating the influence of possible residual charges in the image sensing array after exposure and image reading of the previous frame, and eliminating the phenomena of 'ghost', 'residual' and the like.
(II) light stage t 2
At this stage, the reset signal V R In the way ofScanning signal V S And a first strobe signal V B1 Are all low, so that the transistor T is reset R And a switching transistor T S Are all in an off state (i.e., off, non-conducting) and the phototransistor T L In a negative bias state, the second strobe signal V is capable of generating photo-generated charges under illumination B2 Is an analog voltage (V) SS <V B2 <V DD ) This causes the phototransistor T to be L The amount of generated photoelectric charge increases, preferably when V B2 Is less than V DD Can generate more photo-generated charge at a lower positive level. Phototransistor T L After photo-generated charge is generated, the upper plate or node V of the capacitor C1 is brought IN The voltage decreases accordingly.
The illumination stage is a stage of converting optical information into electrical information through a light sensing tube and keeping the electrical information.
(III) readout phase t 3
At this stage, the reset signal V R First strobe signal V B1 And a second strobe signal V B2 All at low level, reset transistor T R Continues to be in the off state while the phototransistor T L Also because of the first strobe signal V B1 And a second strobe signal V B2 Are low and are no longer capable of generating photo-generated charge. And after the illumination stage V IN The voltage is discharged from the high level to a later generation level, but by setting the parameters, the amplifying transistor T can still be made to A In a saturated state. In the readout phase, the line scanning signal V S Is high, which causes the switching transistor T to be switched on S In a conducting state; while the strobe signal V B Is an analog low level, which causes the transistor T to be biased B In a saturation region; amplifying transistor T A And a bias transistor T B Has an amplifying function to make the pixel circuit output a voltage V X 。
The read-out stage is to read out V IN The level of the spot is pre-amplified and then read out to the circuitry outside the array for a specific row strobe time, thereby creating an image inside the active arrayThe readouts of the pixels are not interfered with each other.
The pixel circuit of fig. 9 is a hybrid TFT photo-sensing pixel circuit, and in addition to the high gain advantage of the pixel circuit of fig. 7, the pixel circuit of fig. 9 has some additional advantages: (1) The photosensitive unit 10 is realized by an oxide TFT with a double-gate structure, so that the whole pixel circuit including the photosensitive unit 10 does not need an additional process to manufacture the photosensitive unit 10, and the integration of a TFT circuit is facilitated; (2) When one control electrode voltage is negative, the oxide TFT generates photo-generated charges under illumination and has a PPC effect, the quantity of the photo-generated charges can be changed through the voltage control of the other control electrode, and the on-off of the PPC effect is regulated, so that a switch circuit of a traditional pixel circuit, which needs to isolate the PPC effect, can be removed, and the spatial resolution of the pixel circuit is improved.
Fig. 11 is another example of a pixel circuit. The pixel circuit of fig. 11 includes a light sensing unit 10, an amplifying and driving unit 30, and a gating unit 50, wherein the amplifying and driving unit 30 includes a reset unit 32, a storage unit 35, an amplifying unit 37, and the amplifying unit 37 includes a transconductance unit 41 and a load unit 43; here, the transconductance unit 41 and the gating unit 50 may be the same unit, which is an amplifying transistor T with a dual-gate structure A (ii) a Alternatively, the load unit 43 and the gate unit 50 may be the same unit, which is a bias transistor T of a dual gate structure B (ii) a The pixel circuit shown in fig. 11 is an example in which the transconductance unit 41 and the gating unit 50 are the same unit, and the unit is an amplifying transistor T with a dual-gate structure A . Specifically, the light sensing unit 10 may include a photodiode PD; the reset unit 32 may include a reset transistor T R (ii) a The memory unit 35 may include a capacitor C1, and particularly, the memory unit 35 may be implemented by using a PN junction capacitance effect of the photodiode PD in a reverse bias state without adding an additional capacitance device; the transconductance unit 41 and the gating unit 50 may be the same unit, which is an amplifying transistor T with a dual-gate structure A (ii) a The load unit 43 may include a bias transistor T B 。
Specifically, the capacitor C1 is connected in parallel to the lightTwo ends of the photodiode PD are connected, the anode of the photodiode PD is grounded, and the end of the capacitor C1 connected with the cathode of the photodiode PD is respectively connected with the reset transistor T R Second pole, amplifying transistor T A The first control electrode of (a); reset transistor T R Is used for receiving a reset signal V R The first pole is connected with a working voltage V DD . As described above, the amplifying transistor T A Is connected to the end of the capacitor C1 connected to the cathode of the photodiode PD, thus amplifying the transistor T A Is used for receiving the voltage signal converted by the storage unit 35 and amplifying the transistor T A For receiving a line scanning signal V S Amplifying transistor T A And a bias transistor T B Is connected to the first pole of the amplifying transistor T A The second pole of (2) is grounded; amplifying transistor T A For converting the voltage signal received by the first control electrode into a current signal, and receiving the line scanning signal V by the second control electrode S The converted current signal is then output through its first pole. Biasing a transistor T B For receiving a strobe signal V B Biasing the transistor T B The second pole of the first diode is connected with the working voltage; when biasing the transistor T B The control electrode receives a strobe signal V B While biasing the transistor T B Will be amplified by the amplifying transistor T A The current signal outputted from the first pole of (1) is converted into a voltage signal and outputted, and the output is the output of the amplifying unit 37 or the amplifying and driving unit 30. Note that the amplifying transistor T A The switch is of a double-gate structure, so that the on-off of the switch is controlled by two control electrodes, namely a first control electrode and a second control electrode; when one control electrode is in a high level, the working state of the device is controlled by the other control electrode; when one of the control electrodes is low, the device is in an off state (i.e., off, non-conducting).
In some embodiments, the reset transistor T R And an amplifying transistor T A Are all NMOS tubes, and can be oxide TFTs such as IGZO TFTs in type; biasing a transistor T B Can be a PMOS tubeThe type may be LTPS TFT.
FIG. 12 is a timing diagram of the operation of the pixel circuit of FIG. 11, which can be divided into a reset phase t 1 At the light-sensitive stage t 2 And a read-out phase t 3 The following is a detailed description.
Reset phase t 1
At this stage, the reset signal V R And a strobe signal V B Are all high level, line scanning signal V S Is low. Thus, the reset transistor T R Is turned on, and the cathode of the photodiode PD is charged up to the high level V DD (ii) a But amplifying the transistor T A Is low, so that the amplifying transistor T is turned on A In an off state (i.e., off, not conducting). Due to the strobe signal V B Is high, thus biasing the transistor T B In an off state (i.e., off, not conducting).
The reset stage is necessary for the whole photoelectric sensing array (i.e. the array formed by the photoelectric pixels), and after reset, each pixel circuit in the photoelectric sensing array reaches a uniform initial state, thereby eliminating the influence of possible residual charges in the image sensing array after exposure and image reading of the previous frame, and eliminating the phenomena of 'ghost', 'residual' and the like.
(II) light stage t 2
At this stage, the reset signal V R And a line scanning signal V S Are all low level, a strobe signal V B Is high level, thereby resetting the transistor T R Switching transistor T S And a bias transistor T B Are both in the off state. The photodiode PD is in a negative bias state, and therefore can generate photo-generated charges under the action of illumination, so that the voltage point V of the upper plate of the capacitor C1 IN The dot voltage decreases accordingly.
The illumination stage is a stage of converting optical information or optical signals into electrical information through a light sensing tube and keeping the electrical information.
(III) readout phase t 3
At this stage, the reset signal V R Continuous guaranteeIs held low so that the transistor T is reset R Is in the off state. In the readout phase, the line scanning signal V S At high level, after a lighting phase V IN The dot level is drained from the high level to a lower level by the photodiode PD, but by setting the parameters, the amplifying transistor T can still be made to A Is in a saturated state; while the strobe signal V B Is an analog low level, which causes the transistor T to be biased B In a saturation region; amplifying transistor T A And a bias transistor T B Has an amplifying function to make the pixel circuit output a voltage V X 。
The read-out stage is to read out V IN The level of the dots is pre-amplified and then read out to circuitry outside the array for a particular row strobe time so that the readout of the pixels inside the active array are not interfered with each other.
The pixel circuit of fig. 11 is a hybrid TFT photo-sensing pixel circuit, and in addition to the high gain advantage of the pixel circuit of fig. 7, the pixel circuit of fig. 11 has some additional advantages: (1) The transconductance unit 41 and the gating unit 50 are both realized by an oxide TFT with a double-gate structure, which reduces the area of the pixel circuit and improves the spatial resolution of the pixel circuit; (2) From a process point of view, in the two processes of the thin film transistor, the metal layer where the control electrode of the LTPS TFT is located just serves as the control electrode to control the upper oxide TFT device, so that it is feasible to form the oxide TFT with the double gate structure.
Fig. 13 is another example of a pixel circuit, and the pixel circuit of fig. 13 includes a light sensing unit 10, an amplifying and driving unit 30, and a gating unit 50, where the amplifying and driving unit 30 includes a reset unit 32, a storage unit 35, an amplifying unit 37, and a driving unit 39, and the amplifying unit 37 includes a transconductance unit 41 and a load unit 43. Specifically, the light sensing unit 10 may include a photodiode PD, and the reset unit 32 may include a reset transistor T R (ii) a The storage unit 35 may include a capacitor C1, and particularly, the storage unit 35 may be implemented by using a PN junction capacitance effect of the photodiode PD in a reverse bias state without adding an additional capacitance device; transconductanceThe cell 41 comprises an amplifying transistor T A (ii) a The load unit 43 comprises a biasing transistor T B (ii) a The drive unit 39 comprises a follower transistor T SF (ii) a The gating unit 50 includes a switching transistor T SW 。
Specifically, the capacitor C1 is connected in parallel to both ends of the photodiode PD, the anode of the photodiode PD is grounded, and the ends of the capacitor C1 connected to the cathode of the photodiode PD are respectively connected to the reset transistor T R Second pole, amplifying transistor T A The control electrode of (2) is connected; reset transistor T R Is used for receiving a reset signal V R The first pole is connected with a working voltage V DD . As described above, the amplifying transistor T A Is connected to the end of the capacitor C1 connected to the cathode of the photodiode PD, thus amplifying the transistor T A Is used for receiving the voltage signal converted by the storage unit 35 and amplifying the transistor T A And a bias transistor T B Is connected to the first pole of the amplifying transistor T A Is grounded, amplifying transistor T A For converting the voltage signal received by the control electrode of the storage unit 35 into a current signal and outputting the current signal through the first electrode of the storage unit. Biasing a transistor T B For receiving a strobe signal V B Biasing the transistor T B The second pole of the switch is connected with the working voltage; when biasing the transistor T B The control electrode receives a strobe signal V B While biasing the transistor T B Will be amplified by the amplifying transistor T A After the current signal output by the first pole is converted into a voltage signal, the voltage signal passes through a bias transistor T B The first pole of (1). Follower transistor T SF Control electrode of and bias transistor T B Is connected to the first pole of the following transistor T SF Is connected to the operating voltage, follows the transistor T SF Second pole and switching transistor T SW The first pole of (a); follower transistor T SF For receiving its control electrode by a biasing transistor T B Is converted into a current signal and passes through a follower transistor T SF And the second pole of (3). Switching transistor T SW Control electrode for receiving line scanning signalsNumber V S When switching the transistor T SW The control electrode receives a line scanning signal V S Time, switch transistor T SW The current signal received from its first pole is output through its second pole, which is the output of the amplifying and driving unit 30.
In some embodiments, the reset transistor T R Amplifying transistor T A Follower transistor T SF Switching transistor T SW Are all NMOS tubes, and can be oxide TFTs such as IGZO TFTs in type; biasing a transistor T B Can be PMOS tube, and the type can be LTPS TFT.
FIG. 14 is a timing diagram of the operation of the pixel circuit of FIG. 13, which can be divided into a reset phase t 1 At the light-sensitive stage t 2 And a read-out phase t 3 The following is a detailed description.
Reset phase t 1
At this stage, the reset signal V R High level, line scanning signal V S Is low, and thus resets the transistor T R Is turned on to switch the transistor T SW Is turned off. Due to the reset transistor T R Is turned on, and thus the cathode of the photodiode PD is charged up to the high level V DD . Due to node V in the graph IN Is pulled up to a high level, thereby amplifying the transistor T A Is turned on (i.e., turned on). Due to the strobe signal V B Is for example of analog low level, thus biasing the transistor T B Is biased to a saturated state, in one example, V SS <V B <V DD ，V B At this stage it can be understood that a ratio V DD Low level, but higher than global low level, in order to bias the transistor T B Is biased to a saturated state and thus can provide a large output load.
The reset stage is necessary for the whole photoelectric sensing array (i.e. the array formed by photoelectric pixels), after reset, each pixel circuit in the photoelectric sensing array reaches a uniform initial state, thereby eliminating the influence of possible residual charge in the image sensing array after exposure and image reading of the previous frame, and eliminating the phenomena of ' ghost shadow ', residual shadow ' and the like.
(II) light stage t 2
At this stage, the reset signal V R And a line scanning signal V S Are all low, and thus reset the transistor T R And a switching transistor T SW Are all in the closed, gating signal V B Still maintains the original level, which biases the transistor T B Still biased to saturation. Because the photodiode PD is in a negative bias state, under the action of illumination, it generates and outputs a corresponding photo-generated current, so that the voltage point V of the upper plate of the capacitor C1 IN The dot voltage decreases accordingly.
The illumination stage is a stage of converting optical information or optical signals into electrical information through a light sensing tube and keeping the electrical information.
(III) readout phase t 3
At this stage, the reset signal V R Continues to be held low so that the reset transistor T R Is in a closed state; and after the illumination stage V IN The dot level is drained from the high level to a lower level by the photodiode PD, but by setting the parameters, the amplifying transistor T can still be made to A In a saturated state. In the read-out phase, the strobe signal V B Still maintains the original level, which biases the transistor T B Still biased to a saturated state; amplifying transistor T A And a bias transistor T B Has an amplifying function to follow the transistor T SF Control electrode output voltage V A . Follower transistor T SF Control electrode of (2) receiving a voltage V A Then, since in the readout stage, the line scanning signal V S Is high, which causes the switching transistor T to be switched on SW Is in an on state (conducting state), thereby enabling the pixel circuit to output a current I X 。
The read-out stage is to read out V IN The level of the dots is pre-amplified and then read out to circuitry outside the array for a particular row strobe time so that the readout of the pixels inside the active array are not interfered with each other.
The pixel circuit in fig. 13 is a hybrid TFT photoelectric sensing pixel circuit, and has an advantage of a higher readout frame rate. The driving unit 39 is connected behind the amplifying unit 37, which not only improves the readout charge/voltage gain of the pixel circuit, but also reduces the readout time of the signal charge/current, and when the photoelectric image sensor is applied to X-ray imaging, large-area X-ray detection can be realized in a shorter time, so that the photoelectric image sensor has a higher readout frame rate, which is of great significance for high frame rate applications such as CT inspection.
Fig. 15 is another example of a pixel circuit. The pixel circuit of fig. 15 includes a light sensing unit 10, an amplifying and driving unit 30, and a gating unit 50, wherein the amplifying and driving unit 30 includes a reset unit 32, a storage unit 35, an amplifying unit 37, and the amplifying unit 37 includes a transconductance unit 41 and a load unit 43; here, the transconductance unit 41 and the gating unit 50 are the same unit, which is an amplifying transistor T with a dual-gate structure A (ii) a Alternatively, the load unit 43 and the gate unit 50 are the same unit, which is a bias transistor T of a dual gate structure B (ii) a Alternatively, the driving unit 39 and the gating unit 50 are the same unit, which is a follower transistor T of a dual-gate structure SF (ii) a The pixel circuit shown in FIG. 15 is an example in which the driving unit 39 and the gate unit 50 are the same unit, which is a follower transistor T having a dual gate structure SF . Specifically, the light sensing unit 10 may include a photodiode PD; the reset unit 32 may include a reset transistor T R (ii) a The memory unit 35 may include a capacitor C1, and particularly, the memory unit 35 may be implemented by using a PN junction capacitance effect of the photodiode PD in a reverse bias state without adding an additional capacitance device; the transconductance cell 41 may include an amplifying transistor T A (ii) a The load unit 43 may include a bias transistor T B (ii) a The driving unit 39 and the gating unit 50 are the same unit, and the unit is a following transistor T with a dual-gate structure SF 。
Specifically, the capacitor C1 is connected in parallel to both ends of the photodiode PD, while the anode of the photodiode PD is grounded, and the ends of the capacitor C1 connected to the cathode of the photodiode PD are connected to the groundBit transistor T R Second pole, amplifying transistor T A The control electrode of (2) is connected; reset transistor T R Is used for receiving a reset signal V R The first pole is connected with a working voltage V DD . As described above, the amplifying transistor T A Is connected to the end of the capacitor C1 connected to the cathode of the photodiode PD, thus amplifying the transistor T A Is used for receiving the voltage signal converted by the storage unit 35 and amplifying the transistor T A And a bias transistor T B Is connected to the first pole of the amplifying transistor T A Is grounded, amplifying transistor T A For converting the voltage signal received by the control electrode of the storage unit 35 into a current signal and outputting the current signal through the first electrode of the storage unit. Biasing transistor T B For receiving a strobe signal V B Biasing the transistor T B The second pole of the switch is connected with the working voltage; when biasing the transistor T B The control electrode receives a strobe signal V B While biasing the transistor T B Will be amplified by the amplifying transistor T A After the current signal output by the first pole is converted into a voltage signal, the voltage signal passes through a bias transistor T B The first pole of (1). Follower transistor T SF And a bias transistor T B Is connected to the first pole of the following transistor T SF For receiving a line scanning signal V S Follower transistor T SF The first pole of the first switch is connected with the working voltage; follower transistor T SF For receiving by a bias transistor T at its first control electrode B Is converted into a current signal and follows the transistor T SF The second control electrode receives the line scanning signal V S The converted current signal is then output through its second pole. Note that the follower transistor T SF The switch is of a double-gate structure, so that the on-off of the switch is controlled by two control electrodes, namely a first control electrode and a second control electrode; when one control electrode is in a high level, the working state of the device is controlled by the other control electrode; when one of the control electrodes is low, the device is in an off state (i.e., off, non-conducting).
In some embodiments, the reset transistor T R Amplifying transistor T A And a following transistor T SF Are all NMOS tubes, and can be oxide TFTs such as IGZO TFTs in type; biasing a transistor T B It can be PMOS tube, and the type can be LTPS TFT.
FIG. 16 is a timing diagram of the operation of the pixel circuit of FIG. 15, which can be divided into a reset phase t 1 At the light-sensitive stage t 2 And a read-out phase t 3 The following specifically explains the present invention.
Reset stage t 1
At this stage, the reset signal V R High level, thus resetting the transistor T R Is turned on so that the cathode of the photodiode PD is charged up to the high level V DD . Due to the strobe signal V B Is for example of analog low level, thus biasing the transistor T B Is biased to a saturated state, in one example, V SS <V B <V DD ，V B At this stage it can be understood that a ratio V DD Low level, but higher than global low level, in order to bias the transistor T B Is biased to a saturated state and thus can provide a large output load. In the reset phase, the line scanning signal V S Is low and therefore follows transistor T SF In the off state, the pixel circuit has no output current.
The reset stage is necessary for the whole photoelectric sensing array (i.e. the array formed by the photoelectric pixels), and after reset, each pixel circuit in the photoelectric sensing array reaches a uniform initial state, thereby eliminating the influence of possible residual charges in the image sensing array after exposure and image reading of the previous frame, and eliminating the phenomena of 'ghost', 'residual' and the like.
(II) light stage t 2
At this stage, the reset signal V R And a line scanning signal V S Are all low, and thus reset the transistor T R And a following transistor T SF Are all in off, gating signal V B Still maintains the original level, which makes the crystal biasedBody tube T B Still biased to saturation. Because the photodiode PD is in a negative bias state, under the action of illumination, it generates and outputs a corresponding photo-generated current, so that the voltage point V of the upper plate of the capacitor C1 IN The dot voltage decreases accordingly.
The illumination stage is a stage of converting optical information or optical signals into electrical information through a light sensing tube and keeping the electrical information.
(III) readout phase t 3
At this stage, the reset signal V R Continues to be held low so that the reset transistor T R Is in a closed state; and after the illumination stage V IN The dot level is drained from the high level to a lower level by the photodiode PD, but by setting the parameters, the amplifying transistor T can still be made to A In a state of saturation. In the read-out phase, the strobe signal V B Still maintains the original level, which biases the transistor T B Still biased to saturation; amplifying transistor T A And a bias transistor T B Has an amplifying function to follow the transistor T SF Control electrode output voltage V A (ii) a And due to the fact that during the read-out phase, the line scanning signal V S Is high and therefore follows transistor T SF Will voltage V A Conversion to current I X And output.
The read-out stage is to read out V IN The level of the dots is pre-amplified and then read out to circuitry outside the array for a particular row strobe time so that the readout of the pixels inside the active array are not interfered with each other.
The pixel circuit of fig. 15 is a hybrid TFT photo-sensing pixel circuit, which has some additional advantages in addition to the advantage of a higher readout frame rate of the pixel circuit of fig. 13: (1) Both the driving unit 39 and the gate unit 50 are implemented by one dual gate oxide TFT, which reduces the area of the pixel circuit and improves the spatial resolution of the pixel circuit; (2) From a process point of view, in the two processes of the thin film transistor, the metal layer where the control electrode of the LTPS TFT is located just serves as the control electrode to control the upper oxide TFT device, so that it is feasible to form the oxide TFT with the double gate structure.
In summary, the pixel circuits of some embodiments of the invention have the following advantages:
(1) The high-mobility high-driving-capability LTPS TFT has high read-out frame rate, high mobility and high driving capability due to the LTPS TFT in the amplifying and driving unit, and therefore the signal charge transfer speed is high; the oxide TFT of the gating unit can be realized by a self-aligned process, the parasitic capacitance is small, and the RC delay in the image sensing array is small.
(2) Has high sensitivity, and can reduce X-ray irradiation dose when being applied to X-ray imaging. The CMOS readout circuit constructed based on LTPS TFTs and metal oxides has a high charge gain, and thus can output a large amount of signal charges even with a small X-ray irradiation. In the present invention, the amplifying and driving unit and the gate unit constitute a readout circuit.
(3) The amount of readout noise can be reduced, and when the method is applied to X-ray imaging, the dynamic range of the X-ray imaging is expanded. For a conventional X-ray readout array, both signal and noise charges are transferred to peripheral readout circuitry and then amplified. The amount of noise amplified limits the dynamic range of conventional X-ray readout arrays. And the pixel circuit is amplified in the array formed by the LTPS TFT and the metal oxide TFT, so that the signal charge is amplified in the array and then transferred to an external readout circuit for further processing, which has remarkable advantages for low-noise and high-dynamic-range applications.
Referring to fig. 17, some embodiments of the present application further disclose a pixel array of a photo sensor, the pixel array at least includes N rows and M columns of photo-electric pixel units 01, N rows of scanning signal lines, M columns of reading output lines, and a reset signal line; the pixel unit can be the pixel unit described in any embodiment of the present application, and the pixel unit is connected to the respective scanning signal line and the respective read output line: for example, the pixel units of each row are connected to the scanning signal lines of the row to receive row scanning signals; the pixel cells of each column are connected to a read output line of the column for outputting corresponding electricityA signal. All the pixel units can be connected to the same reset signal line together to receive reset signals; in other words, the reset signal is supplied to all the pixel circuits through one reset signal line. In some examples, the pixel cell may require other signals, such as a strobe signal V B First strobe signal V B1 And/or the second strobe signal V B2 And so on, then add corresponding signal lines in the pixel array, such as adding a strobe signal line, a first strobe signal line, and/or a second strobe signal line.
Further, in some examples where the pixel circuit has the transconductance cell 41, such as the example of the pixel circuit shown in fig. 7 and 13, when the pixel array of the photo sensor includes such pixel circuits, the pixel circuits of each column may share one transconductance cell 41, such as the example shown in fig. 18.
Fig. 19 is a longitudinal cross-sectional view of a hybrid TFT integrated pixel circuit according to the present application. In some embodiments, the PMOS transistors of the pixel circuits herein may be implemented by LTPS TFTs (e.g., readout devices), and the NMOS transistors (e.g., photosensitive devices) may be implemented by oxide TFTs; in one example, the amplifying and driving unit, the gating unit, is used as a readout device, and the photosensitive unit is used as a photosensitive device. Preferably, the pixel circuit herein can be prepared by LTPO (poly silicon and oxide) process, for example, a method for preparing the pixel circuit, comprising the steps of: on a Substrate (Substrate), such as a glass Substrate (or other flexible material Substrate), firstly depositing a Buffer Layer (Buffer Layer), and then sequentially preparing a polycrystalline silicon Layer, a gate dielectric Layer GI-1, a gate electrode GE1 Layer, a gate dielectric Layer GI-2, a gate electrode GE2 and the like at a higher temperature (for example, 600 ℃); then, sequentially preparing a spacing layer ILD1, an active layer IGZO, a gate dielectric layer GI-3, a gate electrode GE3 layer, a spacing layer ILD-2, a source and drain metal layer SD1, a passivation layer PV, a planarization layer PLN1, an interconnection layer SD2 and the like at a lower temperature (for example, 300 ℃); wherein, the source and drain regions of the LTPS and the multilayer metal are interconnected through the through hole.
In some embodiments, the hybrid TFT integration process or the manufacturing method of the pixel circuit of the present application is not limited to the hybrid integration process of LTPS (poly silicon) and MOTFT (metal oxide thin film transistor); other possible options include hybrid integration processes of LTPS (poly-silicon) and A-Si (amorphous silicon) TFTs; or a hybrid integration process of LTPS (poly-silicon) and organic (organic) TFTs. It is worth mentioning that amorphous silicon also has better photoelectric effect, and because it is Si system, it has higher compatibility with LTPS. In addition, in addition to the case where the LTPS TFT is used as a charge amplifying and reading device and the metal oxide is used as a photosensitive device, the LTPS TFT may be used as a charge amplifying and reading device, the amorphous silicon TFT may be used as a photosensitive device, or the LTPS TFT may be used as a charge amplifying and reading device, the organic TFT may be used as a photosensitive device, and the like. The reasons for using LTPS TFT as a charge amplifying and reading device and amorphous silicon TFT as a photosensitive device include that amorphous silicon also has a good photoelectric effect, and the material system and process compatibility of the amorphous silicon TFT and LTPS TFT are high.
In short, thanks to the design of the hybrid TFT image sensing circuit, i.e., the pixel circuit, presented in the present application, it is possible to achieve more flexibility in terms of process implementation. The conventional TFT image sensing circuit defines integration of the photodiode PD with the readout TFT, and such a process has difficulties in that: (2) The TFT and PD processes are serial, the preparation period is long, and the mutual compatibility is poor; (2) The method relates to the processing flow of heterogeneous semiconductors, and the device interface has contradictory requirements on the process; (3) The image sensor has high requirements on leakage current, uniformity, photoelectric response, reliability and the like of the photodiode PD, the PD manufacturing process has high difficulty, the yield is low, and the cost is high. The new design of the hybrid TFT image sensor avoids the complex photodiode process and brings new possibility for introducing the image sensing array process with lower cost and higher performance. In particular, in the manufacturing process of the hybrid TFT image sensor, some embodiments may be based on the TFT process, the process preparation compatibility of the sensing portion and the readout portion is greatly improved, and parameters such as leakage current, uniformity, photoelectric response, and the like of the sensing portion can be better controlled.
Some embodiments of the present invention provide an optoelectronic pixel circuit and a pixel array of a photo-image sensor, which can sense a weak optical image signal, convert the weak optical image signal into an appropriate electrical signal, and output the electrical signal for a subsequent image processing unit. The photosensitive unit, the amplifying and driving unit and the gating unit can be integrated in a stacking mode through a mixed type thin film transistor process, namely, the reading unit is completed through a high-temperature thin film preparation process, and then interconnection and the photosensitive unit are completed through a low-temperature thin film preparation process. The image sensing pixel circuit integrated by the mixed TFT technology disclosed by some embodiments of the invention has the advantages of high charge/voltage gain, low noise, high reading speed and the like, and can effectively amplify a weak electric signal output by the photosensitive unit, thereby obtaining a clear image with high contrast ratio under lower light intensity.
Reference is made herein to various exemplary embodiments. However, those skilled in the art will recognize that changes and modifications may be made to the exemplary embodiments without departing from the scope hereof. For example, the various operational steps, as well as the components used to perform the operational steps, may be implemented in differing ways depending upon the particular application or consideration of any number of cost functions associated with operation of the system (e.g., one or more steps may be deleted, modified or incorporated into other steps).
While the principles herein have been illustrated in various embodiments, many modifications of structure, arrangement, proportions, elements, materials, and components particularly adapted to specific environments and operative requirements may be employed without departing from the principles and scope of the present disclosure. The above modifications and other changes or modifications are intended to be included within the scope of this document.
The foregoing detailed description has been described with reference to various embodiments. However, one of ordinary skill in the art would recognize that various modifications and changes can be made without departing from the scope of the present disclosure. Accordingly, the disclosure is to be considered in all respects as illustrative and not restrictive, and all such modifications are intended to be included within the scope thereof. Also, advantages, other advantages, and solutions to problems have been described above with regard to various embodiments. However, the benefits, advantages, solutions to problems, and any element(s) that may cause any element(s) to occur or become more pronounced are not to be construed as a critical, required, or essential feature or element of any or all the claims. As used herein, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, system, article, or apparatus. Furthermore, the term "coupled," and any other variation thereof, as used herein, refers to a physical connection, an electrical connection, a magnetic connection, an optical connection, a communicative connection, a functional connection, and/or any other connection.
Those skilled in the art will recognize that many changes may be made to the details of the above-described embodiments without departing from the underlying principles of the invention. Accordingly, the scope of the invention should be determined only by the claims.

Claims (22)

1. A mixed photoelectric sensing pixel circuit is characterized in that the sensing pixel circuit mainly comprises thin film transistors, and the thin film transistors comprise two types of thin film transistors; wherein:
the sensing pixel circuit comprises a photosensitive unit, an amplifying and driving unit and a gating unit;
the photosensitive unit is used for generating a photo-generated current signal when sensing a light signal;
the gating unit is used for responding to a line scanning signal to gate the amplifying and driving unit;
the amplifying and driving unit at least comprises a readout unit, and the readout unit comprises a reset unit, a storage unit and an amplifying unit; the storage unit is used for accumulating the photo-generated current signals and converting the photo-generated current signals into corresponding voltage signals; the reset unit resets the storage unit in response to a reset signal; the amplifying unit is used for amplifying the voltage signal converted by the storage unit and then outputting the amplified voltage signal; the amplifying unit comprises a transconductance unit, and the transconductance unit is used for converting the voltage signal converted by the storage unit into a current signal.
2. The sensing pixel circuit of claim 1, wherein the transconductance cell includes an amplifying transistor T A Said gating unit comprising a switching transistor T S ；
The amplifying transistor T A For receiving the voltage signal converted by the memory cell, the amplifying transistor T A The first pole of the amplifying transistor T is grounded, the amplifying transistor T A Second pole of (2) and switching transistor T S The first pole of (a); the amplifying transistor T A The voltage signal received by the control electrode of the storage unit is converted into a current signal and is output through the second electrode of the storage unit;
the switching transistor T S For receiving said line scanning signal when said switching transistor T is turned on S When the control electrode of the switching transistor T receives the line scanning signal S By outputting the current signal received from its first pole through its second pole.
3. The sensing pixel circuit of claim 1, wherein the photosensitive cell comprises a phototransistor T L Said transconductance unit including an amplifying transistor T A Said gating unit comprising a switching transistor T S ；
The phototransistor T L For receiving a gating signal, said phototransistor T L Is connected to the operating voltage, the phototransistor T L Is connected to the reset unit; when the phototransistor T is L When the control electrode of the photoelectric transistor receives the gating signal, the photoelectric transistor T L The photo-generated current signal can be generated when the optical signal is sensed;
the amplifying transistor T A For receiving the voltage signal converted by the memory cell, the amplifying transistor T A First pole of and the switching transistor T S Is connected to the first pole of (2), said is putLarge transistor T A The second pole of the first diode is connected with the working voltage; the amplifying transistor T A The voltage signal received by the control pole of the storage unit and converted by the storage unit is converted into a current signal and is output through the first pole of the storage unit;
the switching transistor T S Is used for receiving the line scanning signal when the switching transistor T is turned on S When the control electrode of the switch transistor receives the line scanning signal, the switch transistor T S By outputting the current signal received from its first pole through its second pole.
4. A sensing pixel circuit according to any one of claims 1 to 3, wherein the transconductance cell and the gating cell are implemented by different types of thin film transistors.
5. The sensing pixel circuit of claim 4, wherein the transconductance cell is implemented by a low temperature polysilicon thin film transistor and the gating cell is implemented by an oxide thin film transistor.
6. The sensing pixel circuit of claim 5, wherein the transconductance unit is a PMOS transistor and the gating unit is an NMOS transistor.
7. The sensing pixel circuit of claim 1, wherein the amplifying unit further comprises a load unit, the load unit and the transconductance unit form a complementary type operational amplifier structure, and the load unit is used for converting a current signal of the transconductance unit into a voltage signal.
8. The sensing pixel circuit of claim 7, wherein the transconductance cell comprises an amplifying transistor T A Said gating unit comprising a switching transistor T S The load unit comprises a bias transistor T B ；
The amplifying transistor T A The control electrode is used for receiving the voltage signal converted by the memory cellA number; the amplifying transistor T A First pole of and the switching transistor T S Is connected to the second pole; the amplifying transistor T A The second pole of (2) is grounded; the amplifying transistor T A The voltage signal received by the control pole of the storage unit and converted by the storage unit is converted into a current signal and is output through the first pole of the storage unit;
the switching transistor T S For receiving said line scanning signal when said switching transistor T is turned on S When the control electrode of the transistor receives the line scanning signal, the transistor T S Outputting the current signal received from the second pole thereof through the first pole thereof;
the bias transistor T B The control electrode of (a) is used for receiving a gating signal; the bias transistor T B First pole of and the switching transistor T S The first pole of (a); the bias transistor T B The second pole of the first diode is connected with the working voltage; when the bias transistor T is turned on B When the control electrode of the bias transistor T receives the gating signal, the bias transistor T B Will be controlled by the switching transistor T S The current signal output by the first pole is converted into a voltage signal and then output.
9. The sensing pixel circuit of claim 7, wherein the photosensitive cell comprises a phototransistor T of a double gate structure L Said transconductance unit including an amplifying transistor T A Said gating unit comprising a switching transistor T S The load unit comprises a bias transistor T B ；
The phototransistor T L For receiving a first gating signal, said phototransistor T L For receiving a second gating signal, said phototransistor T L Is connected to the reset unit, the phototransistor T L The second pole of (2) is grounded; when the phototransistor T is L When an optical signal is sensed, the phototransistor T L Generating a photo-generated current signal under the control of the first and second strobe signals;
the amplifying transistor T A The control electrode is used for receiving the voltage signal converted by the storage unit; the amplifying transistor T A First pole of and the switching transistor T S Is connected to the second pole; the amplifying transistor T A The second pole of (2) is grounded; the amplifying transistor T A The voltage signal which is received by the control electrode of the storage unit and converted by the storage unit is converted into a current signal and is output through the first electrode of the storage unit;
the switching transistor T S Is used for receiving the line scanning signal when the switching transistor T is turned on S When the control electrode of the transistor T receives the line scanning signal, the transistor T S Outputting the current signal received from the second pole thereof through the first pole thereof;
the bias transistor T B The control electrode of (a) is used for receiving a gating signal; the bias transistor T B First pole of and the switching transistor T S The first pole of (a); the bias transistor T B The second pole of the first diode is connected with the working voltage; when the bias transistor T is turned on B When the control electrode of the bias transistor T receives the gating signal B Will be controlled by the switching transistor T S The current signal output by the first pole is converted into a voltage signal and then output.
10. A sensing pixel circuit according to claim 1, wherein the transconductance unit and the gating unit are the same unit which is an amplifying transistor T of a double gate structure A 。
11. The sensor pixel circuit according to claim 7, wherein the transconductance unit and the gating unit are the same unit which is an amplifying transistor T with a double-gate structure A (ii) a Or, the load unit and the gating unit are the same unit, and the unit is a bias transistor T with a double-grid structure B 。
12. A sensing pixel circuit as claimed in any one of claims 8, 9 or 11, which isCharacterized in that the transconductance unit and the gating unit are the same unit, and the unit is an amplifying transistor T with a double-grid structure A In the case where the load unit includes a bias transistor T B ；
The amplifying transistor T A The first control electrode is used for receiving the voltage signal converted by the storage unit; the amplifying transistor T A The second control electrode is used for receiving the line scanning signal; the amplifying transistor T A And a bias transistor T B The first pole of (a); the amplifying transistor T A The second pole of (2) is grounded; the amplifying transistor T A The first control electrode is used for converting the voltage signal received by the first control electrode into a current signal and outputting the converted current signal through the first control electrode when the second control electrode receives the line scanning signal;
the bias transistor T B The control electrode of (a) is used for receiving a gating signal; the bias transistor T B The second pole of the first diode is connected with the working voltage; when the bias transistor T is turned on B When the control electrode of the bias transistor T receives the gating signal B Will be amplified by the amplifying transistor T A The current signal output by the first pole is converted into a voltage signal and then output.
13. The sensor pixel circuit according to claim 7, wherein the amplifying and driving unit further comprises a driving unit, and the driving unit is configured to convert the voltage signal output by the load unit into a current signal and output the current signal.
14. The sensing pixel circuit of claim 13, wherein the transconductance cell comprises an amplifying transistor T A Said load unit comprising a bias transistor T B The drive unit comprises a following transistor T SF (ii) a The gating unit includes a switching transistor T SW ；
The amplifying transistor T A The control electrode is used for receiving the voltage signal converted by the memory cellNumber; the amplifying transistor T A And a bias transistor T B The first pole of (a); the amplifying transistor T A The second pole of (2) is grounded; the amplifying transistor T A The voltage signal which is received by the control electrode of the storage unit and converted by the storage unit is converted into a current signal and is output through the first electrode of the storage unit;
the bias transistor T B The control electrode of (a) is used for receiving a gating signal; the bias transistor T B The second pole of the first diode is connected with the working voltage; when the bias transistor T is turned on B When the control electrode of the bias transistor T receives the gating signal B Will be amplified by the amplifying transistor T A After the current signal output by the first pole is converted into a voltage signal, and passes through the bias transistor T B A first pole output of (a);
the following transistor T SF And said bias transistor T B Of the following transistor T, the following transistor T SF Is connected to the operating voltage, said follower transistor T SF Second pole of (2) and switching transistor T SW The first pole of (a); the following transistor T SF For receiving its control electrode by said biasing transistor T B Is converted into a current signal and passes through a follower transistor T SF The second pole of (3);
the switching transistor T SW Is used for receiving the line scanning signal when the switching transistor T is turned on SW When the control electrode of the switching transistor T receives the line scanning signal SW The current signal received from the first pole thereof is output through the second pole thereof.
15. The sensor pixel circuit of claim 13, wherein the transconductance unit and the gating unit are the same unit, which is an amplifying transistor T with a dual-gate structure A (ii) a Or, the load unit and the gating unit are the same unit, and the unit is a bias transistor T with a double-grid structure B (ii) a Or, the drive unit and the selectorThe pass unit is the same unit which is a follow transistor T with a double-gate structure SF 。
16. The sensor pixel circuit according to claim 15, wherein the driving unit and the gating unit are the same unit, and the unit is a follower transistor T with a dual-gate structure SF In the case where the transconductance cell includes an amplifying transistor T A The load unit comprises a bias transistor T B ；
The amplifying transistor T A The control electrode is used for receiving the voltage signal converted by the storage unit; the amplifying transistor T A And a bias transistor T B The first pole of (a); the amplifying transistor T A The second pole of (2) is grounded; the amplifying transistor T A The voltage signal received by the control pole of the storage unit and converted by the storage unit is converted into a current signal and is output through the first pole of the storage unit;
the bias transistor T B The control electrode of (a) is used for receiving a gating signal; the bias transistor T B First pole of and amplifying transistor T A The first pole of (a); the bias transistor T B The second pole of the first diode is connected with the working voltage; when the bias transistor T is turned on B When the control electrode of the bias transistor T receives the gating signal, the bias transistor T B Will be amplified by the amplifying transistor T A Is converted into a voltage signal and passed through the bias transistor T B A first pole output of (a);
the following transistor T SF And said bias transistor T B Said follower transistor T, said follower transistor T SF For receiving said line scanning signal, said follower transistor T SF Is connected to the working voltage; the following transistor T SF For receiving by the bias transistor T at its first control electrode B When the voltage signal output by the first electrode of the following transistor T is converted into a current signal SF The second control electrode receives the line scanning signalWhen the current signal is converted, the converted current signal is output through the second pole.
17. A sensing pixel circuit according to claim 13, 14, 15 or 16, wherein the transconductance cell and the load cell are implemented by different types of thin film transistors.
18. The sensing pixel circuit of claim 17, wherein the transconductance cell is implemented by an oxide thin film transistor and the load cell is implemented by a low temperature polysilicon thin film transistor.
19. The sensor pixel circuit of claim 18, wherein the transconductance cell is an NMOS transistor and the load cell is a PMOS transistor.
20. The sensing pixel circuit of claim 18, wherein the driving unit is implemented by an oxide thin film transistor; the gate unit is implemented by an oxide thin film transistor.
21. A sensing pixel circuit according to claim 1, 2, 3, 5, 6, 7, 8, 9, 10, 11, 13, 14, 15 or 16, wherein the amplifying and driving unit is implemented by a thin film transistor; the gate unit is implemented by a thin film transistor.
22. The sensing pixel circuit of claim 21, wherein the photosensitive element is implemented by a thin film transistor.
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