CN113014209B - Floating bias dynamic amplifying circuit based on stable bandwidth circuit - Google Patents

Floating bias dynamic amplifying circuit based on stable bandwidth circuit Download PDF

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CN113014209B
CN113014209B CN202110201431.4A CN202110201431A CN113014209B CN 113014209 B CN113014209 B CN 113014209B CN 202110201431 A CN202110201431 A CN 202110201431A CN 113014209 B CN113014209 B CN 113014209B
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tube
pmos tube
pmos
nmos
amplifier
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CN113014209A (en
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周雄
李强
杨世恒
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Chengdu Xiling Technology Co ltd
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Chengdu Xiling Technology Co ltd
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/56—Modifications of input or output impedances, not otherwise provided for
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers

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Abstract

The invention discloses a floating bias dynamic amplifying circuit based on a stable bandwidth circuit, which comprises: a stable bandwidth module and a floating bias dynamic amplifier; the output end VDDL of the stable bandwidth module is connected with the input end VDDL of the floating bias dynamic amplifier; the stable bandwidth module is used for stabilizing the current, bandwidth, establishing speed and noise of the floating bias dynamic amplifier; the floating bias dynamic amplifier is used for amplifying an input signal; the invention solves the problem that the current, the bandwidth, the establishment speed and the noise of the amplifier are unstable when the amplifier encounters the change of the process, the voltage and the temperature.

Description

Floating bias dynamic amplifying circuit based on stable bandwidth circuit
Technical Field
The invention relates to the field of integrated circuits, in particular to a floating bias dynamic amplifying circuit based on a stable bandwidth circuit.
Background
CMOS amplifiers are an important module in integrated circuits and are widely used in a variety of analog circuits such as residual amplifiers in data converters, integrators, buffers, filters, prevention of large, error amplifiers, etc. Conventional CMOS amplifier structures generally have a relatively comprehensive performance, such as high gain, large swing, high common mode rejection, stable bandwidth, and the like, and are relatively general. But has the disadvantage of not being energy efficient enough.
Disclosure of Invention
Aiming at the defects in the prior art, the floating bias dynamic amplifying circuit based on the stable bandwidth circuit solves the problem that when an amplifier encounters changes of technology, voltage and temperature, the current, bandwidth, establishment speed and noise are unstable.
In order to achieve the aim of the invention, the invention adopts the following technical scheme: a floating bias dynamic amplification circuit based on a stable bandwidth circuit, comprising: a stable bandwidth module and a floating bias dynamic amplifier;
the output end VDDL of the stable bandwidth module is connected with the input end VDDL of the floating bias dynamic amplifier; the stable bandwidth module is used for stabilizing the current, bandwidth, establishing speed and noise of the floating bias dynamic amplifier; the floating bias dynamic amplifier is used for amplifying an input signal.
Further, the stabilizing bandwidth module includes: current source I 0 PMOS tube M 5 NMOS tube M 6 PMOS tube M 7 Error amplifier A 0 And a load resistor R 0 ；
The error amplifier A 0 The non-inverting input ends of (2) are respectively grounded with a load resistor R 0 And PMOS tube M 7 Is connected with the drain electrode of the stable bandwidth module and is used as an output end VDDL of the stable bandwidth module; the error amplifier A 0 Is respectively connected with the PMOS tube M 5 Source of (2) and current source I 0 Is connected with one end of the PMOS tube M 7 Is connected with the grid electrode; the current source I 0 The other end of (2) is connected with a PMOS tube M 7 Is connected with the source electrode of the module and is used as a power supply end VDDH of the stable bandwidth module; the NMOS tube M 6 The drain electrode of (C) is respectively connected with the PMOS tube M 5 Drain electrode of PMOS tube M 5 Gate and NMOS transistor M 6 The source of which is grounded.
The beneficial effects of the above-mentioned further scheme are: self-biased M 5 -M 6 Inverter at constant bias current I 0 Under the control of (1), at M 5 Generates a reference voltage V at the source terminal ref . Self-biased inverter M 5 、M 6 Is referred to in M 1 、M 2 Scaling in equal proportion.
Bias current I 0 And is also scaled down equally for stabilizing the current of the floating bias inverter. The error VDDL-Vref between the output voltages VDDL and Vref passes through the amplifier A 0 Is connected with a PMOS power tube M 7 Is formed on the substrate.
Further, error amplifier A 0 Comprising the following steps: PMOS tube M 11 PMOS tube M 12 NMOS tube M 9 NMOS tube M 10 And NMOS tube M 13 ；
The PMOS tube M 11 The grid electrode of (C) is respectively connected with the PMOS tube M 12 Grid electrode of PMOS tube M 11 Drain electrode of (d) and NMOS transistor M 9 The drain electrode of the PMOS transistor is connected with the source electrode of the PMOS transistor M 12 Is connected with the source electrode of the transistor;
the NMOS tube M 10 The source electrode of (a) is respectively connected with the NMOS tube M 13 Drain electrode of (d) and NMOS transistor M 9 The drain electrode of the transistor is connected with the PMOS tube M 12 Is connected to the drain of the transistor and serves as an error amplifier A 0 An output terminal of (a);
the NMOS tube M 10 Is used as the gate of the error amplifier A 0 Is provided;
the NMOS tube M 9 Is used as the gate of the error amplifier A 0 Is connected with the normal phase input end of the circuit board;
the NMOS tube M 13 Is grounded with its gate as error amplifier A 0 Bias voltage terminal Bias of (a).
Further, the floating bias dynamic amplifier includes: capacitor C RES PMOS tube M 1 PMOS tube M 2 Load capacitor C 1x Load capacitor C 2x NMOS tube M 3 NMOS tube M 4 Single pole double throw switch S 1 Single pole double throw switch S 2 Switch S 3 And switch S 4 ；
The single-pole double-throw switch S 1 A dynamic terminal of (C) and a capacitor C RES Is connected with one end of the PMOS tube M respectively at the first stationary end 1 Source electrode of (C) and PMOS tube M 2 The second stationary terminal of the source connection is used as an input terminal VDDL of the floating bias dynamic amplifier; the single-pole double-throw switch S 2 A dynamic terminal of (C) and a capacitor C RES The other end of the first fixed end is connected with the ground, the second fixed end is respectively connected with the NMOS tube M 3 Source and NMOS tube M 4 Is connected with the source electrode of the transistor; the PMOS tube M 1 Gate and NMOS tube M 3 The drain electrodes of the gate electrodes are respectively connected with the NMOS tube M 3 Drain of (d) switch S 3 Load capacitor C connected to ground and one end of 1x Connecting; the NMOS tube M 4 Gate and PMOS tube M 2 The drain electrodes of the gate electrodes are respectively connected with the PMOS tube M 2 A load capacitor C connected to the drain of the capacitor 2x And switch S 4 Is connected with one end of the connecting rod; the switch S 3 And the other end of (2) is connected with switch S 4 Is connected with the other end of the connecting rod.
The beneficial effects of the above-mentioned further scheme are: in the reset phaseCapacitance C during bit RES Connect the input terminal VDDL and the ground terminal VSS to supplement charge and charge the capacitor C RES The voltage difference between the positive stage and the negative stage is restored to VDDL-VSS, and the load capacitor C at the output end of the dynamic amplifier is floated and biased 2x And a load capacitance C 1x Is reset to V CM 。
At the amplified clock phase (Φamp), capacitor C RES And (5) accessing a floating bias dynamic amplifier, and starting amplification.
Because the floating bias dynamic amplifier is not directly connected with the power supply and the ground, the current flowing in the floating bias dynamic amplifier mainly flows from C RES There is no quiescent current provided. As the amplification proceeds, V RESP Gradually decreasing voltage, V RESN The voltage gradually increases. Each MOS tube (M) of floating bias dynamic amplifier 1 To M 4 ) The operating state of the tube is changed from saturation region to weak inversion region, and the transconductance/current ratio (gm/I D ) Will gradually increase.
Thus, the floating bias dynamic amplifier is more energy efficient than the amplifiers of the conventional Class-AB/Class-C inverter structure. When the amplifying time is enough, the dynamic amplifier presents similar characteristics to the fully established characteristics until the MOS tube M 1 To M 4 Gradually becomes zero, and outputs a common mode (V OP +V ON ) And/2 is also relatively stable. Therefore, the dynamic amplifier can work in an open-loop mode or a closed-loop mode, and can meet various application scenes.
Further, PMOS tube M 7 Is a power tube.
Further, PMOS tube M 5 Size of (d) and PMOS tube M 1 And PMOS tube M 2 Is scaled by a dimension of the same;
the NMOS tube M 6 Size of (d) and PMOS tube M 1 And PMOS tube M 2 Is scaled to be the same size.
In summary, the invention has the following beneficial effects: through this stable bandwidth module, the voltage of VDDL is substantially equal to the reference voltage Vref. R is R 0 The value is larger, and the current flowing through the load is smaller as the load of the stable bandwidth module. VDDL when process, temperature, voltage changeWith corresponding compensation as Vref changes. Therefore, through the stable bandwidth module, the current, the bandwidth, the establishment speed and the noise of the floating bias dynamic amplifier can be stabilized, and the circuit module using the dynamic amplifier can be ensured to have stable performance.
Drawings
FIG. 1 is a schematic diagram of a floating bias dynamic amplification circuit based on a stable bandwidth circuit;
fig. 2 is an error amplifier a 0 Is a schematic structural diagram of the (c).
Detailed Description
The following description of the embodiments of the present invention is provided to facilitate understanding of the present invention by those skilled in the art, but it should be understood that the present invention is not limited to the scope of the embodiments, and all the inventions which make use of the inventive concept are protected by the spirit and scope of the present invention as defined and defined in the appended claims to those skilled in the art.
As shown in fig. 1, a floating bias dynamic amplifying circuit based on a stable bandwidth circuit includes: a stable bandwidth module and a floating bias dynamic amplifier;
the output end VDDL of the stable bandwidth module is connected with the input end VDDL of the floating bias dynamic amplifier; the stable bandwidth module is used for stabilizing the current, bandwidth, establishing speed and noise of the floating bias dynamic amplifier; the floating bias dynamic amplifier is used for amplifying an input signal.
The stable bandwidth module includes: current source I 0 PMOS tube M 5 NMOS tube M 6 PMOS tube M 7 Error amplifier A 0 And a load resistor R 0 ；
The error amplifier A 0 The non-inverting input ends of (2) are respectively grounded with a load resistor R 0 And PMOS tube M 7 Is connected with the drain electrode of the stable bandwidth module and is used as an output end VDDL of the stable bandwidth module; the error amplifier A 0 Is respectively connected with the PMOS tube M 5 Source of (2) and current source I 0 Is connected with one end of the connecting rod,the output end of the PMOS tube M 7 Is connected with the grid electrode; the current source I 0 The other end of (2) is connected with a PMOS tube M 7 Is connected with the source electrode of the module and is used as a power supply end VDDH of the stable bandwidth module; the NMOS tube M 6 The drain electrode of (C) is respectively connected with the PMOS tube M 5 Drain electrode of PMOS tube M 5 Gate and NMOS transistor M 6 The source of which is grounded.
Self-biased M 5 -M 6 Inverter at constant bias current I 0 Under the control of (1), at M 5 Generates a reference voltage Vref at the source terminal. Self-biased inverter M 5 、M 6 Is referred to in M 1 、M 2 Scaling in equal proportion. Bias current I 0 And is also scaled down equally for stabilizing the current of the floating bias inverter. The error VDDL-Vref between the output voltages VDDL and Vref passes through the amplifier A 0 Is connected with a PMOS power tube M 7 Is formed on the substrate.
As shown in fig. 2, error amplifier a 0 Comprising the following steps: PMOS tube M 11 PMOS tube M 12 NMOS tube M 9 NMOS tube M 10 And NMOS tube M 13 ；
The PMOS tube M 11 The grid electrode of (C) is respectively connected with the PMOS tube M 12 Grid electrode of PMOS tube M 11 Drain electrode of (d) and NMOS transistor M 9 The drain electrode of the PMOS transistor is connected with the source electrode of the PMOS transistor M 12 Is connected with the source electrode of the transistor; the NMOS tube M 10 The source electrode of (a) is respectively connected with the NMOS tube M 13 Drain electrode of (d) and NMOS transistor M 9 The drain electrode of the transistor is connected with the PMOS tube M 12 Is connected to the drain of the transistor and serves as an error amplifier A 0 An output terminal of (a); the NMOS tube M 10 Is used as the gate of the error amplifier A 0 Is provided; the NMOS tube M 9 Is used as the gate of the error amplifier A 0 Is connected with the normal phase input end of the circuit board; the NMOS tube M 13 Is grounded with its gate as error amplifier A 0 Bias voltage terminal Bias of (a).
The floating bias dynamic amplifier includes: capacitor C RES PMOS tube M 1 PMOS tube M 2 Load capacitor C 1x Load capacitor C 2x NMOS tube M 3 NMOS tube M 4 Single pole double throw switch S 1 Single pole double throw switch S 2 Switch S 3 And switch S 4 ；
The single-pole double-throw switch S 1 A dynamic terminal of (C) and a capacitor C RES Is connected with one end of the PMOS tube M respectively at the first stationary end 1 Source electrode of (C) and PMOS tube M 2 The second stationary terminal of the source connection is used as an input terminal VDDL of the floating bias dynamic amplifier; the single-pole double-throw switch S 2 A dynamic terminal of (C) and a capacitor C RES The other end of the first fixed end is connected with the ground, the second fixed end is respectively connected with the NMOS tube M 3 Source and NMOS tube M 4 Is connected with the source electrode of the transistor; the PMOS tube M 1 Gate and NMOS tube M 3 The drain electrodes of the gate electrodes are respectively connected with the NMOS tube M 3 Drain of (d) switch S 3 Load capacitor C connected to ground and one end of 1x Connecting; the NMOS tube M 4 Gate and PMOS tube M 2 The drain electrodes of the gate electrodes are respectively connected with the PMOS tube M 2 A load capacitor C connected to the drain of the capacitor 2x And switch S 4 Is connected with one end of the connecting rod; the switch S 3 And the other end of (2) is connected with switch S 4 Is connected with the other end of the connecting rod.
At reset phase, capacitor C RES Connect the input terminal VDDL and the ground terminal VSS to supplement charge and charge the capacitor C RES The voltage difference between the positive stage and the negative stage is restored to VDDL-VSS, and the load capacitor C at the output end of the dynamic amplifier is floated and biased 2x And a load capacitance C 1x Is reset to V CM 。
At the amplified clock phase (Φamp), capacitor C RES And (5) accessing a floating bias dynamic amplifier, and starting amplification.
Because the floating bias dynamic amplifier is not directly connected with the power supply and the ground, the current flowing in the floating bias dynamic amplifier mainly flows from C RES There is no quiescent current provided. As the amplification proceeds, V RESP Gradually decreasing voltage, V RESN The voltage gradually increases. Each MOS tube (M) of floating bias dynamic amplifier 1 To M 4 ) The working state of the tube is changed from saturated region to weak inversion regionTransconductance/current ratio (gm/I) D ) Will gradually increase.
Thus, the floating bias dynamic amplifier is more energy efficient than the amplifiers of the conventional Class-AB/Class-C inverter structure. When the amplifying time is enough, the dynamic amplifier presents similar characteristics to the fully established characteristics until the MOS tube M 1 To M 4 Gradually becomes zero, and outputs a common mode (V OP +V ON ) And/2 is also relatively stable. Therefore, the dynamic amplifier can work in an open-loop mode or a closed-loop mode, and can meet various application scenes.
In summary, the invention has the following beneficial effects: through this stable bandwidth module, the voltage of VDDL is substantially equal to the reference voltage Vref. R is R 0 The value is larger, and the current flowing through the load is smaller as the load of the stable bandwidth module. When the process, temperature and voltage are changed, VDDL is correspondingly compensated along with the change of Vref. Therefore, through the stable bandwidth module, the current, the bandwidth, the establishment speed and the noise of the floating bias dynamic amplifier can be stabilized, and the circuit module using the dynamic amplifier can be ensured to have stable performance.

Claims (3)

1. A floating bias dynamic amplification circuit based on a stable bandwidth circuit, comprising: a stable bandwidth module and a floating bias dynamic amplifier;
the output end VDDL of the stable bandwidth module is connected with the input end VDDL of the floating bias dynamic amplifier; the stable bandwidth module is used for stabilizing the current, bandwidth, establishing speed and noise of the floating bias dynamic amplifier; the floating bias dynamic amplifier is used for amplifying an input signal;
the stable bandwidth module includes: current source I 0 PMOS tube M 5 NMOS tube M 6 PMOS tube M 7 Error amplifier A 0 And a load resistor R 0 ；
The error amplifier A 0 The non-inverting input ends of (2) are respectively grounded with a load resistor R 0 And PMOS tube M 7 Is connected with the drain electrode of the stable bandwidth module and is used as an output end VDDL of the stable bandwidth module; the error amplifier A 0 Is respectively connected with the PMOS tube M 5 Source of (2) and current source I 0 Is connected with one end of the PMOS tube M 7 Is connected with the grid electrode; the current source I 0 The other end of (2) is connected with a PMOS tube M 7 Is connected with the source electrode of the module and is used as a power supply end VDDH of the stable bandwidth module; the NMOS tube M 6 The drain electrode of (C) is respectively connected with the PMOS tube M 5 Drain electrode of PMOS tube M 5 Gate and NMOS transistor M 6 The source electrode of the gate electrode is grounded;
the error amplifier A 0 Comprising the following steps: PMOS tube M 11 PMOS tube M 12 NMOS tube M 9 NMOS tube M 10 And NMOS tube M 13 ；
The PMOS tube M 11 The grid electrode of (C) is respectively connected with the PMOS tube M 12 Grid electrode of PMOS tube M 11 Drain electrode of (d) and NMOS transistor M 9 Is connected with the drain electrode of the PMOS tube M 11 The source electrode of (C) is respectively connected with the PMOS tube M 12 Is connected with a power supply end VDDH of the stable bandwidth module; the NMOS tube M 10 The source electrode of (a) is respectively connected with the NMOS tube M 13 Drain electrode of (d) and NMOS transistor M 9 The drain electrode of the transistor is connected with the PMOS tube M 12 Is connected with the drain electrode of the PMOS tube M 12 Is used as the drain electrode of the error amplifier A 0 An output terminal of (a); the NMOS tube M 10 Is used as the gate of the error amplifier A 0 Is provided; the NMOS tube M 9 Is used as the gate of the error amplifier A 0 Is connected with the normal phase input end of the circuit board; the NMOS tube M 13 Is grounded with its gate as error amplifier A 0 Bias voltage terminal Bias of (a);
the floating bias dynamic amplifier includes: capacitor C RES PMOS tube M 1 PMOS tube M 2 Load capacitor C 1x Load capacitor C 2x NMOS tube M 3 NMOS tube M 4 Single pole double throw switch S 1 Single pole double throw switch S 2 Switch S 3 And switch S 4 ；
The single-pole double-throw switch S 1 A dynamic terminal of (C) and a capacitor C RES Is connected with one end of the PMOS tube M respectively at the first stationary end 1 Source electrode of (C) and PMOS tube M 2 The second stationary terminal of the source connection is used as an input terminal VDDL of the floating bias dynamic amplifier; the single-pole double-throw switch S 2 A dynamic terminal of (C) and a capacitor C RES The other end of the first fixed end is connected with the ground, the second fixed end is respectively connected with the NMOS tube M 3 Source and NMOS tube M 4 Is connected with the source electrode of the transistor; the PMOS tube M 1 Gate and NMOS tube M 3 The drain electrodes of the gate electrodes are respectively connected with the NMOS tube M 3 Drain of (d) switch S 3 Load capacitor C connected to ground and one end of 1x Connecting; the NMOS tube M 4 Gate and PMOS tube M 2 The drain electrodes of the gate electrodes are respectively connected with the PMOS tube M 2 A load capacitor C connected to the drain of the capacitor 2x And switch S 4 Is connected with one end of the connecting rod; the switch S 3 And the other end of (2) is connected with switch S 4 Is connected with the other end of the connecting rod.
2. The floating bias dynamic amplification circuit based on a stable bandwidth circuit according to claim 1, wherein the PMOS transistor M 7 Is a power tube.
3. The floating bias dynamic amplification circuit based on a stable bandwidth circuit according to claim 1, wherein the PMOS transistor M 5 Size of (d) and PMOS tube M 1 And PMOS tube M 2 Is scaled by a dimension of the same; the NMOS tube M 6 Size of (d) and PMOS tube M 1 And PMOS tube M 2 Is scaled to be the same size.
CN202110201431.4A 2021-02-23 2021-02-23 Floating bias dynamic amplifying circuit based on stable bandwidth circuit Active CN113014209B (en)

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JP2000114891A (en) * 1998-10-01 2000-04-21 Sony Corp Current source circuit
WO2010135710A1 (en) * 2009-05-21 2010-11-25 Qualcomm Incorporated Buffer with active output impedance matching
CN203491978U (en) * 2013-06-27 2014-03-19 快捷半导体(苏州)有限公司 Output stage circuit, class AB amplifier and electronic device
CN104076860A (en) * 2014-07-18 2014-10-01 周国文 Band-gap reference source for digital-analog hybrid circuit
CN104253589A (en) * 2013-06-27 2014-12-31 快捷半导体(苏州)有限公司 Static current balance method, output stage circuit, AB type amplifier and electronic equipment
CN109193079A (en) * 2018-11-19 2019-01-11 重庆西南集成电路设计有限责任公司 Impedance converts single-pole double throw microwave switch
CN111290465A (en) * 2019-01-28 2020-06-16 展讯通信（上海）有限公司 Low-dropout voltage stabilizer

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105049015B (en) * 2015-08-07 2018-01-16 康希通信科技（上海）有限公司 The single-pole double throw RF switch and hilted broadsword of single-pole single-throw(SPST RF switch and its composition throw RF switch more

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000114891A (en) * 1998-10-01 2000-04-21 Sony Corp Current source circuit
WO2010135710A1 (en) * 2009-05-21 2010-11-25 Qualcomm Incorporated Buffer with active output impedance matching
CN203491978U (en) * 2013-06-27 2014-03-19 快捷半导体(苏州)有限公司 Output stage circuit, class AB amplifier and electronic device
CN104253589A (en) * 2013-06-27 2014-12-31 快捷半导体(苏州)有限公司 Static current balance method, output stage circuit, AB type amplifier and electronic equipment
CN104076860A (en) * 2014-07-18 2014-10-01 周国文 Band-gap reference source for digital-analog hybrid circuit
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CN111290465A (en) * 2019-01-28 2020-06-16 展讯通信（上海）有限公司 Low-dropout voltage stabilizer

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