CN113014209A - Floating bias dynamic amplification circuit based on stable bandwidth circuit - Google Patents
Floating bias dynamic amplification circuit based on stable bandwidth circuit Download PDFInfo
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- CN113014209A CN113014209A CN202110201431.4A CN202110201431A CN113014209A CN 113014209 A CN113014209 A CN 113014209A CN 202110201431 A CN202110201431 A CN 202110201431A CN 113014209 A CN113014209 A CN 113014209A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/56—Modifications of input or output impedances, not otherwise provided for
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
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Abstract
The invention discloses a floating bias dynamic amplifying circuit based on a stable bandwidth circuit, which comprises: a stable bandwidth module and a floating bias dynamic amplifier; an output end VDDL of the bandwidth stabilizing module is connected with an input end VDDL of the floating bias dynamic amplifier; the bandwidth stabilizing module is used for stabilizing the current, the bandwidth, the building speed and the noise of the floating bias dynamic amplifier; the floating bias dynamic amplifier is used for amplifying an input signal; the invention solves the problem that the current, bandwidth, building speed and noise of the amplifier are unstable when the amplifier encounters the changes of process, voltage and temperature.
Description
Technical Field
The invention relates to the field of integrated circuits, in particular to a floating bias dynamic amplifying circuit based on a stable bandwidth circuit.
Background
CMOS amplifiers are important modules in integrated circuits and are widely used in a variety of analog circuits such as residual amplifiers, integrators, buffers, filters, precautionary, error amplifiers, etc. in data converters. Conventional CMOS amplifier structures generally have more comprehensive performance, such as high gain, large swing, high common mode rejection, stable bandwidth, and the like, and are more versatile. But has a disadvantage of insufficient energy efficiency.
Disclosure of Invention
Aiming at the defects in the prior art, the floating bias dynamic amplifying circuit based on the stable bandwidth circuit solves the problem that the current, the bandwidth, the establishing speed and the noise of the amplifier are relatively unstable when the amplifier encounters the changes of the process, the voltage and the temperature.
In order to achieve the purpose of the invention, the invention adopts the technical scheme that: a floating bias dynamic amplifying circuit based on a stable bandwidth circuit comprises: a stable bandwidth module and a floating bias dynamic amplifier;
an output end VDDL of the bandwidth stabilizing module is connected with an input end VDDL of the floating bias dynamic amplifier; the bandwidth stabilizing module is used for stabilizing the current, the bandwidth, the building speed and the noise of the floating bias dynamic amplifier; the floating bias dynamic amplifier is used for amplifying an input signal.
Further, the stabilizing bandwidth module includes: current source I0PMOS transistor M5NMOS transistor M6PMOS transistor M7Error amplifier A0And a load resistance R0；
The error amplifier A0The positive phase input ends of the two resistors are respectively connected with the load resistor R which is grounded0And PMOS transistor M7And as the output end VDDL of the bandwidth stabilizing module; the error amplifier A0Respectively connected with PMOS transistor M5Source and current source I0One end of the PMOS transistor is connected with the output end of the PMOS transistor M7The gate of (1) is connected; the current source I0Another end of the PMOS transistor M7Is connected and serves as a power supply terminal VDDH of the bandwidth stabilizing module; the NMOS tube M6Respectively with the PMOS transistor M5Drain electrode of PMOS transistor M5Grid and NMOS tube M6The gate of (a) is connected and the source is grounded.
The beneficial effects of the above further scheme are: self-biased M5-M6Inverter at constant bias current I0Under the control of M5The source terminal of the voltage regulator generates a reference voltage Vref. Self-biased inverter M5、M6Is referred to as M1、M2And (4) scaling the components in equal proportion.
Bias current I0And also scaled down by the same scale for stabilizing the current of the floating bias inverter. The error VDDL-Vref between the output voltages VDDL and Vref passes through the amplifier A0Is connected with a PMOS power tube M7A gate electrode of (1).
Further, an error amplifier A0The method comprises the following steps: PMOS tube M11PMOS transistor M12NMOS transistor M9NMOS transistor M10And NMOS transistor M13；
The PMOS tube M11The grid of the transistor is respectively connected with a PMOS transistor M12Grid and PMOS transistor M11Drain electrode of (1) and NMOS tube M9Is connected with the drain electrode of the PMOS tube M12Is connected to the source of (a);
the NMOS tube M10Respectively with the NMOS transistor M13Drain electrode of (1) and NMOS tube M9Source electrode of (1) is connected, and drain electrode of (3) is connected with PMOS tube M12Is connected to the drain of the transistor and acts as an error amplifier A0An output terminal of (a);
the NMOS tube M10As an error amplifier A0The inverting input terminal of (1);
the NMOS tube M9As an error amplifier A0A positive phase input terminal of;
the NMOS tube M13With its gate as an error amplifier A0Bias voltage terminal Bias.
Further, the floating bias dynamic amplifier comprises: capacitor CRESPMOS transistor M1PMOS transistor M2A load capacitor C1xA load capacitor C2xNMOS transistor M3NMOS transistor M4Single-pole double-throw switch S1Single-pole double-throw switch S2Switch S3And switch S4；
The single-pole double-throw switch S1Moving terminal and capacitor CRESIs connected with a first fixed end of the PMOS tube M respectively1Source electrode and PMOS transistor M2Of the second fixed terminal of the source connectionAn input end VDDL of the floating bias dynamic amplifier; the single-pole double-throw switch S2Moving terminal and capacitor CRESIs connected with the other end of the NMOS tube M, the first fixed end of the NMOS tube M is grounded, and the second fixed end of the NMOS tube M is respectively connected with the NMOS tube M3Source electrode and NMOS transistor M4Is connected to the source of (a); the PMOS tube M1Grid and NMOS tube M3The drain electrodes of the NMOS transistors are respectively connected with the NMOS transistors M3Drain electrode of (1), switch S3And a load capacitor C connected to ground1xConnecting; the NMOS tube M4Grid and PMOS transistor M2The drain electrodes of the two transistors are respectively connected with a PMOS tube M2Drain electrode of (1), and load capacitance C connected to ground2xAnd switch S4Is connected with one end of the connecting rod; the switch S3And the other end of (1) and a switch S4The other end of the connecting rod is connected.
The beneficial effects of the above further scheme are: in the reset phase, the capacitor CRESConnecting input terminal VDDL and ground terminal VSS, supplementing charge, and connecting capacitor CRESRestoring the voltage difference between the positive and negative stages to VDDL-VSS, and floating-biasing the load capacitor C at the output end of the dynamic amplifier2xAnd a load capacitor C1xIs reset to VCM。
In the amplified clock phase (Φ amp), the capacitor CRESAnd (5) connecting a floating bias dynamic amplifier, and starting amplification.
Because the floating bias dynamic amplifier is not directly connected with a power supply and the ground, the current flowing in the floating bias dynamic amplifier is mainly from CRESProvided, there is no quiescent current. As the amplification proceeds, VRESPThe voltage gradually decreases, VRESNThe voltage gradually increases. Each MOS transistor (M) of floating bias dynamic amplifier1To M4) The working state of the tube is gradually changed from a saturation region to a weak inversion region, and the transconductance/current ratio (gm/I) of the tube isD) Will gradually increase.
Therefore, the floating bias dynamic amplifier is more energy efficient than the amplifier of the traditional Class-AB/Class-C inverter structure. When the amplification time is sufficient, the dynamic amplifier exhibits characteristics similar to those of a fully-built transistor until the MOS transistor M1To M4Gradually becomes zero and outputsCommon mode (V)OP+VON) The/2 is also more stable. Therefore, the dynamic amplifier can work in an open-loop mode and a closed-loop mode, and can meet various application scenes.
Further, PMOS transistor M7Is a power tube.
Further, PMOS transistor M5Size of and PMOS transistor M1And PMOS transistor M2Scaling the size of (a);
the NMOS tube M6Size of and PMOS transistor M1And PMOS transistor M2Are scaled proportionally.
In conclusion, the beneficial effects of the invention are as follows: through the stabilization bandwidth module, the voltage of VDDL is substantially equal to the reference voltage Vref. R0The value is large, and the current flowing through the load serving as the load of the bandwidth stabilizing module is small. When the process, temperature and voltage change, VDDL compensates correspondingly with the change of Vref. Therefore, the current, the bandwidth, the establishment speed and the noise of the floating bias dynamic amplifier can be stabilized through the bandwidth stabilizing module, and the circuit module using the dynamic amplifier can be ensured to have stable performance.
Drawings
FIG. 1 is a schematic structural diagram of a floating bias dynamic amplifying circuit based on a stable bandwidth circuit;
FIG. 2 shows an error amplifier A0Schematic structural diagram of (1).
Detailed Description
The following description of the embodiments of the present invention is provided to facilitate the understanding of the present invention by those skilled in the art, but it should be understood that the present invention is not limited to the scope of the embodiments, and it will be apparent to those skilled in the art that various changes may be made without departing from the spirit and scope of the invention as defined and defined in the appended claims, and all matters produced by the invention using the inventive concept are protected.
As shown in fig. 1, a floating bias dynamic amplifying circuit based on a stable bandwidth circuit includes: a stable bandwidth module and a floating bias dynamic amplifier;
an output end VDDL of the bandwidth stabilizing module is connected with an input end VDDL of the floating bias dynamic amplifier; the bandwidth stabilizing module is used for stabilizing the current, the bandwidth, the building speed and the noise of the floating bias dynamic amplifier; the floating bias dynamic amplifier is used for amplifying an input signal.
The stabilizing bandwidth module includes: current source I0PMOS transistor M5NMOS transistor M6PMOS transistor M7Error amplifier A0And a load resistance R0；
The error amplifier A0The positive phase input ends of the two resistors are respectively connected with the load resistor R which is grounded0And PMOS transistor M7And as the output end VDDL of the bandwidth stabilizing module; the error amplifier A0Respectively connected with PMOS transistor M5Source and current source I0One end of the PMOS transistor is connected with the output end of the PMOS transistor M7The gate of (1) is connected; the current source I0Another end of the PMOS transistor M7Is connected and serves as a power supply terminal VDDH of the bandwidth stabilizing module; the NMOS tube M6Respectively with the PMOS transistor M5Drain electrode of PMOS transistor M5Grid and NMOS tube M6The gate of (a) is connected and the source is grounded.
Self-biased M5-M6Inverter at constant bias current I0Under the control of M5Generates a reference voltage Vref. Self-biased inverter M5、M6Is referred to as M1、M2And (4) scaling the components in equal proportion. Bias current I0And also scaled down by the same scale for stabilizing the current of the floating bias inverter. The error VDDL-Vref between the output voltages VDDL and Vref passes through the amplifier A0Is connected with a PMOS power tube M7A gate electrode of (1).
As shown in fig. 2, the error amplifier a0The method comprises the following steps: PMOS tube M11PMOS transistor M12NMOS transistor M9NMOS transistor M10And NMOS transistor M13；
The PMOS tube M11The grid of the transistor is respectively connected with a PMOS transistor M12Grid and PMOS transistor M11Drain electrode of (1) and NMOS tube M9Is connected with the drain electrode of the PMOS tube M12Is connected to the source of (a); the NMOS tube M10Respectively with the NMOS transistor M13Drain electrode of (1) and NMOS tube M9Source electrode of (1) is connected, and drain electrode of (3) is connected with PMOS tube M12Is connected to the drain of the transistor and acts as an error amplifier A0An output terminal of (a); the NMOS tube M10As an error amplifier A0The inverting input terminal of (1); the NMOS tube M9As an error amplifier A0A positive phase input terminal of; the NMOS tube M13With its gate as an error amplifier A0Bias voltage terminal Bias.
The floating bias dynamic amplifier comprises: capacitor CRESPMOS transistor M1PMOS transistor M2A load capacitor C1xA load capacitor C2xNMOS transistor M3NMOS transistor M4Single-pole double-throw switch S1Single-pole double-throw switch S2Switch S3And switch S4；
The single-pole double-throw switch S1Moving terminal and capacitor CRESIs connected with a first fixed end of the PMOS tube M respectively1Source electrode and PMOS transistor M2The second fixed end of the floating bias dynamic amplifier is used as an input end VDDL of the floating bias dynamic amplifier; the single-pole double-throw switch S2Moving terminal and capacitor CRESIs connected with the other end of the NMOS tube M, the first fixed end of the NMOS tube M is grounded, and the second fixed end of the NMOS tube M is respectively connected with the NMOS tube M3Source electrode and NMOS transistor M4Is connected to the source of (a); the PMOS tube M1Grid and NMOS tube M3The drain electrodes of the NMOS transistors are respectively connected with the NMOS transistors M3Drain electrode of (1), switch S3And a load capacitor C connected to ground1xConnecting; the NMOS tube M4Grid and PMOS transistor M2The drain electrodes of the two transistors are respectively connected with a PMOS tube M2Drain electrode of (1), and load capacitance C connected to ground2xAnd switch S4Is connected with one end of the connecting rod; the switch S3And the other end of (1) and a switch S4The other end of the connecting rod is connected.
In the reset phase, the capacitor CRESConnecting input terminal VDDL and ground terminal VSS, supplementing charge, and connecting capacitor CRESRestoring the voltage difference between the positive and negative stages to VDDL-VSS, and floating-biasing the load capacitor C at the output end of the dynamic amplifier2xAnd a load capacitor C1xIs reset to VCM。
In the amplified clock phase (Φ amp), the capacitor CRESAnd (5) connecting a floating bias dynamic amplifier, and starting amplification.
Because the floating bias dynamic amplifier is not directly connected with a power supply and the ground, the current flowing in the floating bias dynamic amplifier is mainly from CRESProvided, there is no quiescent current. As the amplification proceeds, VRESPThe voltage gradually decreases, VRESNThe voltage gradually increases. Each MOS transistor (M) of floating bias dynamic amplifier1To M4) The working state of the tube is gradually changed from a saturation region to a weak inversion region, and the transconductance/current ratio (gm/I) of the tube isD) Will gradually increase.
Therefore, the floating bias dynamic amplifier is more energy efficient than the amplifier of the traditional Class-AB/Class-C inverter structure. When the amplification time is sufficient, the dynamic amplifier exhibits characteristics similar to those of a fully-built transistor until the MOS transistor M1To M4Gradually becomes zero, outputting a common mode (V)OP+VON) The/2 is also more stable. Therefore, the dynamic amplifier can work in an open-loop mode and a closed-loop mode, and can meet various application scenes.
In conclusion, the beneficial effects of the invention are as follows: through the stabilization bandwidth module, the voltage of VDDL is substantially equal to the reference voltage Vref. R0The value is large, and the current flowing through the load serving as the load of the bandwidth stabilizing module is small. When the process, temperature and voltage change, VDDL compensates correspondingly with the change of Vref. Therefore, the current, the bandwidth, the establishment speed and the noise of the floating bias dynamic amplifier can be stabilized through the bandwidth stabilizing module, and the circuit module using the dynamic amplifier can be ensured to have stable performance.
Claims (6)
1. A floating bias dynamic amplification circuit based on a stable bandwidth circuit is characterized by comprising: a stable bandwidth module and a floating bias dynamic amplifier;
an output end VDDL of the bandwidth stabilizing module is connected with an input end VDDL of the floating bias dynamic amplifier; the bandwidth stabilizing module is used for stabilizing the current, the bandwidth, the building speed and the noise of the floating bias dynamic amplifier; the floating bias dynamic amplifier is used for amplifying an input signal.
2. The floating bias dynamic amplification circuit based on the stable bandwidth circuit of claim 1, wherein the stable bandwidth module comprises: current source I0PMOS transistor M5NMOS transistor M6PMOS transistor M7Error amplifier A0And a load resistance R0；
The error amplifier A0The positive phase input ends of the two resistors are respectively connected with the load resistor R which is grounded0And PMOS transistor M7And as the output end VDDL of the bandwidth stabilizing module; the error amplifier A0Respectively connected with PMOS transistor M5Source and current source I0One end of the PMOS transistor is connected with the output end of the PMOS transistor M7The gate of (1) is connected; the current source I0Another end of the PMOS transistor M7Is connected and serves as a power supply terminal VDDH of the bandwidth stabilizing module; the NMOS tube M6Respectively with the PMOS transistor M5Drain electrode of PMOS transistor M5Grid and NMOS tube M6The gate of (a) is connected and the source is grounded.
3. The floating bias dynamic amplification circuit based on the stable bandwidth circuit as claimed in claim 2, wherein the error amplifier A is arranged in the floating bias dynamic amplification circuit0The method comprises the following steps: PMOS tube M11PMOS transistor M12NMOS transistor M9NMOS transistor M10And NMOS transistor M13；
The PMOS tube M11The grid of the transistor is respectively connected with a PMOS transistor M12Grid and PMOS transistor M11Drain electrode of (1) and NMOS tube M9Is connected with the drain electrode of the PMOS tube M12Is connected to the source of (a); the NMOS tube M10Respectively with the NMOS transistor M13Drain electrode of (1) and NMOS tube M9Source electrode of (1) is connected, and drain electrode of (3) is connected with PMOS tube M12Is connected to the drain of the transistor and acts as an error amplifier A0An output terminal of (a); the NMOS tube M10As an error amplifier A0The inverting input terminal of (1); the NMOS tube M9As an error amplifier A0A positive phase input terminal of; the NMOS tube M13With its gate as an error amplifier A0Bias voltage terminal Bias.
4. The stable bandwidth circuit based floating bias dynamic amplification circuit of claim 3, wherein the floating bias dynamic amplifier comprises: capacitor CRESPMOS transistor M1PMOS transistor M2A load capacitor C1xA load capacitor C2xNMOS transistor M3NMOS transistor M4Single-pole double-throw switch S1Single-pole double-throw switch S2Switch S3And switch S4；
The single-pole double-throw switch S1Moving terminal and capacitor CRESIs connected with a first fixed end of the PMOS tube M respectively1Source electrode and PMOS transistor M2The second fixed end of the floating bias dynamic amplifier is used as an input end VDDL of the floating bias dynamic amplifier; the single-pole double-throw switch S2Moving terminal and capacitor CRESIs connected with the other end of the NMOS tube M, the first fixed end of the NMOS tube M is grounded, and the second fixed end of the NMOS tube M is respectively connected with the NMOS tube M3Source electrode and NMOS transistor M4Is connected to the source of (a); the PMOS tube M1Grid and NMOS tube M3The drain electrodes of the NMOS transistors are respectively connected with the NMOS transistors M3Drain electrode of (1), switch S3And a load capacitor C connected to ground1xConnecting; the NMOS tube M4Grid and PMOS transistor M2The drain electrodes of the two transistors are respectively connected with a PMOS tube M2Drain electrode of (1), and load capacitance C connected to ground2xAnd switch S4Is connected with one end of the connecting rod; the switch S3And the other end of (1) and a switch S4The other end of the connecting rod is connected.
5. The floating bias dynamic amplification circuit based on the stable bandwidth circuit as claimed in claim 2, wherein the PMOS transistor M is a PMOS transistor7Is a power tube.
6. The floating bias dynamic amplification circuit based on the stable bandwidth circuit as claimed in claim 4, wherein the PMOS transistor M is a PMOS transistor5Size of and PMOS transistor M1And PMOS transistor M2Scaling the size of (a); the NMOS tube M6Size of and PMOS transistor M1And PMOS transistor M2Are scaled proportionally.
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| CN202110201431.4A CN113014209B (en) | 2021-02-23 | 2021-02-23 | Floating bias dynamic amplifying circuit based on stable bandwidth circuit |
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| CN203491978U (en) * | 2013-06-27 | 2014-03-19 | 快捷半导体(苏州)有限公司 | Output stage circuit, class AB amplifier and electronic device |
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| CN104253589A (en) * | 2013-06-27 | 2014-12-31 | 快捷半导体(苏州)有限公司 | Static current balance method, output stage circuit, AB type amplifier and electronic equipment |
| US20170040996A1 (en) * | 2015-08-07 | 2017-02-09 | Huan Zhao | Single-pole-single-throw (spst) switch and its derivative single-pole-double-throw (spdt) and single-pole-multiple-throw (spmt) switches |
| CN109193079A (en) * | 2018-11-19 | 2019-01-11 | 重庆西南集成电路设计有限责任公司 | Impedance converts single-pole double throw microwave switch |
| CN111290465A (en) * | 2019-01-28 | 2020-06-16 | 展讯通信（上海）有限公司 | Low-dropout voltage stabilizer |
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2021
- 2021-02-23 CN CN202110201431.4A patent/CN113014209B/en active Active
Patent Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2000114891A (en) * | 1998-10-01 | 2000-04-21 | Sony Corp | Current source circuit |
| WO2010135710A1 (en) * | 2009-05-21 | 2010-11-25 | Qualcomm Incorporated | Buffer with active output impedance matching |
| CN203491978U (en) * | 2013-06-27 | 2014-03-19 | 快捷半导体(苏州)有限公司 | Output stage circuit, class AB amplifier and electronic device |
| CN104253589A (en) * | 2013-06-27 | 2014-12-31 | 快捷半导体(苏州)有限公司 | Static current balance method, output stage circuit, AB type amplifier and electronic equipment |
| CN104076860A (en) * | 2014-07-18 | 2014-10-01 | 周国文 | Band-gap reference source for digital-analog hybrid circuit |
| US20170040996A1 (en) * | 2015-08-07 | 2017-02-09 | Huan Zhao | Single-pole-single-throw (spst) switch and its derivative single-pole-double-throw (spdt) and single-pole-multiple-throw (spmt) switches |
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