CN113010465A - FPGA-based process layer data sampling board card and electronic device - Google Patents
FPGA-based process layer data sampling board card and electronic device Download PDFInfo
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- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
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- G06F—ELECTRIC DIGITAL DATA PROCESSING
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Abstract
The application provides a process layer data sampling board card and an electronic device based on an FPGA. The data sampling board card includes: the FPGA core board is provided with a PCIe bus interface and is used for reading, analyzing and extracting SV messages and realizing an alternating current sampling algorithm, and the FPGA core board transmits the acquired data and the calculated data to a CPU (central processing unit) of the industrial personal computer through the PCIe bus interface; the PHY chip is electrically connected with the FPGA core board; the electrical port is electrically connected with the PHY chip; and the optical port is electrically connected with the PHY chip. According to the scheme, the optical fiber communication technology, the FPGA and the PCIe computer interface technology are combined, the SV data frames are read, analyzed and extracted in real time by using the high-speed signal processing capacity of the FPGA, so that the process layer data sampling plate clamp has a high-efficiency data processing function, and the functions of sampling, caching, calculating and transmitting the IEC61850 process layer SV format data frames are realized.
Description
Technical Field
The application relates to the field of intelligent substations, in particular to a process layer data sampling board card and an electronic device based on an FPGA.
Background
Sv (sample value) is a abbreviation of digital sampling data transmitted by the process layer of the intelligent substation. The SV Ethernet data based on Ethernet IEEE802.3, the transmission sampling frequency is equal to or more than 4000Hz/s, and the method is characterized in that: the data volume is particularly large and periodic, strict requirements are required on the real-time performance, stability and reliability of the data, and a receiver is required to have strong data processing capacity.
The industrial personal computer based on the Linux operating system is widely used in the field of power control due to the characteristics of rich interface resources, strong calculation control capability, simple design and development process and the like. However, since Linux belongs to a time-sharing operating system and cannot respond to 4000Hz/s sampling events in time, an industrial personal computer based on the Linux operating system cannot directly sample and calculate electric quantity data of an intelligent substation.
With the popularization of intelligent substations, including booster stations of a plurality of power plants, more and more intelligent substations start to adopt an IEC61850 communication mode, data acquisition adopts SV message digital transmission, and the traditional hard-wired voltage transformers and current transformers are omitted.
Disclosure of Invention
The main aim of this application provides a process layer data sampling integrated circuit board and electron device based on FPGA to solve the problem that the industrial computer of intelligent substation is difficult to realize IEC61850 communication function among the prior art.
In order to achieve the above object, according to an aspect of the present application, there is provided a process layer data sampling board based on an FPGA, including: the FPGA core board is provided with a PCIe bus interface and is used for reading, analyzing and extracting SV messages and realizing an alternating current sampling algorithm, and the FPGA core board transmits the acquired data and the calculated data to a CPU (central processing unit) of the industrial personal computer through the PCIe bus interface; the PHY chip is electrically connected with the FPGA core board; an electrical port electrically connected with the PHY chip; and the optical port is electrically connected with the PHY chip.
Further, the data sampling board card further comprises: and the memory is electrically connected with the FPGA core board and is used for caching SV sampling data.
Furthermore, the memory is SDRAM, the FPGA core board still includes MAC data interface and SDRAM interface, the FPGA core board pass through MAC data interface with the PHY chip is connected, the FPGA core board pass through the SDRAM interface with the SDRAM is connected.
Furthermore, in the FPGA core board, after the SV message is subjected to data extraction, the AC sampling algorithm is adopted for calculation, and the AC sampling algorithm comprises fast Fourier transform and a fast frequency algorithm.
Further, the electric port is an RJ45 interface.
Furthermore, the SV packet is transmitted over the network using the OSI model, where the application layer defines a protocol data unit, and after being coded by the presentation layer, the protocol data unit is directly mapped to the data link layer and the physical layer.
According to another aspect of the application, an electronic device is provided, which comprises any one of the data sampling board cards.
According to the technical scheme, the FPGA core board transmits collected data and calculated data to a CPU of an industrial personal computer through a PCIe bus interface, message data transmitted from an electric port and an optical port are transmitted to the FPGA core board through a PHY chip, reading, analysis and data extraction of SV messages are realized by the FPGA core board, and the collected data and the calculated data are transmitted to the CPU of the industrial personal computer through the PCIe bus interface by the FPGA core board. By utilizing the board card, the industrial personal computer can very easily realize the IEC61850 protocol. The research and development speed of the intelligent substation based on the IEC61850 protocol measurement and control product is greatly shortened.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this application, illustrate embodiments of the application and, together with the description, serve to explain the application and are not intended to limit the application. In the drawings:
FIG. 1 shows an FPGA-based process layer data sampling board card schematic according to an embodiment of the present application;
FIG. 2 shows a functional logic diagram of an FPGA according to an embodiment of the present application.
Detailed Description
It should be noted that the following detailed description is exemplary and is intended to provide further explanation of the disclosure. Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs.
It is noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of example embodiments according to the present application. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, and it should be understood that when the terms "comprises" and/or "comprising" are used in this specification, they specify the presence of stated features, steps, operations, devices, components, and/or combinations thereof, unless the context clearly indicates otherwise.
It will be understood that when an element such as a layer, film, region, or substrate is referred to as being "on" another element, it can be directly on the other element or intervening elements may also be present. Also, in the specification and claims, when an element is described as being "connected" to another element, the element may be "directly connected" to the other element or "connected" to the other element through a third element.
Just as the introduction of background art, the industrial computer of intelligent substation among the prior art is difficult to realize IEC61850 communication function, for the problem of solving as above industrial computer of intelligent substation is difficult to realize IEC61850 communication function, the embodiment of this application provides a process layer data sampling integrated circuit board and electron device based on FPGA.
A typical embodiment of the present application provides a process layer data sampling board based on an FPGA, as shown in fig. 1, including:
the FPGA core board is provided with a PCIe bus interface and is used for reading, analyzing and extracting SV messages and realizing an alternating current sampling algorithm, and the FPGA core board transmits the acquired data and the calculated data to a CPU (central processing unit) of the industrial personal computer through the PCIe bus interface;
the PHY chip is electrically connected with the FPGA core board;
an electrical port electrically connected to the PHY chip, and fig. 1 includes two giga electrical ports;
and an optical port electrically connected to the PHY chip, and fig. 1 includes two gigabit optical ports.
Specifically, the electrical port and the optical port are used for receiving SV messages, the PHY chip receives data transmitted from the electrical port and the optical port, processes the data transmitted from the electrical port and the optical port, and transmits the processed data to the FPGA core board, and the FPGA core board reads, analyzes, and extracts the data.
Specifically, the SV packet parsing includes processing the SV packet by a frame header and a frame tail, and the data extraction of the SV packet refers to extracting a key part of the SV packet.
Specifically, the data sampling board card in the scheme provides drive for Linux version and Windows version, and the industrial personal computer can very easily realize IEC61850 protocol by using the board card. The research and development speed of the intelligent substation based on the IEC61850 protocol measurement and control product is greatly shortened.
Specifically, the PCIe bus time sequence is realized by using the FPGA, and the characteristics of high bandwidth of the PCIe bus are utilized to transmit the cached data and the calculated data to the CPU of the industrial personal computer so as to complete further measurement and control operation.
In the scheme, the FPGA core board transmits acquired data and calculated data to a CPU of an industrial personal computer through a PCIe bus interface, message data transmitted from an electric port and an optical port are transmitted to the FPGA core board through a PHY chip, reading, analyzing and data extracting of SV messages are realized by the FPGA core board, and the acquired data and the calculated data are transmitted to the CPU of the industrial personal computer through the PCIe bus interface by the FPGA core board, namely the scheme combines an optical fiber communication technology and FPGA and PCIe computer interface technology, real-time reading, analyzing and data extracting of SV data frames are realized by utilizing the high-speed signal processing capacity of the FPGA, so that the process layer data sampling board clamp has a high-efficiency data processing function, and the functions of sampling, caching, calculating and transmitting SV format data frames of an IEC 50 process layer are realized. By utilizing the board card, the industrial personal computer can very easily realize the IEC61850 protocol. The research and development speed of the intelligent substation based on the IEC61850 protocol measurement and control product is greatly shortened.
In an embodiment of the present application, the data sampling board card further includes: and the memory is electrically connected with the FPGA core board and is used for caching SV sampling data. The SV sample data includes acquired data and calculated data.
In an embodiment of the present application, as shown in fig. 1, the memory is an SDRAM, the FPGA core board further includes a MAC data interface and an SDRAM interface, the FPGA core board is connected to the PHY chip through the MAC data interface, and the FPGA core board is connected to the SDRAM through the SDRAM interface. And transmitting SV messages from the MAC data interface.
In an embodiment of the present application, as shown in fig. 2, in the FPGA core board, after data extraction is performed on the SV packet, the ac sampling algorithm is used for calculation, and the ac sampling algorithm includes fast fourier transform and fast frequency algorithm. SV messages are transmitted from the MAC data interface, subjected to SV frame structure analysis by the FPGA core board, and then subjected to data extraction (namely data extraction), and the extracted data are stored in SDRAM. In the FPGA core board, after the SV message is extracted, the AC sampling algorithm is adopted for calculation, the calculated data is stored in SDRAM, and a CPU of the industrial personal computer acquires the data from the SDRAM through the FPGA core board through a PCIe bus interface so as to realize IEC61850 protocol.
Specifically, the calculation by using the alternating current sampling algorithm includes: directly calculating effective values of voltage, current and power; frequency, power factor, and higher harmonic values.
In an embodiment of the present application, as shown in fig. 1, the electrical port is an RJ45 interface.
In an embodiment of the present application, an OSI model is used for SV packet transmission on a network, and an application layer in the OSI model defines a protocol data unit, and after encoding by a presentation layer, the protocol data unit is directly mapped to a data link layer and a physical layer without using a TCP/IP protocol. The transport, session and network layers are null.
According to another exemplary embodiment of the present application, an electronic device is provided, which includes any one of the data sampling boards described above. The data sampling board card in the electronic device is combined with an optical fiber communication technology, an FPGA (field programmable gate array) and a PCIe (peripheral component interface express) computer interface technology, and real-time reading, analysis and data extraction of SV (space velocity) data frames are realized by utilizing the high-speed signal processing capacity of the FPGA, so that the process layer data sampling board card has a high-efficiency data processing function, and the functions of sampling, caching, calculating and transmitting the IEC61850 process layer SV format data frames are realized. By utilizing the board card, the industrial personal computer can very easily realize the IEC61850 protocol. The research and development speed of the intelligent substation based on the IEC61850 protocol measurement and control product is greatly shortened.
From the above description, it can be seen that the above-described embodiments of the present application achieve the following technical effects:
1) the utility model provides a process layer data sampling integrated circuit board based on FPGA, FPGA core plate passes through PCIe bus interface and gives the CPU of industrial computer with the data transmission who gathers and calculate, the message data that comes in from electric mouth and optical port, transmit to FPGA core plate through the PHY chip, FPGA core plate realizes reading, analysis and the data extraction to the SV message, and FPGA core plate will pass through PCIe bus interface with the data transmission who gathers and calculate to the CPU of industrial computer, this scheme combines fiber communication technique, FPGA and PCIe computer interface technique, utilize FPGA's high-speed signal processing ability to realize reading in real time of SV data frame, analysis and data extraction, make process layer data sampling integrated circuit board fixture have high-efficient data processing function, realize IEC61850 process layer SV form data frame's sampling, the buffer memory, calculation and transmission function. By utilizing the board card, the industrial personal computer can very easily realize the IEC61850 protocol. The research and development speed of the intelligent substation based on the IEC61850 protocol measurement and control product is greatly shortened.
2) The data sampling board card in the electronic device combines an optical fiber communication technology, an FPGA (field programmable gate array) and a PCIe (peripheral component interface express) computer interface technology, and realizes real-time reading, analysis and data extraction of SV (space velocity) data frames by utilizing the high-speed signal processing capacity of the FPGA, so that the process layer data sampling board card has a high-efficiency data processing function, and the functions of sampling, caching, calculating and transmitting the SV format data frames of the IEC61850 process layer are realized. By utilizing the board card, the industrial personal computer can very easily realize the IEC61850 protocol. The research and development speed of the intelligent substation based on the IEC61850 protocol measurement and control product is greatly shortened.
The above description is only a preferred embodiment of the present application and is not intended to limit the present application, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present application shall be included in the protection scope of the present application.
Claims (7)
1. The utility model provides a process layer data sampling integrated circuit board based on FPGA which characterized in that includes:
the FPGA core board is provided with a PCIe bus interface and is used for reading, analyzing and extracting SV messages and realizing an alternating current sampling algorithm, and the FPGA core board transmits the acquired data and the calculated data to a CPU (central processing unit) of the industrial personal computer through the PCIe bus interface;
the PHY chip is electrically connected with the FPGA core board;
an electrical port electrically connected with the PHY chip;
and the optical port is electrically connected with the PHY chip.
2. The data sampling board of claim 1, further comprising:
and the memory is electrically connected with the FPGA core board and is used for caching SV sampling data.
3. The data sampling board of claim 2, wherein the memory is an SDRAM, the FPGA core board further comprises a MAC data interface and an SDRAM interface, the FPGA core board is connected to the PHY chip through the MAC data interface, and the FPGA core board is connected to the SDRAM through the SDRAM interface.
4. The data sampling board card of claim 1, wherein the ac sampling algorithm is used for calculation after data extraction is performed on the SV messages in the FPGA core board, and the ac sampling algorithm includes a fast fourier transform and a fast frequency algorithm.
5. A data sampling card according to any one of claims 1 to 4 wherein the electrical port is an RJ45 interface.
6. The data sampling board of any one of claims 1 to 4, wherein the SV message is transmitted over a network using the OSI model, and an application layer in the OSI model defines protocol data units, which are directly mapped to a data link layer and a physical layer after being coded by a presentation layer.
7. An electronic device comprising the data sampling card of any one of claims 1 to 6.
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| CN202110234956.8A CN113010465A (en) | 2021-03-03 | 2021-03-03 | FPGA-based process layer data sampling board card and electronic device |
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| CN202110234956.8A CN113010465A (en) | 2021-03-03 | 2021-03-03 | FPGA-based process layer data sampling board card and electronic device |
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