CN202841186U - Distribution type intelligent electrical network analyzing device based on PCIe buses - Google Patents

Distribution type intelligent electrical network analyzing device based on PCIe buses Download PDF

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Publication number
CN202841186U
CN202841186U CN 201220426705 CN201220426705U CN202841186U CN 202841186 U CN202841186 U CN 202841186U CN 201220426705 CN201220426705 CN 201220426705 CN 201220426705 U CN201220426705 U CN 201220426705U CN 202841186 U CN202841186 U CN 202841186U
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China
Prior art keywords
pcie
recorder main
collector
main frame
network
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Expired - Fee Related
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CN 201220426705
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Chinese (zh)
Inventor
贾滕飞
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BEIJING ZHONGKE TENGYUE TECHNOLOGY DEVELOPMENT Co Ltd
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BEIJING ZHONGKE TENGYUE TECHNOLOGY DEVELOPMENT Co Ltd
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Priority to CN 201220426705 priority Critical patent/CN202841186U/en
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Publication of CN202841186U publication Critical patent/CN202841186U/en
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Abstract

The utility model discloses a distribution type intelligent electrical network analyzing device based on the PCIe buses. The device is provided with a distribution type structure, and comprises collectors and a recorder main body. The recorder main body and the collectors are connected together by the PCIe buses. Each of the collectors comprises a FPGA and eight internet accesses provided with independent MACs. The collectors can be used to transmit the real time and the input network message to the recorder main body by the PCIe buses. The recorder main body is provided with 10 PCIe buses in an expanded manner by bridges, wherein 4 PCIe buses are respectively connected with the collectors. By using the device provided in the utility model, at most 32 independent internet accesses of the recorder system can be effectively realized, and the device can be used for the real-time, accurate recording of the network messages of the process layer and the spacing layer in the intelligent transformer station, therefore the independent operation of all recording internet accesses can be guaranteed, the bandwidths of the recording internet accesses cannot be occupied by each other, and no extra delay and delay jitter can be introduced to the recording of the network messages.

Description

A kind of based on the bus distributed intelligent grid network analysis of PCIe equipment
Technical field
The utility model relates to the switch technology field, particularly relates to a kind of based on the bus distributed intelligent grid network analysis of PCIe equipment.
Background technology
Protection in the Intelligent transformer station, measuring and controlling equipment and merge cells, intelligent terminal adopt the connected mode of " point-to-point " at present; for the exchanges data in can be the more reliable monitoring station; require the Intelligent transformer station network analyzer also to possess a plurality of network interfaces, thereby the Real Time Monitoring of " point-to-point " is carried out in realization to Intelligent transformer station process layer devices and bay device.Improve reliability and the authenticity of network recording instrument, for the initial data that provides complete is reviewed, analyzed to the accident in the Intelligent transformer station.
In present Intelligent transformer station; especially the above transformer station of 220KV; process layer generally adopts the network architecture of " directly adopting straight jumping "; this framework has been eliminated influencing each other of equipment room that protection equipment couples together to the dependence of switch and by switch, has guaranteed independence and the reliability of defencive function.Owing to the operation maintenance of Intelligent transformer station, the needs that accident is reviewed, the network analyzer in the Intelligent transformer station also requires to possess same reliability and independence, thereby guarantees the timely, comprehensive, accurate of accident analysis.Just be based on such demand, needing the network analyzer of the large interface capacity of development.At present, a lot of designs realize the expansion of interface quantity based on the switch scheme, but exchange chip can not be isolated interacting between each port fully, especially delay jitter and bandwidth conflict integrality and the real-time that all can have influence on recorded message of Ethernet message in switch.
The utility model content
The technical problem that (one) will solve
Problem to be solved in the utility model provides a kind of based on the bus distributed intelligent grid network analysis of PCIe equipment, to overcome defective of the prior art.
(2) technical scheme
For achieving the above object, it is a kind of based on the bus distributed intelligent grid network analysis of PCIe equipment that the utility model provides, described equipment adopts distributed frame, comprises collector and recorder main frame, links to each other by the PCIe bus between described recorder main frame and the collector;
Described collector comprises FPGA and has 8 network interfaces of independent MAC, described 8 network interfaces are used for the network message of record Intelligent transformer station process layer and bay device, described FPGA is used for the real-time time of 8 network interface incoming messages of hardware record, and described collector passes to described recorder main frame with the network message of described real-time time and input by the PCIe bus;
Described recorder main frame expands 10 PCIe buses by bridge, and wherein 4 PCIe buses connect respectively collector.
Further, 8 of described collector network interfaces comprise 4 Ethernet interfaces that carry and 4 network interfaces expanding by PCI.
Further, other 6 PCIe buses of described recorder main frame connect respectively network interface card or compressing card.
Further, described recorder main frame comprises hard disk, is used for storing the data that described collector transmits up by the PCIe bus.
Further, described recorder main frame comprise to the time module, described to the time module by the PCIe bus to described collector send to the time signal, make the time reference of 4 collectors consistent.
(3) beneficial effect
Compared with prior art, the technical solution of the utility model has the following advantages: the logging recorder system that can effectively realize maximum 32 independent network interfaces, real-time, the accurate recording that are used for the interior process layer of Intelligent transformer station and wall network message, can guarantee each record network interface independent operating, mutual occupied bandwidth can not guarantee can not introduce extra delay and delay jitter to the record of network message.
Description of drawings
Fig. 1 is a kind of structural representation based on the bus distributed intelligent grid network analysis of PCIe equipment of the utility model embodiment;
Fig. 2 is the structural representation based on the collector of the bus distributed intelligent grid network analysis of PCIe equipment of the utility model embodiment;
Fig. 3 is the structural representation based on the recorder main frame of the bus distributed intelligent grid network analysis of PCIe equipment of the utility model embodiment.
Embodiment
Structure based on the bus distributed intelligent grid network analysis of PCIe equipment of the present utility model as shown in Figure 1, described equipment adopts distributed frame, comprises collector and recorder main frame, links to each other by the PCIe bus between described recorder main frame and the collector;
Described collector comprises FPGA and has 8 network interfaces of independent MAC, described 8 network interfaces are used for the network message of record Intelligent transformer station process layer and bay device, described FPGA is used for the real-time time of 8 network interface incoming messages of hardware record, and described collector passes to described recorder main frame with the network message of described real-time time and input by the PCIe bus;
As shown in Figure 3, described recorder main frame expands 10 PCIe buses by bridge, and wherein 4 PCIe buses connect respectively collector.
The D525 atom CPU of the X86 series that the recorder host CPU adopts.
The recorder main frame expands 10 PCIe by bridge, and wherein 4 connections that are used for collector are several for expansion network interface card or compressing card in addition.
When the recorder main frame connects collector, the data communication device of 4 collectors can be crossed the PCIe bus and transmit up, after then compression is processed, be stored on the hard disk.
As shown in Figure 2, collector is responsible for the message real time record with each network interface, and by FPGA the record real-time time stamp of message is stamped.
8 network interfaces of described collector comprise 4 Ethernet interfaces that carry and 4 network interfaces expanding by PCI.
The model of collector C PU is PPC460, and PPC460 has consisted of 8 network interfaces of independent MAC by 4 Ethernet interfaces carrying and by 4 network interfaces of PCI expansion, is used for the network message of record Intelligent transformer station process layer and bay device.
PPC460 forms one group of data with the Ethernet message of hardware timestamping and input, passes to the recorder main frame by the PCIe bus.
Each collector can be with 8 100M Ethernet interfaces.
Namely each recorder main frame can be with at most 32 network interfaces.
Other 6 PCIe buses of described recorder main frame connect respectively network interface card or compressing card.
Described recorder main frame comprises hard disk, is used for storing the data that described collector transmits up by the PCIe bus.
Described recorder main frame comprise to the time module, described to the time module by the PCIe bus to described collector send to the time signal, make the time reference of 4 collectors consistent.
The data communication device of collector collection is crossed the PCIe bus, adopts the method for memory-mapped, with data-mapping to the recorder main frame.
The utility model can be realized the logging recorder system of maximum 32 independent network interfaces effectively, real-time, the accurate recording that are used for the interior process layer of Intelligent transformer station and wall network message, can guarantee each record network interface independent operating, mutual occupied bandwidth can not guarantee can not introduce extra delay and delay jitter to the record of network message.
The above only is preferred implementation of the present utility model; should be understood that; for those skilled in the art; under the prerequisite that does not break away from the utility model know-why; can also make some improvements and modifications, these improvements and modifications also should be considered as protection range of the present utility model.

Claims (5)

1. one kind based on the bus distributed intelligent grid network analysis of PCIe equipment, it is characterized in that, described equipment adopts distributed frame, comprises collector and recorder main frame, links to each other by the PCIe bus between described recorder main frame and the collector;
Described collector comprises FPGA and has 8 network interfaces of independent MAC, described 8 network interfaces are used for the network message of record Intelligent transformer station process layer and bay device, described FPGA is used for the real-time time of 8 network interface incoming messages of hardware record, and described collector passes to described recorder main frame with the network message of described real-time time and input by the PCIe bus;
Described recorder main frame expands 10 PCIe buses by bridge, and wherein 4 PCIe buses connect respectively collector.
2. according to claim 1ly it is characterized in that based on the bus distributed intelligent grid network analysis of PCIe equipment that 8 network interfaces of described collector comprise 4 Ethernet interfaces that carry and 4 network interfaces by the PCI expansion.
3. according to claim 1ly it is characterized in that based on the bus distributed intelligent grid network analysis of PCIe equipment other 6 PCIe buses of described recorder main frame connect respectively network interface card or compressing card.
4. according to claim 1ly it is characterized in that based on the bus distributed intelligent grid network analysis of PCIe equipment described recorder main frame comprises hard disk, be used for storing the data that described collector transmits up by the PCIe bus.
5. according to claim 1 based on the bus distributed intelligent grid network analysis of PCIe equipment, it is characterized in that, described recorder main frame comprise to the time module, described to the time module by the PCIe bus to described collector send to the time signal, make the time reference of 4 collectors consistent.
CN 201220426705 2012-08-27 2012-08-27 Distribution type intelligent electrical network analyzing device based on PCIe buses Expired - Fee Related CN202841186U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN 201220426705 CN202841186U (en) 2012-08-27 2012-08-27 Distribution type intelligent electrical network analyzing device based on PCIe buses

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN 201220426705 CN202841186U (en) 2012-08-27 2012-08-27 Distribution type intelligent electrical network analyzing device based on PCIe buses

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CN202841186U true CN202841186U (en) 2013-03-27

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106209691A (en) * 2016-07-18 2016-12-07 南京磐能电力科技股份有限公司 A kind of network port mirror method possessing independent mac source address

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106209691A (en) * 2016-07-18 2016-12-07 南京磐能电力科技股份有限公司 A kind of network port mirror method possessing independent mac source address
CN106209691B (en) * 2016-07-18 2019-05-17 南京磐能电力科技股份有限公司 A kind of network port mirror method having independent mac source address

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GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20130327

Termination date: 20140827

EXPY Termination of patent right or utility model