CN112994902A - Intelligent network card and FPGA (field programmable Gate array) firmware updating management method of intelligent network card - Google Patents

Intelligent network card and FPGA (field programmable Gate array) firmware updating management method of intelligent network card Download PDF

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Publication number
CN112994902A
CN112994902A CN202110261704.4A CN202110261704A CN112994902A CN 112994902 A CN112994902 A CN 112994902A CN 202110261704 A CN202110261704 A CN 202110261704A CN 112994902 A CN112994902 A CN 112994902A
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CN
China
Prior art keywords
multiplexer
firmware
fpga
flash memory
network card
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Pending
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CN202110261704.4A
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Chinese (zh)
Inventor
刘叶
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Inventec Pudong Technology Corp
Inventec Corp
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Inventec Pudong Technology Corp
Inventec Corp
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Priority to CN202110261704.4A priority Critical patent/CN112994902A/en
Publication of CN112994902A publication Critical patent/CN112994902A/en
Pending legal-status Critical Current

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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/02Details
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00Arrangements for software engineering
    • G06F8/60Software deployment
    • G06F8/65Updates
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L43/00Arrangements for monitoring or testing data switching networks
    • H04L43/14Arrangements for monitoring or testing data switching networks using software, i.e. software packages

Abstract

The invention provides an intelligent network card and an FPGA firmware updating management method of the intelligent network card. The FPGA firmware updating management method of the intelligent network card comprises the steps of starting an FPGA module, enabling the FPGA module to load existing firmware data from a flash memory through a multiplexer to perform firmware setting operation, sending a setting completion signal to a CPU module after the firmware setting operation is completed, sending a first switching signal to the multiplexer when the CPU module receives firmware updating information, so that the firmware updating information is sent to the flash memory through the multiplexer, and finally controlling the multiplexer to switch back to be in communication connection with the flash memory and the FPGA module by the CPU module so that the FPGA module can reload new firmware data.

Description

Intelligent network card and FPGA (field programmable Gate array) firmware updating management method of intelligent network card
Technical Field
The invention relates to an intelligent network card and an FPGA firmware updating management method of the intelligent network card, in particular to an intelligent network card and an FPGA firmware updating management method thereof, which update the firmware of an FPGA by matching a CPU module of the intelligent network card with a multiplexer.
Background
In the circuit architecture of the server, a Baseboard Management Controller (BMC) is usually used to assist other ICs in managing the FLASH ROM, for example, operations such as online update of firmware (firmware) are performed, however, since a general standard intelligent network card is usually only provided with two chips such as a CPU and an FPGA, the server motherboard is not provided with the BMC to manage the FLASH ROM.
The FPGA has the greatest characteristic that the function of the combinational logic can be edited according to the requirement of a user, so that the firmware of the FPGA is stored in the FLASH ROM, and is loaded into the FPGA for setting when the FPGA is started to operate.
As mentioned above, because the existing intelligent network card does not have a BMC to manage and control the FLASH ROM of the FPGA, when the firmware of the FPGA needs to be updated, the firmware stored in the FLASH ROM often needs to be updated through the FPGA, and the FPGA cannot operate effectively, or even stops operating.
Disclosure of Invention
In view of the fact that in the prior art, the existing intelligent network card is not provided with the BMC, when the FLASH ROM of the FPGA needs to update the firmware, the firmware of the FLASH ROM can be updated only through the FPGA, but the firmware of the FLASH ROM is updated through the FPGA, so that the FPGA cannot normally operate; accordingly, the present invention is directed to an intelligent network card and an FPGA firmware update management method for the intelligent network card, which can update firmware of a FLASH ROM under normal operation of an FPGA module through control of a CPU module and a multiplexer.
The present invention provides an intelligent network card for solving the problems of the prior art, wherein the intelligent network card is installed on a server host, and the intelligent network card comprises a flash memory, a multiplexer, an FPGA module and a CPU module.
The flash memory stores an existing firmware data. The multiplexer is electrically connected to the flash memory. The FPGA module is electrically connected to the multiplexer, the multiplexer is preset to be in communication connection with the flash memory and the FPGA module in a preset working mode, so that the FPGA module loads the existing firmware data from the flash memory through the multiplexer in the preset working mode, and sends out a setting completion signal after a firmware setting operation is completed according to the existing firmware data.
The CPU module is electrically connected with the server host, the FPGA module and the multiplexer, and is used for entering an updating working mode when receiving a setting completion signal sent by the FPGA module and firmware updating information sent by the server host, sending a first switching signal to the multiplexer when the working mode is updated, enabling the multiplexer to be switched into a communication connection flash memory and the CPU module, sending the firmware updating information to the flash memory through the multiplexer, sending a second switching signal to the multiplexer after the existing firmware data is updated into a new version of firmware data, and enabling the multiplexer to be switched back to the communication connection flash memory and the FPGA module.
Optionally, the CPU module further includes an SPI interface electrically connected to the multiplexer. Preferably, the CPU module further includes a CPU processing unit electrically connected to the SPI interface, and when receiving the firmware update message sent by the server host, the CPU processing unit sends the first switching signal to the multiplexer through the SPI interface, so that the multiplexer is switched to the SPI interface communicatively connecting the flash memory and the CPU module.
Optionally, the FPGA module further includes a QSPI interface, and the QSPI interface is electrically connected to the multiplexer. Preferably, the FPGA module further includes an FPGA processing unit electrically connected to the QSPI interface, and the FPGA processing unit loads the existing firmware data or the new firmware data from the flash memory through the QSPI interface and the multiplexer, and sends a setting completion signal to the CPU module after completing the firmware setting operation according to the existing firmware data or the new firmware data.
Based on the same inventive concept, the invention also provides an FPGA firmware update management method of the intelligent network card, which comprises the following steps: firstly, step (A) is to start up an FPGA module to load an existing firmware data from a flash memory through a multiplexer to perform a firmware setting operation, and to send a setting completion signal to a CPU module after the firmware setting operation is completed.
Then, step (B) is that the CPU module enters an updating working mode when receiving the setting completion signal sent by the FPGA module and firmware updating information sent by the server host, and sends a first switching signal to a multiplexer when the updating working mode is carried out, so that the multiplexer is switched to be in communication connection with the flash memory and the CPU module, and the firmware updating information is sent to the flash memory through the multiplexer.
Then, in step (C), after the existing firmware data is updated to a new firmware data, the CPU module sends a second switching signal to the multiplexer, so that the multiplexer is switched back to the communication connection of the flash memory and the FPGA module.
Optionally, after the step (C), the FPGA module further loads new firmware data from the flash memory through the multiplexer to perform a firmware resetting operation. Preferably, the FPGA module sends a reset completion signal to the CPU module after the firmware reset operation is completed.
As described above, the present invention uses the CPU module to receive the firmware update information transmitted by the server, and accordingly determines whether the existing firmware data of the FLASH ROM needs to be updated, and switches the path between the FPGA module and the FLASH ROM to the path between the CPU module and the FLASH ROM through the multiplexer when the existing firmware data of the FLASH ROM needs to be updated, and further updates the existing firmware data of the FLASH ROM to the new firmware data, so that the FPGA module can still operate normally without interference when the FLASH ROM performs firmware update.
Drawings
Fig. 1 is a system block diagram of an intelligent network card according to an embodiment of the present invention;
fig. 2 is a block diagram of a system in which an intelligent network card is updated through cooperation between a CPU module and a multiplexer according to an embodiment of the present invention; and
fig. 3 is a flowchart illustrating steps of a method for managing an update of an FPGA firmware of an intelligent network card according to an embodiment of the present invention.
100-intelligent network card;
1-a flash memory;
2-a multiplexer;
3-FPGA module;
31-an FPGA processing unit;
32-QSPI interface;
4-a CPU module;
41-CPU processing unit;
42-SPI interface;
200-a server host;
FW 1-existing firmware data;
FW 2-new version firmware data;
s1-setting completion signal;
s1 a-reset complete signal;
s2-firmware update information;
s3-first switching signal;
s3 a-second switching signal.
Detailed Description
Referring to fig. 1, fig. 1 is a system block diagram of an intelligent network card according to an embodiment of the present invention. As shown in fig. 1, an intelligent network card 100 includes a flash memory 1, a multiplexer 2, an FPGA module 3, and a CPU module 4. The smart card 100 is installed in a server host 200.
The flash memory 1 stores a conventional firmware data FW 1. The multiplexer 2 is electrically connected to the flash memory 1. The FPGA module 3 is electrically connected to the multiplexer 2, the multiplexer 2 is preset to communicatively connect the flash memory 1 and the FPGA module 3 in a preset operation mode, so that the FPGA module 3 loads the firmware data FW1 from the flash memory 1 through the multiplexer 2 in the preset operation mode, and sends a setting completion signal S1 after completing a firmware setting operation according to the firmware data FW 1. In addition, the FPGA module 3 further includes an FPGA processing unit 31 and a QSPI interface 32, wherein the FPGA processing unit 31 is electrically connected to the QSPI interface 32, and the QSPI interface 32 is electrically connected to the multiplexer 2, so that the FPGA processing unit 31 is electrically connected to the multiplexer 2 through the QSPI interface 32, and further loads the firmware data FW1 stored in the self-flash memory 1 through the multiplexer 2.
The CPU module 4 is electrically connected to the server host 200, the FPGA module 3, and the multiplexer 2, and configured to enter an update mode when receiving the setting completion signal S1 sent by the FPGA module 3 and a firmware update message S2 sent by the server host, and send a first switching signal S3 to the multiplexer 2 when the update mode is executed, so that the multiplexer 2 is switched to communicatively connect the flash memory 1 and the CPU module 4, and the firmware update message S2 is sent to the flash memory 1 through the multiplexer 2. In addition, the CPU module 4 further includes a CPU processing unit 41 and an SPI interface 42, the CPU processing unit 41 is electrically connected to the SPI interface 42, and the SPI interface 42 is electrically connected to the multiplexer 2, so that the CPU processing unit 41 is electrically connected to the multiplexer 2 through the SPI interface 42.
Referring to fig. 2, fig. 2 is a block diagram of a system for updating an intelligent network card through cooperation of a CPU module and a multiplexer according to an embodiment of the present invention. As shown in fig. 2, when the firmware data FW1 is updated to the new firmware data FW2, the CPU module 4 will send a second switching signal S3a to the multiplexer 2 to switch the multiplexer 2 back to communicatively connect the flash memory 1 and the FPGA module 3, so that the FPGA module 3 can retrieve the new firmware data FW2 from the flash memory 1 again, or load the new firmware data FW2 at the next boot.
Referring to fig. 1 to fig. 3, fig. 3 is a flowchart illustrating steps of a method for managing an update of an FPGA firmware of an intelligent network card according to an embodiment of the present invention. As shown in fig. 1 to fig. 3, taking the structure of the intelligent network card 100 as an example, the method for updating and managing the FPGA firmware of the intelligent network card of the present embodiment mainly includes the following steps: first, step S101 is to start the FPGA module 3, so that the FPGA module 3 loads the existing firmware data from the flash memory 1 through the multiplexer 2 to perform a firmware setting operation, and after the firmware setting operation is completed, step S102 is performed, and step S102 is performed, so that the FPGA module 3 sends a setting completion signal S1 to the CPU module 4.
After the FPGA module 3 in step S102 sends the setting completion signal S1 to the CPU module 4, step S103 is performed, and the CPU module 4 enters the update mode when receiving the setting completion signal S1 sent by the FPGA module 3 and the firmware update information S2 sent by the server host 200; when the CPU module 4 enters the refresh operation mode, step S104 is performed, and in step S104, the CPU module 4 sends a first switching signal S3 to the multiplexer 2, so that the multiplexer 2 switches to communicatively connect the flash memory 1 and the CPU module 4.
After the multiplexer 2 is switched to communicatively connect the flash memory 1 and the CPU module 4 in step S104, the CPU module 4 transmits firmware update information S2 to the flash memory 1 via the multiplexer 2 in step S105, so that the existing firmware data FW1 stored in the flash memory 1 is updated to the new firmware data FW 2.
After the CPU module 4 in step S105 transmits the firmware update information S2 to the flash memory 1 via the multiplexer 2, in step S106, after the existing firmware data FW1 of the flash memory 1 is updated to the new firmware data FW2, the CPU module 4 transmits the second switching signal S3a to the multiplexer 2, so that the multiplexer 2 switches back to communicatively connect the flash memory 1 and the FPGA module 3.
As mentioned above, after the CPU module 4 switches the multiplexer 2 back to the communication connection between the flash memory 1 and the FPGA module 3, since the flash memory 1 is updated with the new firmware data FW2, the FPGA module 3 can load the new firmware data FW2 from the flash memory 1 again to perform a firmware resetting operation, and the FPGA processing unit 31 of the FPGA module 3 sends a resetting completion signal S1a to the CPU module 4 after the firmware resetting operation is completed, and the CPU module 4 sends a restarting signal (not shown) to the server host 200 after receiving the resetting completion signal S1a, so that the server host 200 restarts the power supply of the smart network card 100.
In summary, compared with the existing intelligent network card, because the BMC is not provided, firmware update can only be performed on the FLASH ROM through the FPGA, and thus the FPGA cannot normally operate when the firmware is updated; when the existing firmware data of the FLASH ROM needs to be updated, the CPU module is used for controlling the multiplexer to switch the path between the FPGA module and the FLASH ROM into the path between the CPU module and the FLASH ROM, and then the existing firmware data of the FLASH ROM is updated into new firmware data, so that the FPGA module can still normally operate without interference when the FLASH ROM is used for updating the firmware.
The above detailed description of the preferred embodiments is intended to more clearly illustrate the features and spirit of the present invention, and is not intended to limit the scope of the present invention by the preferred embodiments disclosed above. On the contrary, it is intended to cover various modifications and equivalent arrangements included within the scope of the claims.

Claims (7)

1. The utility model provides an intelligent network card, installs in a server host computer, its characterized in that, intelligent network card includes:
a flash memory storing an existing firmware data;
a multiplexer electrically connected to the flash memory;
an FPGA module electrically connected to the multiplexer, the multiplexer being preset to communicatively connect the flash memory and the FPGA module in a preset operating mode, so that the FPGA module loads the existing firmware data from the flash memory through the multiplexer in the preset operating mode, and sends a setting completion signal after completing a firmware setting operation according to the existing firmware data; and
a CPU module, electrically connected to the server host, the FPGA module and the multiplexer, for receiving the firmware update information sent by the FPGA module and sent by the setting completion signal and the server host, entering an update working mode, and during the update working mode, sending a first switching signal to the multiplexer, making the multiplexer switch to communication connection the flash memory body and the CPU module, so as to pass the firmware update information through the multiplexer to the flash memory body, and after the existing firmware data is updated to a new version firmware data, sending a second switching signal to the multiplexer, making the multiplexer switch back to communication connection the flash memory body and the FPGA module.
2. The intelligent network card of claim 1, wherein the CPU module further comprises an SPI interface, the SPI interface being electrically connected to the multiplexer.
3. The intelligent network card according to claim 2, wherein the CPU module further comprises a CPU processing unit electrically connected to the SPI interface, and the CPU processing unit sends the first switching signal to the multiplexer through the SPI interface when receiving the firmware update information sent by the server host, so that the multiplexer is switched to the SPI interface for communicatively connecting the flash memory and the CPU module.
4. The intelligent network card according to claim 1, wherein the FPGA module further comprises a QSPI interface, and the QSPI interface is electrically connected to the multiplexer.
5. The intelligent network card according to claim 4, wherein the FPGA module further comprises an FPGA processing unit, the FPGA processing unit is electrically connected to the QSPI interface, and the FPGA processing unit loads the existing firmware data or the new firmware data from the flash memory through the QSPI interface and the multiplexer, and sends the setting completion signal to the CPU module after the firmware setting operation is completed according to the existing firmware data or the new firmware data.
6. An FPGA firmware updating management method of an intelligent network card is characterized by comprising the following steps:
(A) starting an FPGA module to load an existing firmware data from a flash memory through a multiplexer to perform a firmware setting operation, and sending a setting completion signal to a CPU module after the firmware setting operation is completed;
(B) the CPU module enters an updating working mode when receiving the setting completion signal sent by the FPGA module and firmware updating information sent by the server host, and sends a first switching signal to the multiplexer when the updating working mode is finished, so that the multiplexer is switched to be in communication connection with the flash memory and the CPU module, and the firmware updating information is sent to the flash memory through the multiplexer; and
(C) after the existing firmware data is updated to a new firmware data, the CPU module sends a second switching signal to the multiplexer, so that the multiplexer is switched back to be in communication connection with the flash memory and the FPGA module.
7. The method as claimed in claim 6, wherein after step (C), the FPGA module further performs a firmware resetting operation by loading the new firmware data from the flash memory through the multiplexer.
The FPGA firmware update management method for an intelligent network card of claim 7 wherein said FPGA module sends a reset complete signal to said CPU module after said firmware reset operation is completed.
CN202110261704.4A 2021-03-10 2021-03-10 Intelligent network card and FPGA (field programmable Gate array) firmware updating management method of intelligent network card Pending CN112994902A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113608935A (en) * 2021-06-20 2021-11-05 山东云海国创云计算装备产业创新中心有限公司 Method, system, equipment and medium for testing network card

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CN107832078A (en) * 2017-09-15 2018-03-23 西南电子技术研究所(中国电子科技集团公司第十研究所) FPGA program online updating circuits based on DSP
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Publication number Priority date Publication date Assignee Title
CN1992610A (en) * 2005-12-31 2007-07-04 中国科学院计算技术研究所 Intelligent Ethernet card with function of hardware acceleration
US9648137B1 (en) * 2016-09-23 2017-05-09 International Business Machines Corporation Upgrading a descriptor engine for a network interface card
CN106843983A (en) * 2017-02-09 2017-06-13 深圳市风云实业有限公司 The system and method for remote upgrading field programmable gate array
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113608935A (en) * 2021-06-20 2021-11-05 山东云海国创云计算装备产业创新中心有限公司 Method, system, equipment and medium for testing network card

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