CN111107061A - Intelligent network card and communication method thereof - Google Patents

Intelligent network card and communication method thereof Download PDF

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Publication number
CN111107061A
CN111107061A CN201911208734.8A CN201911208734A CN111107061A CN 111107061 A CN111107061 A CN 111107061A CN 201911208734 A CN201911208734 A CN 201911208734A CN 111107061 A CN111107061 A CN 111107061A
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China
Prior art keywords
data
network card
intelligent network
communication method
cpu
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Pending
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CN201911208734.8A
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Chinese (zh)
Inventor
徐亚明
刘伟
仝培霖
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Inspur Beijing Electronic Information Industry Co Ltd
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Inspur Beijing Electronic Information Industry Co Ltd
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Priority to CN201911208734.8A priority Critical patent/CN111107061A/en
Publication of CN111107061A publication Critical patent/CN111107061A/en
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L63/00Network architectures or network communication protocols for network security
    • H04L63/10Network architectures or network communication protocols for network security for controlling access to devices or network resources
    • H04L63/101Access control lists [ACL]
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00Arrangements for software engineering
    • G06F8/60Software deployment
    • G06F8/65Updates
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L43/00Arrangements for monitoring or testing data switching networks
    • H04L43/12Network monitoring probes
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L43/00Arrangements for monitoring or testing data switching networks
    • H04L43/50Testing arrangements
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L67/00Network arrangements or protocols for supporting network services or applications
    • H04L67/01Protocols
    • H04L67/10Protocols in which an application is distributed across nodes in the network
    • H04L67/1001Protocols in which an application is distributed across nodes in the network for accessing one among a plurality of replicated servers

Abstract

The application provides an intelligent network card, including CPU and FPGA, include: the intelligent network card comprises two data optical ports, each data optical port is connected with a data separation module, and the data separation module is connected with an IP core in the FPGA; the CPU is directly connected with the FPGA through an internal bus; the CPU is simultaneously provided with an embedded linux system and a freeRTOS system. By using the chip with the heterogeneous multi-core architecture, the intelligent network card achieves the optimal balance of functions, power consumption, flexibility and expandability. The application also provides a communication method of the intelligent network card, and the communication method has the beneficial effects.

Description

Intelligent network card and communication method thereof
Technical Field
The present application relates to the field of communication devices, and in particular, to an intelligent network card and a communication method thereof.
Background
The current commonly used intelligent network card scheme comprises a multi-CPU chip, an FPGA + soft core and the like. If a plurality of CPU chips are adopted, the power consumption of the network card is overlarge, the performance is limited by the current chip, and the expansion is not facilitated. And the FPGA and the soft core are adopted, so that the complex business logic control cannot be performed. Therefore, how to improve the applicability of the intelligent network card is a technical problem that needs to be solved urgently by those skilled in the art.
Disclosure of Invention
The application aims to provide an intelligent network card and a communication method thereof, which can improve the application performance of the intelligent network card.
In order to solve the technical problem, the application provides an intelligent network card, which comprises a CPU and an FPGA, and the specific technical scheme is as follows:
the intelligent network card comprises two data optical ports, each data optical port is connected with a data separation module, and the data separation module is connected with an IP core in the FPGA;
the CPU is directly connected with the FPGA through an internal bus;
the CPU is simultaneously provided with an embedded linux system and a freeRTOS system.
Wherein the CPU comprises Cortex-A53 and Cortex-R5, the embedded linux system runs on the Cortex-A53, and the freeRTOS system runs on the Cortex-R5.
Wherein, the IP core is an mccdma.
Wherein the internal bus is an AXI bus.
The application also provides a communication method of the intelligent network card, based on the intelligent network card, comprising the following steps:
receiving a data message through a data optical interface;
dividing the data message into control plane flow and data plane flow by using a data separation module;
and sending the control plane flow to an embedded linux system so that the embedded linux system identifies an IP core as a network card for communication.
Wherein, still include:
acquiring BMC state information through an IIC interface by using a freeRTOS system;
and uploading the BMC state information to the embedded linux system.
Wherein, still include:
and filtering invalid network data in the data plane flow by using an ACL rule filtering module.
After the invalid network data in the data plane traffic is filtered by using the ACL rule filtering module, the method further includes:
accelerating the specific application according to the data label in the data plane flow.
Wherein, still include:
and acquiring the network flow information of the intelligent network card by using a freeRTOS system, and monitoring the network flow information.
Wherein, still include:
the embedded linux system acquires program version information from a remote data center through an IP core.
The present application also provides a computer-readable storage medium having stored thereon a computer program which, when being executed by a processor, carries out the steps of the method as set forth above.
The present application further provides a terminal, which includes a memory and a processor, where the memory stores a computer program, and the processor implements the steps of the method when calling the computer program in the memory.
The application provides an intelligent network card, including CPU and FPGA, include: the intelligent network card comprises two data optical ports, each data optical port is connected with a data separation module, and the data separation module is connected with an IP core in the FPGA; the CPU is directly connected with the FPGA through an internal bus; the CPU is simultaneously provided with an embedded linux system and a freeRTOS system.
According to the intelligent network card, the embedded linux system and the freeRTOS system are simultaneously carried on the CPU by using the chip of the heterogeneous multi-core architecture, so that the function, the power consumption, the flexibility and the expandability of the intelligent network card are optimally balanced. The application also provides a communication method of the intelligent network card, which has the beneficial effects, and the details are not repeated here.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly introduced below, it is obvious that the drawings in the following description are only embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts.
Fig. 1 is a schematic structural diagram of an intelligent network card provided in an embodiment of the present application;
fig. 2 is a flowchart of a communication method of an intelligent network card according to an embodiment of the present disclosure.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some embodiments of the present application, but not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
Referring to fig. 1, fig. 1 is a schematic structural diagram of an intelligent network card provided in an embodiment of the present application, where the intelligent network card includes:
the intelligent network card comprises two data optical ports, each data optical port is connected with a data separation module, and the data separation module is connected with an IP core in the FPGA; the CPU is directly connected with the FPGA by an internal bus; and the CPU is simultaneously provided with an embedded linux system and a freeRTOS system.
The application provides an intelligent network card based on a ZynqMP platform. ZYNQ is an extensible processing platform and can be seen as an A9 core processor with FPGA peripheral equipment. As shown in FIG. 1, the CPU will be described below as including Cortex-A53 and Cortex-R5. When the CPU includes Cortex-A53 and Cortex-R5, the embedded linux system may be run on Cortex-A53 and the freeRTOS system run on Cortex-R5. In fig. 1, the IP core in the FPGA is mccdma. Of course different IP cores for different CPUs. The internal bus adopted between the FPGA and the CPU is an AXI bus. The AXI bus is used because the protocols of Cortex-a53 and Cortex-R5, as exemplified in fig. 1, support the AXI bus. Therefore, it can be understood that the internal bus employed by the CPU and FGPA should be supported by the CPU.
The embedded liunux system runs on Cortex-A53 and is used for loading u-boot, kernel and file systems and running application programs. The real-time system freeRTOS runs on Cortex-R5 and is used for running a monitoring program after being powered on.
In the starting process of the intelligent network card, bit files can be downloaded from fsbl to FPGA from QSPI Flash (Quad SPI, four-wire SPI bus) to obtain information such as system configuration parameters. The FPGA is also called PL (programmable Logic) terminal.
It should be noted that the two data optical ports have completely identical functions, and the two optical ports operate simultaneously.
The data separation module divides the data message transmitted from the data optical port into control plane traffic and data plane traffic. Fig. 1 includes two data separation modules, which can improve the separation efficiency of data packets.
Of course, it can be understood that, on the basis of this embodiment, the intelligent network card may further include other data processing modules or units, for example, the application acceleration module may accelerate the network, and the like.
The method and the device have the advantages that two paths of data optical ports are designed to increase bandwidth processing capacity and load balance, and the network card is remotely subjected to rule issuing, state monitoring and program updating in an out-of-band mode. In software, the data plane data processing is realized by writing an fpga program, and the main functions of rule matching, host end application acceleration, data unloading and the like are realized. Meanwhile, an embedded linux system is used for control surface data processing, and functions of system upgrading, remote rule updating and the like are achieved; and a real-time operating system freeRTOS is used for monitoring the real-time state, so that the functions of real-time monitoring of the board card state, host-end BMC communication and the like are realized.
Referring to fig. 2, fig. 2 is a flowchart of a communication method of an intelligent network card according to an embodiment of the present disclosure.
The application also provides a communication method of the intelligent network card, based on the intelligent network card, comprising the following steps:
s101: receiving a data message through a data optical interface;
s102: dividing the data message into control plane flow and data plane flow by using a data separation module;
s103: and sending the control plane flow to an embedded linux system so that the embedded linux system identifies an IP core as a network card for communication.
When the intelligent network card is in communication, the data message is received through the data optical port, and then the data message is divided into control plane flow and data plane flow by the data separation module. Typically, the data separation module separates the data into control plane traffic and data plane traffic according to vlan-tag.
For the control surface traffic, the control surface traffic passes through the MCDMA module to the embedded linux system, and the embedded linux uses a driver to identify an IP core, i.e., the MCDMA module in fig. 1, as an MCDMA network card for bidirectional communication. The embedded linux system can acquire program version information from a remote data center through an IP core. Specifically, as shown in fig. 1, the embedded liunux application layer program acquires the latest matching rule and program version information from the data center at regular time through the MCDMA network card, uploads the status information, and issues the rule to the PL rule update module
And for the data plane traffic, the data plane traffic passes through an ACL rule filtering module, invalid network data which do not accord with the rule are filtered by using a blacklist, and the rest data are uploaded to a host server.
In a preferred embodiment, after passing through the ACL rule filtering module and before uploading to the host server, a specific application may be accelerated according to a data tag in the data plane traffic. Specifically, the application acceleration module may be utilized to select to accelerate a specific application to the PCIE port according to the data tag,
the data message enters the FPGA through an optical port and is divided into two paths of data of a control plane and a data plane through a data separation module: the control plane is transferred to Cortex-A53 through the MCDMA module, and the embedded linux running on the A53 processes data; and the data of the service surface is filtered by the ACL accurate matching module and is transmitted to the host by the PCIE of the DMA module.
Preferably, the freeRTOS system can be used for collecting the network flow information of the intelligent network card and monitoring the network flow information, namely the freeRTOS system is used for acquiring the BMC state information through the IIC interface and uploading the BMC state information to the embedded linux system.
The realization of the state monitoring function of the intelligent network card comprises the following steps:
(1) the Freetos system acquires BMC state information through an IIC interface;
(2) acquiring flow and monitoring information through information state acquisition of a PL (personal information provider) end;
(3) and uploading the BMC state information to the embedded liunux system in an inter-core communication mode.
The embodiments are described in a progressive manner in the specification, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other. For the system provided by the embodiment, the description is relatively simple because the system corresponds to the method provided by the embodiment, and the relevant points can be referred to the method part for description.
The principles and embodiments of the present application are explained herein using specific examples, which are provided only to help understand the method and the core idea of the present application. It should be noted that, for those skilled in the art, it is possible to make several improvements and modifications to the present application without departing from the principle of the present application, and such improvements and modifications also fall within the scope of the claims of the present application.
It is further noted that, in the present specification, relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.

Claims (10)

1. The utility model provides an intelligent network card, includes CPU and FPGA, its characterized in that includes:
the intelligent network card comprises two data optical ports, each data optical port is connected with a data separation module, and the data separation module is connected with an IP core in the FPGA;
the CPU is directly connected with the FPGA through an internal bus;
the CPU is simultaneously provided with an embedded linux system and a freeRTOS system.
2. The smart network card of claim 1 wherein the CPU includes Cortex-a53 and Cortex-R5, the embedded linux system runs on the Cortex-a53, and the freeRTOS system runs on the Cortex-R5.
3. The intelligent network card of claim 1, wherein the IP core is a mccdma.
4. The intelligent network card of claim 2, wherein the internal bus is an AXI bus.
5. A communication method of an intelligent network card, based on any one of claims 1 to 4, characterized by comprising:
receiving a data message through a data optical interface;
dividing the data message into control plane flow and data plane flow by using a data separation module;
and sending the control plane flow to an embedded linux system so that the embedded linux system identifies an IP core as a network card for communication.
6. The communication method according to claim 5, further comprising:
acquiring BMC state information through an IIC interface by using a freeRTOS system;
and uploading the BMC state information to the embedded linux system.
7. The communication method according to claim 5, further comprising:
and filtering invalid network data in the data plane flow by using an ACL rule filtering module.
8. The communication method according to claim 7, wherein after filtering invalid network data in the data plane traffic by using the ACL rule filtering module, the method further comprises:
accelerating the specific application according to the data label in the data plane flow.
9. The communication method according to claim 5, further comprising:
and acquiring the network flow information of the intelligent network card by using a freeRTOS system, and monitoring the network flow information.
10. The communication method according to claim 5, further comprising:
the embedded linux system acquires program version information from a remote data center through an IP core.
CN201911208734.8A 2019-11-30 2019-11-30 Intelligent network card and communication method thereof Pending CN111107061A (en)

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CN112269656A (en) * 2020-10-16 2021-01-26 山东云海国创云计算装备产业创新中心有限公司 Application configuration method, device and system based on multi-core processor
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CN113489594A (en) * 2021-06-04 2021-10-08 北京中航双兴科技有限公司 PCIE real-time network card based on FPGA module
CN115499312A (en) * 2022-11-11 2022-12-20 之江实验室 Integration configuration method based on FPGA (field programmable Gate array) back-end P4 multi-mode intelligent network card

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CN113489594A (en) * 2021-06-04 2021-10-08 北京中航双兴科技有限公司 PCIE real-time network card based on FPGA module
CN113489594B (en) * 2021-06-04 2023-12-19 北京中航双兴科技有限公司 PCIE real-time network card based on FPGA module
CN115499312A (en) * 2022-11-11 2022-12-20 之江实验室 Integration configuration method based on FPGA (field programmable Gate array) back-end P4 multi-mode intelligent network card

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