CN112991941B - ePANEL array substrate with personalized size and processing method - Google Patents
ePANEL array substrate with personalized size and processing method Download PDFInfo
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- CN112991941B CN112991941B CN202110140284.4A CN202110140284A CN112991941B CN 112991941 B CN112991941 B CN 112991941B CN 202110140284 A CN202110140284 A CN 202110140284A CN 112991941 B CN112991941 B CN 112991941B
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
- G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
- G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
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Abstract
The invention discloses an ePANel array substrate with personalized size and a processing method, and relates to the technical field of display. The Array substrate comprises a ground wire, a Gate On Array (GOA) circuit, a thin film transistor and a display circuit, wherein each GOA circuit corresponds to a first scanning line, a second scanning line and a first data line; the first scanning line is used for inputting scanning signals output by the GOA circuit to the display circuit, and the second scanning line is arranged corresponding to the ground wires on two sides of the array substrate. The array substrate provided by the invention is an array substrate with a universal size, and can support a user to cut based on a self-defined size parameter. After cutting, the circuit of the array substrate is modified based on the second scanning line, and the reliability of the cut array substrate is improved. The array substrate provided by the invention can support single-chip production or batch production, thereby meeting the requirements of users on the self-defined size.
Description
Technical Field
The invention relates to the technical field of display, in particular to an array substrate with an ePANel personalized size and a processing method.
Background
At present, the sizes of LCD (Liquid Crystal Display), OLED (Organic Light Emitting Display) and mini-LED Display are completely determined by large panel manufacturers, the sizes of the produced array substrates are limited, and the choices of users are limited. With the increase of the demand of personalized design, the size demand of the array substrate is more and more diversified, and users want to obtain the customized size. Because the cost of the mask is extremely high, the increase of the number of the masks obviously cannot meet the increase of the size requirement, and therefore, how to meet the user-defined size requirement of the array substrate by a user is a technical problem to be solved urgently.
The above is only for the purpose of assisting understanding of the technical solution of the present invention, and does not represent an admission that the above is the prior art.
Disclosure of Invention
The invention mainly aims to provide an array substrate with an ePhel ePANEL personalized size and a processing method thereof, and aims to solve the technical problems that the size of the array substrate is limited and a user cannot customize the size in the prior art.
In order to achieve the above object, the present invention provides an array substrate with an ePanel personalized size, where the array substrate includes a ground line, a GOA circuit, a thin film transistor, and a display circuit, and each GOA circuit corresponds to a first scan line, a second scan line, and a first data line; wherein the content of the first and second substances,
the output end of the GOA circuit is connected with a first scanning line, the grid electrode of the thin film transistor is connected with the first scanning line, the source electrode of the thin film transistor is connected with the display circuit, and the drain electrode of the thin film transistor is connected with a first data line;
the second scanning line is arranged in parallel with the first scanning line, two ends of the second scanning line symmetrically extend to the edge of the array substrate, and a first overlapping area is formed between the second scanning line and the ground line.
Optionally, the array substrate further includes a second data line, and the second data line corresponds to the thin film transistor;
the second data line is arranged in parallel with the first data line, the source electrode of the thin film transistor is connected with the second data line, the second data line and the first scanning line are provided with a second overlapping area, and the common line of the second data line and the thin film transistor is provided with a third overlapping area.
Optionally, the first scan line and the second scan line are made of the same material, and the first data line and the second data line are made of the same material.
Optionally, the first scan line, the second scan line, the first data line and the second data line have the same line width, and the line width is greater than a first preset line width.
Optionally, the line width of the metal line inside the GOA circuit is greater than a second preset line width, and the distance between the output end metal line of the GOA circuit and other adjacent metal lines is greater than a preset distance.
Optionally, the GOA circuit includes a first GOA circuit and a second GOA circuit;
the first GOA circuit and the second GOA circuit are symmetrically arranged on two sides of the display circuit and are connected through a first scanning line.
In order to achieve the above object, the present invention further provides an array substrate processing method, where the array substrate processing method is applied to the array substrate described above, and the array substrate processing method includes:
when a cutting instruction is received, determining a cutting line according to the cutting instruction, and cutting the array substrate based on the cutting line;
determining position information to be dotted on the cut array substrate according to the cutting line, and generating a dotting instruction according to the position information to be dotted;
and carrying out dotting operation on the cut array substrate according to the dotting instruction to obtain the processed array substrate.
Optionally, the position information to be dotted on the array substrate after cutting is determined according to the cutting line, and a dotting instruction is generated according to the position information to be dotted, including:
acquiring first position information of each GOA circuit on the cut array substrate, and determining an edge GOA circuit closest to a cutting line according to the first position information;
taking the intersection of the output end of the edge GOA circuit and a preset frame starting signal line as a first dot position;
taking the joint of the output end and the first scanning line as a second dotting position;
taking a first overlapping area of a second scanning line and a ground line corresponding to the edge GOA circuit as a third dotting position;
and generating position information to be dotted according to the first dotting position, the second dotting position and the third dotting position, and generating a dotting instruction according to the position information to be dotted.
Optionally, generating position information to be dotted according to the first dotting position, the second dotting position and the third dotting position, and generating a dotting instruction according to the position information to be dotted, including:
acquiring second position information of each thin film transistor on the cut array substrate, and determining an edge thin film transistor closest to the cutting line according to the second position information;
taking a second overlapping area of a second data line corresponding to the edge thin film transistor and a scanning line corresponding to the edge thin film transistor as a fourth dotting position;
taking a third overlapping area of the second data line and the common line corresponding to the edge thin film transistor as a fifth dotting position;
generating position information to be dotted according to the first dotting position, the second dotting position, the third dotting position, the fourth dotting position and the fifth dotting position, and generating a dotting instruction according to the position information to be dotted.
In order to achieve the above object, the present invention further provides a display module, which includes the array substrate with the personalized ePanel size as described above, or includes the array substrate manufactured according to the array substrate processing method described above.
In order to achieve the above object, the present invention further provides a display panel, which includes the display module described above.
To achieve the above object, the present invention further provides a display including the display panel as described above.
The array substrate provided by the invention comprises a ground wire, GOA circuits, a thin film transistor and a display circuit, wherein each GOA circuit corresponds to a first scanning line, a second scanning line and a first data line; the first scanning line is used for inputting scanning signals output by the GOA circuit to the display circuit, and the second scanning line is arranged corresponding to the ground wires on two sides of the array substrate. The array substrate provided by the invention is an array substrate with a universal size, and can support a user to cut based on a self-defined size parameter. After cutting, the circuit of the array substrate is modified based on the second scanning line, and the reliability of the cut array substrate is improved. The array substrate provided by the invention can support single-chip production or batch production, thereby meeting the requirements of users on the self-defined size.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the structures shown in the drawings without creative efforts.
Fig. 1 is a schematic structural diagram of an embodiment of an ePanel-based personalized array substrate of the present invention;
fig. 2 is a schematic structural diagram of an embodiment of an array substrate with an ePanel personalized size according to the present invention;
FIG. 3 is a schematic flow chart illustrating a method for processing an array substrate according to an embodiment of the invention;
fig. 4 is a schematic view illustrating the processing of the array substrate according to the present invention.
The reference numbers indicate:
| reference numerals | Name(s) | Reference numerals | Name (R) |
| 101 | |
106 | The |
| 102 | GOA |
107 | |
| 103 | |
108 | |
| 104 | |
109 | Common line |
| 105 | A |
110 | Preset frame start signal line |
The implementation, functional features and advantages of the objects of the present invention will be further explained with reference to the accompanying drawings.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It should be noted that all the directional indicators (such as up, down, left, right, front, and rear … …) in the embodiment of the present invention are only used to explain the relative position relationship between the components, the movement situation, etc. in a specific posture (as shown in the drawing), and if the specific posture is changed, the directional indicator is changed accordingly.
In addition, the descriptions related to "first", "second", etc. in the present invention are for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In addition, technical solutions between various embodiments may be combined with each other, but must be realized by a person skilled in the art, and when the technical solutions are contradictory or cannot be realized, such a combination should not be considered to exist, and is not within the protection scope of the present invention.
The invention provides an array substrate.
Referring to fig. 1, fig. 1 is a schematic structural diagram of an embodiment of an array substrate with an ePanel personalized size according to the invention.
In the embodiment of the present invention, the array substrate includes a ground line 101, a GOA circuit 102, a thin film transistor 103, and a display circuit 104, where each GOA circuit 102 corresponds to a first scan line 105, a second scan line 106, and a first data line 107; the output end of the GOA circuit 102 is connected to the first scan line 105, the gate of the thin film transistor 103 is connected to the first scan line 105, the source of the thin film transistor 103 is connected to the display circuit 102, and the drain of the thin film transistor 103 is connected to the first data line 107; the second scan line 106 is parallel to the first scan line 105, and two ends of the second scan line 106 symmetrically extend to the edge of the array substrate and have a first overlapping area with the ground line 101.
It is understood that the display circuit 104 may include an ITO electrode, which is charged and discharged by the thin film transistor 103 to adjust the transmitted light. Generally, the display circuit 104 is also called a pixel unit, and the pixel units are distributed in an array on the array substrate, and the specific data thereof can be set according to the requirement. For example, the pixel array includes 1024 rows and 1080 columns. When the array substrate is driven, the first scan line 105 is used for inputting a switch signal to the display circuit 104 of the corresponding row to control the on and off of the display circuit 104. The first data line 107 is used for inputting data signals to the display circuits 104 of corresponding columns to control the charging and discharging degrees of the display circuits 104. In the present embodiment, the display circuits 104 are provided on the array substrate in the same manner, and for convenience of description, the present embodiment will be described by taking a part of the display circuits 104 as an example.
It should be noted that, on the array substrate, the number of the second scan lines 106 may be the same as the number of the first scan lines 105, that is, one second scan line 106 is disposed between every two rows of the first scan lines 105. Of course, the number of the second scan lines 106 may be different from the number of the first scan lines 105. For example, the second scan lines 106 are disposed every two rows or 3 rows of the display circuit 104, and the specific number thereof may be set according to requirements, which is not limited in this embodiment.
Generally, the array substrate may be manufactured based on a plasma enhanced chemical vapor deposition and etching process, and thus, the scan lines, the data lines, and the ground lines belong to different layers on the array substrate. In this embodiment, when the two ends of the second scan line 106 symmetrically extend to the edge of the array substrate, the second scan line is not directly connected to the ground line 101. Specifically, the metal line edge of the second scan line 106 and the metal line edge of the ground line 101 have a first overlapping region in a projection perpendicular to the array substrate direction, so as to form a cross-layer structure.
Based on the array substrate provided by the embodiment, a user can cut the array substrate according to a user-defined size, and circuit adjustment is performed on the cut array substrate, so that the array substrate meeting the size requirement of the user is obtained.
For the reliability of improvement, the array substrate is provided with the ground wire all around. After the array substrate is cut, the original ground circuit is damaged. Taking transverse cutting as an example (namely, the number of columns of the array substrate is reserved, and the number of rows is reduced), laser dotting is performed on a first overlapping area of the second scanning line 106 and the ground line 101 near the cut, so that the second scanning line 106 is connected with the ground line 101, and a ground line loop is formed again, thereby improving the reliability of the array substrate after cutting.
The array substrate provided by the embodiment of the invention comprises a ground wire, a GOA circuit, a thin film transistor and a display circuit, wherein each GOA circuit corresponds to a first scanning line, a second scanning line and a first data line; the first scanning line is used for inputting scanning signals output by the GOA circuit to the display circuit, and the second scanning line is arranged corresponding to the ground wires on two sides of the array substrate. The array substrate provided by the embodiment is an array substrate with a general size, and can support a user to cut based on a self-defined size parameter. After cutting, the circuit of the array substrate is modified based on the second scanning line, and the reliability of the cut array substrate is improved. The array substrate provided by the embodiment can support single-chip production or batch production, so that the requirement of a user on a custom size is met.
Further, referring to fig. 2, fig. 2 is a schematic structural diagram of an embodiment of an array substrate with an ePanel personalized size according to the invention. In order to further improve the stability of the array substrate after cutting, the array substrate further includes a second data line 108, and the second data line 108 corresponds to the thin film transistor 103. The second data line 108 is disposed in parallel with the first data line 103, a source of the thin film transistor 103 is connected to the second data line 108, the second data line 108 and the first scan line 105 have a second overlapping area, and the second data line 108 and the common line 109 corresponding to the thin film transistor 103 have a third overlapping area.
In a specific implementation, a metal line is extended from a connection point of the source of the thin film transistor 103 and the display circuit 104 to serve as a second data line 108, and one end of the second data line 108 extends toward the first scan line 105 and the other end extends toward the common line 109. The second data line 108 and the first data line 107 belong to the same layer, so that the metal line edge of the second data line 108 has a second overlapping region and a third overlapping region in a projection perpendicular to the array substrate direction with the metal line edge of the first data line 107 and the metal line edge of the common line 109, respectively, thereby forming a cross-layer crossing structure. Wherein the common line 109 can be used to provide a reference voltage for the display circuit 104.
In order to further improve reliability, after the array substrate is cut, laser light is applied to the second overlap region and the third overlap region corresponding to each thin film transistor 103 in the vicinity of the cut, and both the source and the gate of the thin film transistor 103 are connected to the common line 109, thereby forming an electrostatic discharge circuit. When an external electrostatic high voltage enters the data line, the high voltage is discharged to the common line 109 through the electrostatic discharge circuit, so that reliability is improved.
In addition, for the array substrate cut transversely, since the row of the display circuits 104 closest to the cut is modified into the electrostatic discharge circuit, the row of the display circuits 104 loses its active function. Therefore, it is also necessary to cut off the connection between the first scanning line 105 corresponding to the row and the GOA circuit 102.
Furthermore, the first scan line 105 and the second scan line 106 are made of the same material, and the first data line 107 and the second data line 108 are made of the same material.
It is understood that, for convenience of processing, the second scan lines 106 and the second data lines 108 added in the present embodiment may be the same as the original first scan lines 105 and the original first data lines 105. For example, the material may be copper or aluminum. In addition, in order to obtain the newly added second scan lines 106 and second data lines 108 proposed in this embodiment, the corresponding lines of the newly added second scan lines 106 and second data lines 108 may be added to the original mask to form a new general mask; and then carrying out a photoetching coating process based on the new universal mask.
Further, the first scan line 105, the second scan line 106, the first data line 107 and the second data line 108 have the same line width, and the line width is greater than the first predetermined line width.
It should be noted that the circuit of the cut array substrate is usually modified based on a laser dotting process, and in order to avoid that the line is not easily broken due to an unexpected reason when laser dotting is performed, a metal line circuit needs to be added. The first preset line width refers to a standard line width of the metal line of the array substrate with various sizes, such as 50mil or 100mil, and the specific line width of the first preset line width can be set as required.
Further, the line width of the metal line inside the GOA circuit 102 is greater than a second preset line width, and the distance between the output end metal line of the GOA circuit 102 and other adjacent metal lines is greater than a preset distance.
It should be noted that, because the GOA circuit has complex routing and small routing distance, the routing line distance near the preset laser dotting position needs to be increased, so as to avoid short circuit between the dotting position and the nearby routing due to metal splashing during dotting. The second preset line width refers to a standard metal line width of the array substrate of each size, such as 50mil or 100mil, the preset distance refers to a standard metal line distance of the array substrate of each size, such as 40mil or 80mil, and the specific line width of the second preset line width level preset distance can be set as required
Further, the GOA circuit 102 includes a first GOA circuit and a second GOA circuit; the first GOA circuit and the second GOA circuit are symmetrically disposed on two sides of the display circuit 102, and are connected by a first scan line 105.
It is understood that, in order to improve the driving power for the array substrate with larger size, the dual-sided GOA driving is usually adopted. The array substrate provided in this embodiment may also be an array substrate with dual-sided GOA driving. After cutting, the array substrate is driven by the single-side GOA and can still work normally.
Meanwhile, the array substrate is changed from bilateral GOA driving to unilateral GOA driving, and the driving capability is reduced, so that the driving signal needs to be compensated during driving, and color difference is avoided. Concretely, the writing data of the data wire is compensated, and the compensated data signal S 'is obtained' i Comprises the following steps:
S' i ＝K i *S i
K i ＝f(W G ，W L ，δ W ，δ L ，C，R)
wherein S is i For the original data signal, W G Is the width of the sub-pixel ground line, W L Is the width of the sub-pixel drive line, δ W Is the thickness of the ground line, δ L The thickness of the driving line, C is the equivalent capacitance of the sub-pixels, and R is the equivalent resistance between the sub-pixels. The data signal compensation technique is well-established, and the detailed description of the embodiment is omitted here.
Referring to fig. 3, fig. 3 is a schematic flow chart of an embodiment of a processing method of an array substrate of the invention. The invention also provides an array substrate processing method, which is applied to the array substrate.
In this embodiment, the array substrate processing method includes the steps of:
step S10: and when the cutting instruction is received, determining a cutting line according to the cutting instruction, and cutting the array substrate based on the cutting line.
It should be understood that the execution main body of the embodiment is an array substrate processing apparatus, the array substrate processing apparatus has functions of data processing, program running, and the like, and the array substrate processing apparatus is further configured with a corresponding cutting apparatus and a corresponding laser dotting device, and can execute an array substrate cutting process and a laser dotting process, and of course, other apparatuses having similar functions may also be used, and the embodiment is not limited thereto.
It should be noted that the cutting instruction may be triggered by an operator of the array substrate processing equipment, a corresponding human-computer interaction unit may be configured on the array substrate processing equipment, and the operator inputs the cutting instruction by pressing a human-computer interaction unit button or a display control.
The cutting line refers to a cutting track on the array substrate to be processed, and the array substrate processing equipment cuts the cutting line on the array substrate to obtain the cut array substrate. In specific implementation, the cutting command may carry a required size of the array substrate, and the array substrate processing device generates a corresponding cutting line based on the size of the array substrate.
The cutting line can be represented in a coordinate mode, the array substrate processing equipment represents a planar area of the array substrate to be processed in a coordinate mode, and then the corresponding array substrate coordinate is obtained according to the required array substrate size to form the cutting line coordinate. The cutting of the array substrate is well-known in the art, and the present embodiment is not limited thereto.
Step S20: and determining position information to be dotted on the cut array substrate according to the cutting line, and generating a dotting instruction according to the position information to be dotted.
It can be understood that, in order to ensure the reliability of the cut array substrate, the circuit needs to be modified. Referring to the foregoing description of the array substrate of the present invention, the dotting position is usually the edge position of the array substrate after cutting, i.e. near the cutting line. The information of the positions to be dotted can also be coordinate information, and the coordinate information corresponding to the information of the positions to be dotted can be determined according to the coordinate parameters of the array substrate and the coordinate parameters of the cutting lines; and using the coordinate information as a dotting instruction for marking the laser dotting position.
Referring to fig. 1, 2 and 4, fig. 4 is a schematic view illustrating the processing of the array substrate according to the present invention. In a specific implementation, step S20 may be: acquiring first position information of each GOA circuit 102 on the cut array substrate, and determining an edge GOA circuit closest to the cutting line according to the first position information; the intersection of the output end of the edge GOA circuit and a preset frame starting signal line 110 is used as a first dot position; the joint of the output end and the first scanning line 105 is taken as a second dotting position; taking a first overlapping area of the second scanning line 106 corresponding to the edge GOA circuit and the ground line as a third dotting position; and generating to-be-dotted position information according to the first dotting position, the second dotting position and the third dotting position, and generating a dotting instruction according to the to-be-dotted position information.
It can be understood that the preset frame start signal line 110 is required for driving the GOA circuits 102, and the preset frame start signal line 110 inputs the frame start signal to the GOA circuits 102 in the first row of the array substrate, so that the GOA circuits 102 output the scanning signals, and meanwhile, the GOA circuits 102 in the first row drive the GOA circuits 102 in the second row to output the scanning signals, and so on, to complete driving of all rows of the array substrate.
It should be noted that, since the array substrate needs to be cut, the GOA circuits 102 in the first row may be cut off, so that the GOA circuits 102 on the cut array substrate have no start-of-frame signal input. Therefore, the introduction of the frame start signal needs to be performed anew. In the present embodiment, the output end of the edge GOA circuit is connected to the preset frame start signal line 110 as the frame start signal input end by performing laser dotting on the intersection (marked with "X" in fig. 4) of the output end of the edge GOA circuit and the preset frame start signal line 110. At the same time, the connection between the output terminal of the edge GOA circuit 102 and the first scan line 105 (indicated by "·" in fig. 4) needs to be dotted to disconnect the connection between the output terminal of the edge GOA circuit 102 and the first scan line 105. The modified array substrate is driven from the next row of GOA circuits 102 of the edge GOA circuit 102.
Meanwhile, as the original ground circuit is damaged, laser dotting is performed on the first overlapping area of the second scanning line 106 and the ground 101 near the notch, so that the second scanning line 106 is connected with the ground 101, and the ground circuit is formed again, thereby improving the reliability of the array substrate after cutting.
It should be noted that the first position information may be coordinate information, which can identify the position information of each GOA circuit 102 on the array substrate to be processed. By comparing the coordinate information corresponding to the first position information with the coordinate information corresponding to the cutting line, the coordinate information of the edge GOA circuit 102 closest to the cutting line can be determined. In addition, the first dotting position, the second dotting position and the third dotting position can be represented by coordinates.
In addition, in order to further improve the reliability, generating to-be-dotted position information according to the first dotting position, the second dotting position and the third dotting position, and generating a dotting instruction according to the to-be-dotting position information, the method includes: acquiring second position information of each thin film transistor 103 on the cut array substrate, and determining the edge thin film transistor 103 closest to the cutting line according to the second position information; taking a second overlapping area of the second data line 108 corresponding to the edge thin film transistor 103 and the scanning line corresponding to the edge thin film transistor 103 as a fourth dotting position; a third overlapping area of the second data line 108 and the common line 109 corresponding to the edge thin film transistor 103 is used as a fifth dotting position; generating to-be-dotted position information according to the first dotting position, the second dotting position, the third dotting position, the fourth dotting position and the fifth dotting position, and generating a dotting instruction according to the to-be-dotted position information.
It should be noted that the second position information may be coordinate information, which may identify position information of each thin film transistor 103 on the array substrate to be processed. By comparing the coordinate information corresponding to the second position information with the coordinate information corresponding to the cut line, the coordinate information of the edge thin film transistor 103 closest to the cut line can be determined. In addition, the fourth dotting position and the fifth dotting position can be expressed by coordinates.
It is to be understood that after the array substrate is cut, laser dotting is performed on the second overlap region and the third overlap region corresponding to each thin film transistor 103 near the cut line, so that both the source and the gate of the thin film transistor 103 are connected to the common line 109, thereby forming an electrostatic discharge circuit. When an external electrostatic high voltage enters the data line, the high voltage is discharged to the common line 109 through the electrostatic discharge circuit, so that reliability will be improved.
In addition, for the array substrate cut in the transverse direction, since the row of the display circuits 104 closest to the cutting line is modified into the electrostatic discharge circuit, the row of the display circuits 104 loses the active function. Therefore, it is also necessary to cut off the connection between the first scanning line 105 corresponding to the row and the GOA circuit 102.
Step S30: and carrying out dotting operation on the cut array substrate according to the dotting instruction to obtain the processed array substrate.
It can be understood that after the array substrate processing equipment generates the dotting instruction, dotting operation is performed on each dotting position of the cut array substrate according to corresponding coordinate information in the dotting instruction, so as to connect each layer of metal wires or disconnect connections among the parts, and the processed array substrate is obtained. After dotting, operations such as sealing and the like are required, so that the array substrate meeting the required size is obtained.
When a cutting instruction is received, the cutting line is determined according to the cutting instruction, and the array substrate is cut based on the cutting line; determining position information to be dotted on the cut array substrate according to the cutting line, and generating a dotting instruction according to the position information to be dotted; and then, dotting the cut array substrate according to the dotting instruction to obtain the processed array substrate. The array substrate provided by the embodiment is an array substrate with a general size, and can support a user to cut based on a self-defined size parameter. After cutting, the circuit of the array substrate is modified based on the second scanning line, and the reliability of the cut array substrate is improved. The array substrate provided by the embodiment can support single-chip production or batch production, so that the requirement of a user on a custom size is met.
In order to achieve the above object, the present invention further provides a display module, which includes the array substrate with the personalized ePanel size as described above, or includes the array substrate manufactured according to the array substrate processing method described above. The specific structure of the array substrate refers to the above embodiments, and since the display module adopts all the technical solutions of all the above embodiments, at least all the beneficial effects brought by the technical solutions of the above embodiments are achieved, and no further description is given here.
In order to achieve the above object, the present invention further provides a display panel, which includes the display module described above. The specific structure of the display module refers to the above embodiments, and since the display panel adopts all the technical solutions of all the above embodiments, all the beneficial effects brought by the technical solutions of the above embodiments are at least achieved, and are not repeated herein.
To achieve the above object, the present invention further provides a display device, which includes the display panel as described above. The specific structure of the display panel refers to the above embodiments, and since the display adopts all technical solutions of all the above embodiments, at least all the beneficial effects brought by the technical solutions of the above embodiments are achieved, and no further description is given here.
The above description is only a preferred embodiment of the present invention, and is not intended to limit the scope of the present invention, and all modifications and equivalents of the present invention, which are made by the contents of the present specification and the accompanying drawings, or directly/indirectly applied to other related technical fields, are included in the scope of the present invention.
Claims (9)
1. The array substrate with the personalized ePANel size is characterized by comprising a ground wire, GOA circuits, a thin film transistor and a display circuit, wherein each GOA circuit corresponds to a first scanning line, a second scanning line and a first data line; wherein the content of the first and second substances,
the output end of the GOA circuit is connected with the first scanning line, the grid electrode of the thin film transistor is connected with the first scanning line, the source electrode of the thin film transistor is connected with the display circuit, and the drain electrode of the thin film transistor is connected with the first data line;
the second scanning line is parallel to the first scanning line, two ends of the second scanning line symmetrically extend to the edge of the array substrate, and a first overlapping area is formed between the second scanning line and the ground line;
the array substrate further comprises a second data line, and the second data line corresponds to the thin film transistor;
the second data line is arranged in parallel with the first data line, a source electrode of the thin film transistor is connected with the second data line, the second data line and the first scanning line are provided with a second overlapping area, and a common line corresponding to the second data line and the thin film transistor is provided with a third overlapping area;
after the array substrate is cut, laser dotting is carried out on the second scanning line near the cut and the first overlapping area of the ground line, the second scanning line is connected with the ground line, a ground line loop is formed, laser dotting is carried out on the second overlapping area and the third overlapping area corresponding to each thin film transistor near the cut, the source electrode and the grid electrode of each thin film transistor are connected to the common line, and an electrostatic discharge circuit is formed.
2. The ePANel-sized array substrate of claim 1, wherein a width of the metal line inside the GOA circuit is larger than a second predetermined width, and a distance between the metal line at the output end of the GOA circuit and other adjacent metal lines is larger than a predetermined distance.
3. The ePANel personalized array substrate of claim 1, wherein the GOA circuit comprises a first GOA circuit and a second GOA circuit;
the first GOA circuit and the second GOA circuit are symmetrically arranged on two sides of the display circuit and are connected through the first scanning line.
4. An array substrate processing method applied to the array substrate according to any one of claims 1 to 3, the array substrate processing method comprising:
when a cutting instruction is received, determining a cutting line according to the cutting instruction, and cutting the array substrate based on the cutting line;
determining position information to be dotted on the cut array substrate according to the cutting line, and generating a dotting instruction according to the position information to be dotted;
and dotting the cut array substrate according to the dotting instruction to obtain the processed array substrate.
5. The array substrate processing method of claim 4, wherein the determining the information of the position to be dotted on the array substrate after cutting according to the cutting line and generating the dotting instruction according to the information of the position to be dotted comprises:
obtaining first position information of each GOA circuit on the cut array substrate, and determining an edge GOA circuit closest to the cutting line according to the first position information;
taking the intersection of the output end of the edge GOA circuit and a preset frame starting signal line as a first dot position;
taking the joint of the output end and the first scanning line as a second dotting position;
taking a first overlapping area of a second scanning line and a ground wire corresponding to the edge GOA circuit as a third dotting position;
generating position information to be dotted according to the first dotting position, the second dotting position and the third dotting position, and generating a dotting instruction according to the position information to be dotted.
6. The array substrate processing method of claim 5, wherein the generating of the to-be-dotted position information according to the first dotting position, the second dotting position and the third dotting position and the generating of the dotting instruction according to the to-be-dotting position information comprises:
acquiring second position information of each thin film transistor on the cut array substrate, and determining the edge thin film transistor closest to the cutting line according to the second position information;
taking a second overlapping area of a second data line corresponding to the edge thin film transistor and a scanning line corresponding to the edge thin film transistor as a fourth dotting position;
taking a third overlapping area of the second data line and a common line corresponding to the edge thin film transistor as a fifth dotting position;
generating position information to be dotted according to the first dotting position, the second dotting position, the third dotting position, the fourth dotting position and the fifth dotting position, and generating a dotting instruction according to the position information to be dotted.
7. A display module, which is characterized by comprising the array substrate with the personalized ePANel size as set forth in any one of claims 1 to 3 or the array substrate manufactured by the array substrate processing method as set forth in any one of claims 4 to 6.
8. A display panel, characterized in that the display panel comprises the display module according to claim 7.
9. A display characterized in that it comprises a display panel as claimed in claim 8.
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