CN112965565A - Band gap reference circuit with low temperature drift - Google Patents
Band gap reference circuit with low temperature drift Download PDFInfo
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- CN112965565A CN112965565A CN202110182511.XA CN202110182511A CN112965565A CN 112965565 A CN112965565 A CN 112965565A CN 202110182511 A CN202110182511 A CN 202110182511A CN 112965565 A CN112965565 A CN 112965565A
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Abstract
The invention provides a low-temperature-drift band-gap reference circuit, which comprises: the monitoring module comprises a reference voltage module, a voltage source, a monitoring module and a control module, wherein a power supply end of the reference voltage module is connected with the voltage source, a grounding end of the reference voltage module is connected with a reference ground, a first output end of the reference voltage module is connected with the monitoring module, and a second output end of the reference voltage module outputs a reference voltage signal; the power supply end of the monitoring module is connected with a voltage source, the grounding end of the monitoring module is connected with a reference ground, the input end of the monitoring module is connected with the first output end of the reference voltage module, and the output end of the monitoring module outputs a monitoring voltage signal; the reference voltage module comprises at least two first transistors, and the first transistors are MOS (metal oxide semiconductor) tubes or triodes; the monitoring module comprises a second transistor, and the type of the second transistor is the same as that of the first transistor, so that the monitoring voltage signal and the reference voltage signal have the same temperature drift trend. The invention can realize the low temperature drift of the band gap reference circuit without performing high temperature point calibration, and reduce the chip calibration cost.
Description
Technical Field
The invention relates to the technical field of integrated circuits, in particular to a low-temperature-drift band-gap reference circuit.
Background
The most common voltage reference source used in the industry at present is a bandgap reference voltage source, which has high precision and stability, does not change with the changes of power supply voltage, temperature, semiconductor process, etc., plays an extremely important role in integrated circuit design, and is widely applied to various chips such as DAC, ADC, sensor chip, detection chip, power management, etc. The traditional band-gap reference voltage source provides reference voltage for other modules in the integrated circuit, and if the chip is calibrated only at normal temperature and does not calibrate multiple temperature points (high-temperature point calibration), larger temperature drift can be generated, so that the requirement of high-precision products is difficult to meet. And if each chip is calibrated by multiple temperature points, the chip cost is greatly increased.
Therefore, a bandgap reference circuit with low temperature drift is desired, which can realize low temperature drift of the bandgap reference circuit without performing high temperature calibration, and reduce chip calibration cost.
Disclosure of Invention
The invention discloses a band gap reference circuit with low temperature drift, which can realize the low temperature drift of the band gap reference circuit and reduce the calibration cost of a chip under the condition of not calibrating a high temperature point.
In order to achieve the above object, the present invention provides a low temperature-drift bandgap reference circuit, including:
the monitoring module comprises a reference voltage module, a voltage source, a monitoring module and a control module, wherein a power supply end of the reference voltage module is connected to the voltage source, a grounding end of the reference voltage module is connected to a reference ground, a first output end of the reference voltage module is connected to the monitoring module, and a second output end of the reference voltage module outputs a reference voltage signal;
the power supply end of the monitoring module is connected with a voltage source, the grounding end of the monitoring module is connected with a reference ground, the input end of the monitoring module is connected with the first output end of the reference voltage module, and the output end of the monitoring module outputs a monitoring voltage signal;
the reference voltage module comprises at least two first transistors, and the first transistors are MOS (metal oxide semiconductor) tubes or triodes; the monitoring module comprises a second transistor, the type of the second transistor is the same as that of the first transistor, so that the monitoring voltage signal and the reference voltage signal have the same temperature drift tendency, when the second transistor is a triode, the monitoring voltage signal is the voltage difference between a base electrode and an emitter electrode, and when the second transistor is an MOS (metal oxide semiconductor) transistor, the monitoring signal is the voltage difference between a grid electrode and a source electrode.
As an alternative, the first transistor and the second transistor are both NPN triodes, the reference voltage module includes a first PMOS transistor and a second PMOS transistor, a gate of the first PMOS transistor and a gate of the second PMOS transistor are connected in common and serve as a first output terminal of the reference voltage module, the monitoring module includes a third PMOS transistor, a gate of the third PMOS transistor is connected to the first output terminal of the reference voltage module, a source of the third PMOS transistor is connected to the voltage source, a drain of the third PMOS transistor is connected to a collector of the second transistor, an emitter of the second transistor is connected to a ground reference, and a base of the second transistor is connected to a collector of the second transistor.
As an alternative, the first transistor and the second transistor are both PNP triodes, the reference voltage module includes a first PMOS transistor and a second PMOS transistor, a gate of the first PMOS transistor and a gate of the second PMOS transistor are connected in common and serve as a first output terminal of the reference voltage module, the monitoring module includes a third PMOS transistor, a gate of the third PMOS transistor is connected to the first output terminal of the reference voltage module, a source of the third PMOS transistor is connected to the voltage source, a drain of the third PMOS transistor is connected to an emitter of the second transistor, and a collector and a base of the second transistor are both connected to the reference ground.
As an alternative, the reference voltage module includes a first NPN triode, a second NPN triode, an operational amplifier, a first PMOS transistor and a second PMOS transistor, where sources of the first PMOS transistor and the second PMOS transistor are commonly connected to a voltage source, gates of the first PMOS transistor and the second PMOS transistor are commonly connected to an output end of the operational amplifier, and an output end of the operational amplifier is a first output end of the reference voltage module; the drain electrode of the first PMOS tube is connected to the collector electrode of the first NPN triode, the drain electrode of the second PMOS tube is connected to the collector electrode of the second NPN triode through a first load, and the emitter electrodes of the first NPN triode and the second NPN triode are connected to the reference ground in common; an emitter of the first NPN triode is connected to the negative input end of the operational amplifier and the drain of the first PMOS transistor through a second load, an emitter of the second NPN triode is connected to the positive input end of the operational amplifier and the drain of the second PMOS transistor through a third load, and bases of the first NPN triode and the second NPN triode are respectively connected to respective collectors.
As an alternative, the reference voltage module includes a first NPN triode, a second NPN triode, an operational amplifier, a first PMOS transistor and a second PMOS transistor, where sources of the first PMOS transistor and the second PMOS transistor are commonly connected to a voltage source, gates of the first PMOS transistor and the second PMOS transistor are commonly connected to an output end of the operational amplifier, and an output end of the operational amplifier is a first output end of the reference voltage module; the drain electrode of the first PMOS tube is connected to the collector electrode of the first NPN triode and the negative input end of the operational amplifier through a second load, the drain electrode of the second PMOS tube is connected to the positive input end of the operational amplifier through a third load, the third load is connected to the collector electrode of the second NPN triode through a first load, the collector electrode of the second NPN triode is connected to the positive input end of the operational amplifier through the first load, the emitter electrodes of the first NPN triode and the second NPN triode are connected to a reference ground in common, and the base electrodes of the first NPN triode and the second NPN triode are respectively connected with the respective collector electrodes.
As an alternative, the reference voltage module includes a first PNP triode, a second PNP triode, an operational amplifier, a first PMOS transistor, and a second PMOS transistor, where source electrodes of the first PMOS transistor and the second PMOS transistor are commonly connected to a voltage source, gate electrodes of the first PMOS transistor and the second PMOS transistor are commonly connected to an output end of the operational amplifier, and an output end of the operational amplifier is a first output end of the reference voltage module; the drain electrode of the first PMOS tube is connected with the emitting electrode of the first PNP triode and the negative input end of the operational amplifier through a second load, the drain electrode of the second PMOS tube is connected with the positive input end of the operational amplifier through a third load, the third load is connected with the emitting electrode of the second PNP triode through the first load, the emitting electrode of the second PNP triode is connected with the positive input end of the operational amplifier through the first load, and the collecting electrode and the base electrode of the first PNP triode and the collector electrode and the base electrode of the second PNP triode are connected with a reference ground in a sharing mode.
As an alternative, the monitoring module includes a third PMOS transistor and a third NPN transistor, a gate of the third PMOS transistor is connected to the first output terminal of the reference voltage module, a source of the third PMOS transistor is connected to the voltage source, a drain of the third PMOS transistor is connected to a collector of the third NPN transistor, an emitter of the third NPN transistor is connected to the reference ground, and a base of the third NPN transistor is connected to a collector of the third NPN transistor.
As an alternative, the monitoring module includes a third PMOS transistor and a third PNP triode, a gate of the third PMOS transistor is connected to the first output terminal of the reference voltage module, a source of the third PMOS transistor is connected to the voltage source, a drain of the third PMOS transistor is connected to an emitter of the third NPN triode, and a base and a collector of the third NPN triode are connected to the reference ground.
Alternatively, the sizes of the first transistor and the second transistor are set in proportion.
Alternatively, the temperature drift calibration of the reference voltage module is realized by adjusting the resistance value of the third load.
The invention has the beneficial effects that:
the reference voltage module can simulate the characteristic of the first transistor in the reference voltage module through the second transistor of the monitoring module, the characteristic of the first transistor is compared with an ideal value at normal temperature, the deviation of the characteristic of the first transistor can be estimated, the temperature drift characteristic of the reference voltage module can be further estimated, and the temperature drift characteristic of the reference voltage module can be modified by adjusting the resistance value of the third load of the reference voltage module. When the second transistor is a triode, the monitoring voltage signal is the voltage difference between the base electrode and the emitter electrode, and when the second transistor is an MOS transistor, the monitoring signal is the voltage difference between the grid electrode and the source electrode.
Drawings
The above and other objects, features and advantages of the present invention will become more apparent by describing in more detail exemplary embodiments thereof with reference to the attached drawings, in which like reference numerals generally represent like parts.
Fig. 1 shows a schematic diagram of a low-temperature-drift bandgap reference circuit according to embodiment 1 of the present invention.
Fig. 2 shows a schematic diagram of a low-temperature-drift bandgap reference circuit according to embodiment 2 of the present invention.
FIG. 3 is a schematic diagram of a low temperature-drift bandgap reference circuit according to embodiment 3 of the present invention
Detailed Description
The invention is described in further detail below with reference to the figures and specific examples. The advantages and features of the present invention will become more apparent from the following description and drawings, it being understood, however, that the concepts of the present invention may be embodied in many different forms and should not be construed as limited to the specific embodiments set forth herein. The drawings are in simplified form and are not to scale, but are provided for convenience and clarity in describing embodiments of the invention.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and/or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. As used herein, the term "and/or" includes any and all combinations of the associated listed items.
If the method herein comprises a series of steps, the order in which these steps are presented herein is not necessarily the only order in which these steps may be performed, and some steps may be omitted and/or some other steps not described herein may be added to the method. Although elements in one drawing may be readily identified as such in other drawings, the present disclosure does not identify each element as being identical to each other in every drawing for clarity of description.
Example 1
The embodiment 1 of the invention provides a low-temperature-drift bandgap reference circuit, and fig. 1 shows a schematic diagram of the low-temperature-drift bandgap reference circuit of the embodiment. Referring to fig. 1, the low temperature drift bandgap reference circuit includes:
a reference voltage module 1, a power supply end of the reference voltage module 1 being connected to a voltage source VDD, a ground end of the reference voltage module 1 being connected to a reference ground, a first output end of the reference voltage module 1 being connected to the monitoring module 2, and a second output end of the reference voltage module 1 outputting a reference voltage signal Vbg;
the power terminal of the monitoring module 2 is connected to a voltage source VDD, the ground terminal thereof is connected to a reference ground, the input terminal thereof is connected to the first output terminal of the reference voltage module 1, and the output terminal of the monitoring module 2 outputs a monitoring voltage signal V2;
the reference voltage module 1 includes at least two first transistors, where the first transistors are MOS transistors or triodes (in this embodiment, two NPN transistors are included); the monitoring module 2 comprises a second transistor which is the same type as the first transistor, so that the monitoring voltage signal V2 and the reference voltage signal Vbg have the same temperature drift tendency.
Specifically, in this embodiment, the reference voltage module 1 includes two first transistors, and when the number of the first transistors is greater than 2, the types of the plurality of first transistors are the same, for example, the first transistors are all NPN-type triodes, all PNP-type triodes, or all NMOS transistors or PMOS transistors. The power supply terminal and the ground terminal of the reference voltage module 1 are respectively connected to the voltage source VDD and the ground reference VSS, and the second output terminal of the reference voltage module 1 is used for providing a stable reference voltage for other modules of the integrated circuit.
In an embodiment, the first transistor and the second transistor are both NPN triodes, the reference voltage module includes a first PMOS transistor and a second PMOS transistor, a gate of the first PMOS transistor and a gate of the second PMOS transistor are commonly connected and serve as a first output terminal of the reference voltage module, the monitoring module includes a third PMOS transistor, a gate of the third PMOS transistor is connected to the first output terminal of the reference voltage module, a source of the third PMOS transistor is connected to the voltage source, a drain of the third PMOS transistor is connected to a collector of the second transistor, an emitter of the second transistor is connected to a ground reference, and a base of the second transistor is connected to a collector of the second transistor.
In another embodiment, the first transistor and the second transistor are both PNP triodes, the reference voltage module includes a first PMOS transistor and a second PMOS transistor, a gate of the first PMOS transistor and a gate of the second PMOS transistor are connected in common and serve as a first output terminal of the reference voltage module, the monitoring module includes a third PMOS transistor, a gate of the third PMOS transistor is connected to the first output terminal of the reference voltage module, a source of the third PMOS transistor is connected to the voltage source, a drain of the third PMOS transistor is connected to an emitter of the second transistor, and a collector and a base of the second transistor are both connected to the reference ground.
In this embodiment, the reference voltage module 1 is a brookaw structure bandgap reference circuit (bandgap), and in other embodiments, the reference voltage module 1 may also be a bandgap reference circuit with other structures. In this embodiment, the reference voltage module 1 includes a first NPN transistor Q1, a second NPN transistor Q2, an operational amplifier a1, a first PMOS transistor M1 and a second PMOS transistor M2, wherein sources of the first PMOS transistor M1 and the second PMOS transistor M2 are commonly connected to a voltage source VDD, gates of the first PMOS transistor M1 and the second PMOS transistor M2 are commonly connected to an output terminal of the operational amplifier a1, and an output terminal of the operational amplifier a1 is a first output terminal of the reference voltage module 1; the drain of the first PMOS transistor M1 is connected to the collector of the first NPN transistor Q1, the drain of the second PMOS transistor M2 is connected to the collector of the second NPN transistor Q2 through a first load (in this embodiment, the first load is a resistor R1), and the emitters of the first NPN transistor Q1 and the second NPN transistor Q2 are connected to the ground; an emitter of the first NPN transistor Q1 is connected to the negative input terminal of the operational amplifier a1 and the drain of the first PMOS transistor M1 through a second load (in this embodiment, the second load is a resistor R2), an emitter of the second NPN transistor Q2 is connected to the positive input terminal of the operational amplifier a1 and the drain of the second PMOS transistor M2 through a third load (in this embodiment, the third load is a resistor R3), and bases of the first NPN transistor Q1 and the second NPN transistor Q2 are respectively connected to respective collectors thereof.
In this embodiment, the first load, the second load, and the third load are all resistors, and in other embodiments, the first load, the second load, and the third load may also be mos tubes operating in a linear region.
In this embodiment, the monitoring module 2 includes a third PMOS transistor M3 and a third NPN transistor Q3, a gate of the third PMOS transistor M3 is connected to the first output terminal of the reference voltage module 1, a source of the third PMOS transistor M3 is connected to the voltage source VDD, a drain of the third PMOS transistor M3 is connected to a collector of the third NPN transistor Q3, an emitter of the third NPN transistor Q3 is connected to the ground, and a base of the third NPN transistor Q3 is connected to a drain thereof. In this embodiment, the third NPN transistor Q3 and the first NPN transistor Q1 and the second NPN transistor Q2 are arranged in proportion to each other in size.
The reference voltage module causes the reference voltage signal Vbg of the reference voltage module 1 to drift with temperature due to different process angles or stress, and the like, mainly because the characteristics of the triode in the reference voltage module deviate, but the Vbe voltage of the triode at absolute zero degree is unchanged or changes negligibly in the process, so the change of the temperature drift slope of Vbe can cause the change of the Vbe voltage. The trend of the temperature drift change can be estimated by observing the voltage change of Vbe at normal temperature. And further the temperature drift characteristic of the reference voltage module is estimated. And the temperature drift characteristic of the reference voltage module is modified and adjusted by adjusting the resistance value of the third load of the reference voltage module.
Specifically, in this embodiment, the first NPN transistor Q1 and the second NPN transistor Q2 are both first transistors, the third NPN transistor Q3 is a second transistor, the bias current of the third NPN transistor Q3 is in proportion to the bias currents of the first NPN transistor Q1 and the second NPN transistor Q2, and the size of the third NPN transistor Q3 is also in proportion to the sizes of the first NPN transistor Q1 and the second NPN transistor Q2, so that the characteristics of the two transistors in the reference voltage module 1 are simulated by using the characteristics of the third NPN transistor Q3. In this embodiment, the monitoring voltage signal V2 is a voltage difference between the base and the emitter of the third NPN transistor Q3. The Vbe of the triode in the reference voltage module 1 is extracted (the Vbe of the third NPN triode Q3 has the same characteristic with the Vbe of the triode in the reference voltage module 1), so that the Vbe is extracted at normal temperature and compared with an ideal value, the deviation of the characteristic of the triode in the reference voltage module can be estimated, and the temperature drift characteristic of the reference voltage module 1 can be further estimated. It can be compensated back by calibration. In this embodiment, the temperature drift calibration of the reference voltage module is implemented by adjusting the resistance of the third load (the resistor R3).
In this embodiment, the first transistor in the reference voltage module 1 is an NPN-type transistor, and in other embodiments, it may also be a PNP-type transistor, and at this time, the second transistor of the monitoring module 2 is changed into a PNP-type transistor. Similarly, the first transistor in the reference voltage module 1 is an NMOS transistor, the second transistor is also an NMOS transistor, the first transistor in the reference voltage module 1 is a PMOS transistor, and the second transistor is also a PMOS transistor.
Example 2
The present embodiment is different from embodiment 1 in that the first NPN transistor and the second NPN transistor are different in connection relationship with the first load, the second load, and the third load. Fig. 2 shows a schematic diagram of a low-temperature-drift bandgap reference circuit according to embodiment 2 of the present invention. Referring to fig. 2, this embodiment only describes the differences from embodiment 1, and the same principle of structure is partially referred to embodiment 1.
The reference voltage module 1 comprises a first NPN triode Q1, a second NPN triode Q2, an operational amplifier a1, a first PMOS transistor M1 and a second PMOS transistor M2, wherein sources of the first PMOS transistor M1 and the second PMOS transistor M2 are commonly connected to a voltage source VDD, gates of the first PMOS transistor M1 and the second PMOS transistor M2 are commonly connected to an output end of the operational amplifier a1, and the output end of the operational amplifier is a first output end of the reference voltage module; the drain of the first PMOS transistor M1 is connected to the collector of the first NPN transistor Q1 and the negative input terminal of the operational amplifier a1 through a second load (in this embodiment, a resistor R2), the drain of the second PMOS transistor M2 is connected to the positive input terminal of the operational amplifier a1 through a third load (in this embodiment, a resistor R3), the third load is connected to the collector of the second NPN transistor Q2 through a first load (in this embodiment, a resistor R1), the collector of the second NPN transistor Q2 is connected to the positive input terminal of the operational amplifier a1 through the first load, the emitters of the first NPN transistor Q1 and the second NPN transistor Q2 are commonly connected to a ground VSS, and the bases of the first NPN transistor Q1 and the second NPN transistor Q2 are respectively connected to the respective collectors thereof. The monitoring module comprises a third PMOS tube M3 and a third NPN triode Q3, the grid electrode of the third PMOS tube M3 is connected with the first output end of the reference voltage module, the source electrode of the third PMOS tube M3 is connected with the VDD voltage source, the drain electrode of the third PMOS tube M3 is connected with the collector electrode of the third NPN triode Q3, the emitter electrode of the third NPN triode Q3 is connected with the reference ground, and the base electrode of the third NPN triode Q3 is connected with the collector electrode of the third NPN triode Q3.
Example 3
The present embodiment is different from embodiment 2 in that the first transistor and the second transistor are both PNP transistors. Fig. 3 shows a schematic diagram of a low temperature-drift bandgap reference circuit of the present embodiment. Referring to fig. 3, this embodiment only describes the differences from embodiment 2, and the same principle of structure is partially referred to embodiment 2.
The reference voltage module 1 comprises a first PNP triode Q1', a second PNP triode Q2', an operational amplifier a1, a first PMOS transistor M1 and a second PMOS transistor M2, wherein the sources of the first PMOS transistor M1 and the second PMOS transistor M2 are commonly connected to a voltage source VDD, the gates of the first PMOS transistor M1 and the second PMOS transistor M2 are commonly connected to the output end of the operational amplifier a1, and the output end of the operational amplifier a1 is a first output end of the reference voltage module 1; the drain of the first PMOS transistor M1 is connected to the emitter of the first PNP transistor Q1' and the negative input terminal of the operational amplifier a1 through a second load (in this embodiment, a resistor R2), the drain of the second PMOS transistor M2 is connected to the positive input terminal of the operational amplifier a1 through a third load (in this embodiment, a resistor R3), the third load is connected to the emitter of the second PNP transistor Q2' through a first load (in this embodiment, a resistor R1), the emitter of the second PNP transistor Q2' is connected to the positive input terminal of the operational amplifier a1 through the first load, and the collectors and bases of the first PNP transistor Q1' and the second PNP transistor Q2' are commonly connected to ground VSS. The monitoring module 2 includes a third PMOS transistor M3 and a third PNP transistor Q3', the gate of the third PMOS transistor M3 is connected to the first output terminal of the reference voltage module 1, the source of the third PMOS transistor M3 is connected to the voltage source VDD, the drain of the third PMOS transistor M3 is connected to the emitter of the third NPN transistor Q3', and the base and the collector of the third NPN transistor Q3' are connected to the reference ground.
In the above 3 embodiments, the first transistor and the second transistor are both triodes, and in other embodiments, the first transistor and the second transistor may both be MOS transistors, such as NMOS transistors or PMOS transistors, and the circuit connection manner thereof is well known to those skilled in the art, and is not described herein again.
It should be noted that, in the present specification, all the embodiments are described in a related manner, and the same and similar parts among the embodiments are referred to each other, and each embodiment focuses on the differences from the other embodiments.
The above description is only for the purpose of describing the preferred embodiments of the present invention, and is not intended to limit the scope of the present invention, and any variations and modifications made by those skilled in the art based on the above disclosure are within the scope of the appended claims.
Claims (10)
1. A low temperature-drift bandgap reference circuit, comprising:
the monitoring module comprises a reference voltage module, a voltage source, a monitoring module and a control module, wherein a power supply end of the reference voltage module is connected to the voltage source, a grounding end of the reference voltage module is connected to a reference ground, a first output end of the reference voltage module is connected to the monitoring module, and a second output end of the reference voltage module outputs a reference voltage signal;
the power supply end of the monitoring module is connected with a voltage source, the grounding end of the monitoring module is connected with a reference ground, the input end of the monitoring module is connected with the first output end of the reference voltage module, and the output end of the monitoring module outputs a monitoring voltage signal;
the reference voltage module comprises at least two first transistors, and the first transistors are MOS (metal oxide semiconductor) tubes or triodes; the monitoring module comprises a second transistor, the type of the second transistor is the same as that of the first transistor, so that the monitoring voltage signal and the reference voltage signal have the same temperature drift tendency, when the second transistor is a triode, the monitoring voltage signal is the voltage difference between a base electrode and an emitter electrode, and when the second transistor is an MOS (metal oxide semiconductor) transistor, the monitoring signal is the voltage difference between a grid electrode and a source electrode.
2. The low temperature-drift bandgap reference circuit according to claim 1, wherein the first transistor and the second transistor are both NPN triodes, the reference voltage module includes a first PMOS transistor and a second PMOS transistor, a gate of the first PMOS transistor and a gate of the second PMOS transistor are connected in common and serve as a first output terminal of the reference voltage module, the monitoring module includes a third PMOS transistor, a gate of the third PMOS transistor is connected to the first output terminal of the reference voltage module, a source of the third PMOS transistor is connected to the voltage source, a drain of the third PMOS transistor is connected to a collector of the second transistor, an emitter of the second transistor is connected to a reference ground, and a base of the second transistor is connected to a collector of the second transistor.
3. The low temperature-drift bandgap reference circuit according to claim 1, wherein the first transistor and the second transistor are PNP transistors, the reference voltage module includes a first PMOS transistor and a second PMOS transistor, a gate of the first PMOS transistor and a gate of the second PMOS transistor are connected in common and serve as a first output terminal of the reference voltage module, the monitoring module includes a third PMOS transistor, a gate of the third PMOS transistor is connected to the first output terminal of the reference voltage module, a source of the third PMOS transistor is connected to the voltage source, a drain of the third PMOS transistor is connected to an emitter of the second transistor, and a collector and a base of the second transistor are connected to the reference ground.
4. The low-temperature-drift bandgap reference circuit according to claim 1, wherein the reference voltage module comprises a first NPN transistor, a second NPN transistor, an operational amplifier, a first PMOS transistor and a second PMOS transistor, wherein sources of the first PMOS transistor and the second PMOS transistor are commonly connected to a voltage source, gates of the first PMOS transistor and the second PMOS transistor are commonly connected to an output terminal of the operational amplifier, and an output terminal of the operational amplifier is a first output terminal of the reference voltage module; the drain electrode of the first PMOS tube is connected to the collector electrode of the first NPN triode, the drain electrode of the second PMOS tube is connected to the collector electrode of the second NPN triode through a first load, and the emitter electrodes of the first NPN triode and the second NPN triode are connected to the reference ground in common; an emitter of the first NPN triode is connected to the negative input end of the operational amplifier and the drain of the first PMOS transistor through a second load, an emitter of the second NPN triode is connected to the positive input end of the operational amplifier and the drain of the second PMOS transistor through a third load, and bases of the first NPN triode and the second NPN triode are respectively connected to respective collectors.
5. The low-temperature-drift bandgap reference circuit according to claim 2, wherein the reference voltage module comprises a first NPN transistor, a second NPN transistor, an operational amplifier, a first PMOS transistor and a second PMOS transistor, wherein sources of the first PMOS transistor and the second PMOS transistor are commonly connected to a voltage source, gates of the first PMOS transistor and the second PMOS transistor are commonly connected to an output terminal of the operational amplifier, and an output terminal of the operational amplifier is a first output terminal of the reference voltage module; the drain electrode of the first PMOS tube is connected to the collector electrode of the first NPN triode and the negative input end of the operational amplifier through a second load, the drain electrode of the second PMOS tube is connected to the positive input end of the operational amplifier through a third load, the third load is connected to the collector electrode of the second NPN triode through a first load, the collector electrode of the second NPN triode is connected to the positive input end of the operational amplifier through the first load, the emitter electrodes of the first NPN triode and the second NPN triode are connected to a reference ground in common, and the base electrodes of the first NPN triode and the second NPN triode are respectively connected with the respective collector electrodes.
6. The low-temperature-drift bandgap reference circuit according to claim 1, wherein the reference voltage module comprises a first PNP transistor, a second PNP transistor, an operational amplifier, a first PMOS transistor and a second PMOS transistor, wherein sources of the first PMOS transistor and the second PMOS transistor are commonly connected to a voltage source, gates of the first PMOS transistor and the second PMOS transistor are commonly connected to an output terminal of the operational amplifier, and an output terminal of the operational amplifier is a first output terminal of the reference voltage module; the drain electrode of the first PMOS tube is connected with the emitting electrode of the first PNP triode and the negative input end of the operational amplifier through a second load, the drain electrode of the second PMOS tube is connected with the positive input end of the operational amplifier through a third load, the third load is connected with the emitting electrode of the second PNP triode through the first load, the emitting electrode of the second PNP triode is connected with the positive input end of the operational amplifier through the first load, and the collecting electrode and the base electrode of the first PNP triode and the collector electrode and the base electrode of the second PNP triode are connected with a reference ground in a sharing mode.
7. The low-temperature-drift bandgap reference circuit according to claim 4 or 5, wherein the monitoring module comprises a third PMOS transistor and a third NPN transistor, a gate of the third PMOS transistor is connected to the first output terminal of the reference voltage module, a source of the third PMOS transistor is connected to the voltage source, a drain of the third PMOS transistor is connected to a collector of the third NPN transistor, an emitter of the third NPN transistor is connected to the ground, and a base of the third NPN transistor is connected to a collector of the third NPN transistor.
8. The low temperature-drift bandgap reference circuit according to claim 6, wherein the monitoring module comprises a third PMOS transistor and a third PNP transistor, a gate of the third PMOS transistor is connected to the first output terminal of the reference voltage module, a source of the third PMOS transistor is connected to the voltage source, a drain of the third PMOS transistor is connected to an emitter of the third NPN transistor, and a base and a collector of the third NPN transistor are commonly connected to the ground reference.
9. The low temperature-drift bandgap reference circuit according to claim 1, wherein said first transistor and said second transistor are scaled in size.
10. A low temperature drift bandgap reference circuit as claimed in any one of claims 4 to 6, wherein said reference voltage module is calibrated for temperature drift by adjusting the resistance of said third load.
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| CN112965565B (en) | 2022-03-08 |
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