CN112908397A - Method for repairing DRAM memory array and related equipment - Google Patents

Method for repairing DRAM memory array and related equipment Download PDF

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Publication number
CN112908397A
CN112908397A CN202110302568.9A CN202110302568A CN112908397A CN 112908397 A CN112908397 A CN 112908397A CN 202110302568 A CN202110302568 A CN 202110302568A CN 112908397 A CN112908397 A CN 112908397A
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block
repair
super block
failed
repairing
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CN112908397B (en
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张朝锋
王春娟
王砚
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Xi'an Ziguang Guoxin Semiconductor Co ltd
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Xian Unilc Semiconductors Co Ltd
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    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70Masking faults in memories by using spares or by reconfiguring
    • G11C29/72Masking faults in memories by using spares or by reconfiguring with optimized replacement algorithms
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70Masking faults in memories by using spares or by reconfiguring
    • G11C29/88Masking faults in memories by using spares or by reconfiguring with partially good memories
    • G11C29/883Masking faults in memories by using spares or by reconfiguring with partially good memories using a single defective memory device with reduced capacity, e.g. half capacity

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  • For Increasing The Reliability Of Semiconductor Memories (AREA)

Abstract

The embodiment of the application provides a repairing method of a DRAM memory array and related equipment, which are used for solving the problem of yield loss in the conventional repairing process. The method comprises the following steps: determining whether a storage block in the DRAM storage array meets a super block repair condition according to redundant resources and a failed super block, wherein the super block repair condition is used for judging whether the number of the redundant resources in the DRAM storage array meets the repair number of the failed super block of the storage block, the redundant resources and the failed super block both belong to the storage block, the redundant resources are storage media used for repairing failure in the storage block, the storage block comprises the super block and sub blocks, and the failed super block is a detected failed super block in the storage block; if the super block repairing condition is met, generating a corresponding super block repairing scheme; and repairing the memory blocks in the DRAM memory array according to the super block repair scheme.

Description

Method for repairing DRAM memory array and related equipment
Technical Field
The embodiment of the invention relates to the technical field of chips, in particular to a method for repairing a DRAM memory array and related equipment.
Background
In a chip, a Dynamic Random Access Memory (DRAM) array usually plays a role of a secondary cache and a temporary storage, and in a conventional use process, a storage medium corresponding to a part of addresses in a storage block in the DRAM array is sometimes used as a primary cache, or the part of addresses is used as an internal logic detection. Therefore, the storage medium corresponding to the part of addresses is required to have a higher reliability level, and the part of logical addresses also needs to be repaired preferentially in the repairing process, so that the storage medium is often called a super block in a storage block of a DRAM array.
At present, in a conventional repair manner, after the number of redundant resources capable of being repaired is determined, the number of redundant resources is compared with the number of failed super blocks and the number of failed sub blocks, and when the number of redundant resources exceeds the number of failed super blocks and the number of failed sub blocks, the repair operation is considered to be capable of being repaired and executed. However, in practical applications, when an existing repair method performs repair, and in some cases, when there are sub-blocks in which a super block can repair but the remaining redundant resources do not satisfy other failures, the current repair method may determine a chip that only satisfies repair of the failed super block as an unrepairable chip, but actually, in many cases, a chip that can be completely repaired by the failed super block may also be used as a normal chip, which causes a situation that the current conventional repair method may determine an unrepairable chip that can actually satisfy the chip that is actually used, thereby causing yield loss.
Disclosure of Invention
In this summary, concepts in a simplified form are introduced that are further described in the detailed description. The summary of the embodiments of the present application is not intended to define key features or essential features of the claimed subject matter, nor is it intended to be used as an aid in determining the scope of the claimed subject matter.
The embodiment of the application provides a repairing method of a DRAM memory array and related equipment so as to improve the product yield after repairing.
To at least partially solve the above problem, in a first aspect, an embodiment of the present application provides a repair method for a DRAM memory array, including:
determining whether a storage block in the DRAM storage array meets a super block repair condition according to redundant resources and a failed super block, wherein the super block repair condition is used for judging whether the number of the redundant resources in the DRAM storage array meets the repair number of the failed super block of the storage block, the redundant resources and the failed super block both belong to the storage block, the redundant resources are storage media used for repairing failure in the storage block, the storage block comprises the super block and sub blocks, and the failed super block is a detected failed super block in the storage block;
if the super block repairing condition is met, generating a corresponding super block repairing scheme;
and repairing the memory blocks in the DRAM memory array according to the super block repair scheme.
Optionally, before the repairing the memory block in the DRAM memory array according to the super block repair scheme, the method further includes:
determining whether a storage block in the DRAM storage array meets a subblock repairing condition or not according to a residual redundant resource and a failed subblock, wherein the residual redundant resource is the residual part of the redundant resource after the redundant resource is removed and meets the super block repairing condition, and the failed subblock is the failed subblock in the storage block;
if the subblock repairing conditions are met, generating a corresponding subblock repairing scheme;
the repairing the memory block in the DRAM memory array according to the super block repair scheme includes:
and repairing the storage blocks in the DRAM storage array according to the super block repairing scheme and the sub-block repairing scheme.
Optionally, the superblock repair condition includes repairing all failed superblocks;
the determining whether the memory blocks in the DRAM memory array satisfy the superblock repair condition according to the redundant resources and the failed superblock includes:
acquiring the quantity of redundant resources and the quantity of invalid super block addresses, wherein the quantity of the redundant resources is obtained after statistics according to the addresses of the redundant resources, and the quantity of the invalid super block addresses is determined after matching of the addresses of the super blocks and the invalid addresses;
judging whether the quantity of the redundant resources exceeds the quantity of the failed super block addresses, wherein the quantity of the failed super block addresses is determined based on the super block repairing condition;
if the superblock repair condition is met, generating a corresponding superblock repair scheme, including:
and if the quantity of the redundant resources exceeds the quantity of the invalid super block addresses, generating a corresponding super block repairing scheme.
Optionally, the obtaining the number of redundant resources and the number of failed super block addresses includes:
acquiring all super block addresses in the storage block, and determining invalid super block addresses according to the invalid address information, wherein the invalid super block addresses are addresses matched after comparing addresses in the invalid address information with the super block addresses;
and counting the number of all the failed super block addresses in the storage block as the number of the failed super block addresses.
Optionally, before the determining whether the memory blocks in the DRAM memory array satisfy the sub-block repair condition according to the remaining redundancy resources and the failed sub-block, the method further includes:
and determining resources to be used which meet the super block repairing condition according to the redundant resources and the failed super block, and determining the residual redundant resources according to the resources to be used and the redundant resources.
Optionally, the determining, according to the redundant resource and the failed super block, a resource to be used that meets the super block repair condition, and determining, according to the resource to be used and the redundant resource, the remaining redundant resource includes:
acquiring the number of the invalid super block addresses, and determining the number of resources to be used which meet the super block repairing condition according to the number of the invalid super block addresses;
and calculating the quantity of the residual redundant resources according to the quantity of the redundant resources and the quantity of the resources to be used.
Optionally, the sub-block repair condition includes a sub-block repair number, where the sub-block repair number is at least one;
the determining whether the storage blocks in the DRAM storage array meet the subblock repair condition according to the remaining redundant resources and the failed subblocks includes:
judging whether the quantity of the residual redundant resources exceeds the repair quantity of the subblocks or not;
if the subblock repair condition is met, generating a corresponding subblock repair scheme, including:
and if the quantity of the residual redundant resources exceeds the sub-block repairing quantity, generating a corresponding sub-block repairing scheme.
Optionally, the generating the corresponding super block repair scheme includes:
and matching the failed super block according to the address by using the redundant resource, and generating corresponding first matching information, wherein the first matching information comprises the address of the failed super block and the address of the redundant resource for repairing the failed super block.
Optionally, the generating a corresponding sub-block repair scheme includes:
and matching the failed subblocks according to addresses by using the residual redundant resources, and generating corresponding second matching information, wherein the second matching information comprises the addresses of the failed subblocks and the addresses of the residual redundant resources for repairing the failed subblocks.
Optionally, the repairing the memory block in the DRAM memory array according to the super block repair scheme and the sub-block repair scheme includes:
acquiring the first matching information and the second matching information;
merging the first matching information and the second matching information to obtain repair information;
and repairing the failed super block and the failed sub-block according to addresses by using the redundant resources according to the repair information.
Optionally, at least one of the memory blocks is included in the DRAM memory array;
before said determining whether a memory block in said DRAM memory array satisfies a superblock repair condition based on redundant resources and a failed superblock, said method further comprising:
testing each super block, each sub block and each redundant resource in each storage block in the DRAM storage array to obtain a test result, wherein the test result comprises failure super block information, failure sub block information and redundant resource information;
and determining the redundant resources, the failed super block and the failed sub block according to the test result.
Optionally, after determining whether the memory blocks in the DRAM memory array satisfy the sub-block repair condition according to the remaining redundancy resources and the failed sub-block, the method further includes:
and if the redundant resources meet the super block repair condition and do not meet the sub block repair condition, repairing the storage block in the DRAM storage array according to the super block repair scheme, and outputting prompt information, wherein the prompt information is used for indicating that all super blocks and partial sub blocks of the storage block are repaired.
Optionally, after determining whether a memory block in the DRAM memory array satisfies a super block repair condition according to the redundant resource and the failed super block, the method further includes:
and if the super block repairing condition is not met, generating a super block primary repairing scheme according to the redundant resources, wherein the super block primary repairing scheme is used for completing repairing of a part of the failed super blocks in the storage block by using all the redundant resources.
In a second aspect, an embodiment of the present application provides a repair apparatus for a DRAM memory array, including:
a first determining unit, configured to determine whether a storage block in the DRAM storage array meets a super block repair condition according to a redundant resource and a failed super block, where the super block repair condition is used to determine whether the number of redundant resources in the DRAM storage array meets a repair number of failed super blocks of the storage block, the redundant resource and the failed super block both belong to the storage block, the redundant resource is a storage medium used to repair a failure in the storage block, the storage block includes a super block and a sub-block, and the failed super block is a detected failed super block in the storage block;
the first generating unit is used for generating a corresponding super block repairing scheme if the super block repairing condition is met;
and the repair unit is used for repairing the storage block in the DRAM storage array according to the super block repair scheme.
Optionally, the apparatus further comprises:
a second determining unit, configured to determine whether a storage block in the DRAM storage array satisfies a subblock repair condition according to a remaining redundant resource and a failed subblock, where the remaining redundant resource is a remaining portion of the redundant resource after the redundant resource is removed to satisfy the super-block repair condition;
a second generating unit, configured to generate a corresponding sub-block repair scheme if the sub-block repair condition is met;
the repair unit is further configured to repair the memory block in the DRAM memory array according to the super block repair scheme and the sub-block repair scheme.
Optionally, the superblock repair condition includes repairing all failed superblocks;
the first determination unit includes:
the system comprises an acquisition module, a storage module and a processing module, wherein the acquisition module is used for acquiring the number of redundant resources and the number of failed super block addresses, the number of the redundant resources is obtained after statistics according to the addresses of the redundant resources, and the failed super block data is determined after matching of the addresses of the super blocks and the failed addresses;
the judging module is used for judging whether the redundant resource quantity exceeds the failed super block address quantity, and the failed super block address quantity is determined based on the super block repairing condition;
the first generating unit is specifically configured to generate a corresponding super block repair scheme if the number of the redundant resources exceeds the number of the failed super block addresses.
Optionally, the obtaining module includes:
the determining submodule is used for acquiring all super block addresses in the storage block and determining invalid super block addresses according to the invalid address information, wherein the invalid super block addresses are matched addresses after comparing addresses in the invalid address information with the super block addresses;
and the counting submodule is used for counting the number of all the failed super block addresses in the storage block as the number of the failed super block addresses.
Optionally, the apparatus further comprises:
and the third determining unit is used for determining the resources to be used which meet the super block repairing condition according to the redundant resources and the failed super block, and determining the residual redundant resources according to the resources to be used and the redundant resources.
Optionally, the third determining unit includes:
the determining module is used for acquiring the number of the invalid super block addresses and determining the number of resources to be used which meet the super block repairing condition according to the number of the invalid super block addresses;
and the calculating module is used for calculating the quantity of the residual redundant resources according to the quantity of the redundant resources and the quantity of the resources to be used.
Optionally, the sub-block repair condition includes a sub-block repair number, where the sub-block repair number is at least one;
the second determining unit is specifically configured to determine whether the number of the remaining redundant resources exceeds the repair number of the subblocks;
the second generating unit is specifically configured to generate a corresponding sub-block repair scheme if the number of the remaining redundant resources exceeds the sub-block repair number.
Optionally, the first generating unit is further specifically configured to match the failed super block according to an address by using the redundant resource, and generate corresponding first matching information, where the first matching information includes the address of the failed super block and an address of the redundant resource used to repair the failed super block.
Optionally, the second generating unit is further specifically configured to match the failed subblock according to an address by using the remaining redundant resource, and generate corresponding second matching information, where the second matching information includes the address of the failed subblock and an address of the remaining redundant resource used to repair the failed subblock.
Optionally, the repair unit includes:
the acquisition module is used for acquiring the first matching information and the second matching information;
the merging module is used for merging the first matching information and the second matching information to obtain repair information;
and the repair module is used for repairing the failed super block and the failed sub-block according to addresses by using the redundant resources according to the repair information.
Optionally, at least one of the memory blocks is included in the DRAM memory array;
the device further comprises:
the test unit is used for testing each super block, each subblock and each redundant resource in each storage block in the DRAM storage array and obtaining a test result, wherein the test result comprises failure super block information, failure subblock information and redundant resource information;
a fourth determining unit, configured to determine the redundant resource, the failed super block, and the failed sub block according to the test result.
Optionally, the apparatus further comprises:
and the execution unit is used for repairing the storage block in the DRAM storage array according to the super block repairing scheme and outputting prompt information if the redundant resources meet the super block repairing condition and do not meet the sub block repairing condition, wherein the prompt information is used for indicating that all super blocks and partial sub blocks of the storage block are repaired.
Optionally, the execution unit is further configured to generate a preliminary super block repair scheme according to the redundant resources if the super block repair condition is not satisfied, where the preliminary super block repair scheme is used to complete repair of a part of the failed super blocks in the storage block by using all redundant resources.
In a third aspect, an embodiment of the present invention further provides an electronic device, including at least one processor, and at least one memory and a bus connected to the processor; the processor and the memory complete mutual communication through a bus; the processor is used for calling program instructions in the memory to execute the repair method of any one DRAM storage array in the first aspect.
In a fourth aspect, the present invention further provides a computer-readable storage medium, on which a program is stored, where the program, when executed by a processor, implements the repair method for a DRAM memory array according to any one of the first aspects.
Compared with the prior art, the logic chip capacitor circuit provided by the embodiment of the invention at least has the following beneficial effects:
the embodiment of the invention provides a method for repairing a DRAM memory array and related equipment, wherein the method comprises the following steps: determining whether a storage block in the DRAM storage array meets a super block repair condition according to redundant resources and a failed super block; if the super block repairing condition is met, generating a corresponding super block repairing scheme; and repairing the memory blocks in the DRAM memory array according to the super block repairing scheme, thereby realizing the repairing function of the DRAM memory array. In the above scheme, the super block repair condition is used to determine whether the number of redundant resources in the DRAM memory array satisfies the repair number of failed super blocks of the memory block, the redundant resources and the failed super blocks both belong to the memory block, the redundant resources are storage media used to repair failures in the memory block, the memory block includes a super block and a sub-block, and the failed super block is a super block that has been detected to have failed in the memory block, so that in the repair process, when the number of redundant resources satisfies the repair number of failed super blocks, a super block repair scheme can be generated and the DRAM memory array can be repaired based on the super block repair scheme, thereby ensuring that the repair of a chip can be ensured when the redundant resources satisfy the super block repair condition in the repair process, and thus ensuring that the chip with repaired super block can also be used as a normal chip, therefore, the yield of the product is improved, and the problem of low yield in the conventional repair process at present is solved.
Correspondingly, other related devices provided by the embodiment of the invention also have the technical effects.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present application, and other drawings can be obtained by those skilled in the art without inventive efforts based on these drawings:
FIG. 1 is a flowchart illustrating steps of a method for repairing a DRAM memory array according to an embodiment of the present invention;
FIG. 2-A is a schematic diagram of a DRAM memory array according to an embodiment of the present invention;
FIG. 2-B is a schematic flow chart of a DRAM memory array during a specific repair process according to an embodiment of the present invention;
FIG. 2-C is a schematic flow chart of another DRAM memory array in a specific repair process according to an embodiment of the present invention;
FIG. 3 is a schematic block diagram of a repairing apparatus for a DRAM memory array according to an embodiment of the present invention;
FIG. 4 is a block diagram of another exemplary repairing apparatus for a DRAM memory array according to an embodiment of the present invention;
fig. 5 is a schematic structural block diagram of an electronic device according to an embodiment of the present invention;
fig. 6 is a schematic structural block diagram of a computer-readable storage medium according to an embodiment of the present invention.
Detailed Description
The present invention is further described in detail below with reference to the drawings and examples so that those skilled in the art can practice the invention with reference to the description.
It will be understood that terms such as "having," "including," and "comprising," as used herein, do not preclude the presence or addition of one or more other elements or groups thereof.
In addition, it should be noted that the terms "disposed" and "connected" are to be construed broadly unless otherwise explicitly stated or limited. For example, the connection can be fixed connection or detachable connection; can be directly connected or indirectly connected through an intermediate medium; either integrally connected or communicating between the interior of the two components. Or the two elements may perform signal transmission and data communication. The specific meaning of the above terms in the present application can be understood by those of ordinary skill in the art as appropriate.
In a first aspect, an embodiment of the present application provides a method for repairing a DRAM memory array, which solves the problem of yield loss caused by a memory array repair process in the prior art, and implementation steps of a specific scheme may be as shown in fig. 1, where the implementation steps include:
101. and determining whether the storage blocks in the DRAM storage array meet the super block repair condition according to the redundant resources and the failed super block.
The super block repair condition is used for judging whether the number of redundant resources in the DRAM storage array meets the repair number of failed super blocks of the storage block, the redundant resources and the failed super blocks both belong to the storage block, the redundant resources are storage media used for repairing failure in the storage block, the storage block comprises super blocks and sub blocks, and the failed super blocks are the detected failed super blocks in the storage block.
102. And if the super block repairing conditions are met, generating a corresponding super block repairing scheme.
103. And repairing the memory blocks in the DRAM memory array according to the super block repair scheme.
In the above scheme, the DRAM memory array may be as shown in fig. 2-a, where BANK0-BANK3 are memory blocks, sub-blocks 0 to 21 are normal sub-blocks, and sub-blocks 22 to 23 are super-blocks. Meanwhile, the redundant resource, the failed super block and the failed sub block are all in one BANK in the DRAM storage array, namely in the storage block. Since a DRAM memory array contains at least one memory block. That is, it is understood in the repair process that the above-described operations can be performed for each memory block in the DRAM array.
In step 101, when it is determined that the redundant resources can satisfy the superblock repair condition, the repair may be performed based on the number of the redundant resources and the number of required repairs or the repair rule in the superblock repair condition, for example, when a user needs to determine that all superblocks are valid, the superblock repair condition in this step may be that all superblocks are normal, so that during actual execution, a failed superblock in a storage block may be traversed, and then it is determined whether the number of the redundant resources in each storage block can satisfy the address number of the failed superblock. Of course, in some cases, if the user does not need all the failed superblocks to be repaired, a threshold may be set, so as to perform the above determination according to the threshold. Specifically, the method in this step includes, but is not limited to, the above-mentioned manner, and the specific situation may be selected based on the actual needs of the user.
In addition, when step 102 is executed, when step 101 determines that the redundant resource can meet the superblock repair condition, a repair scheme corresponding to the superblock, that is, the superblock repair scheme, may be generated. Of course, in a specific application, the usage of the redundant resource may also be determined based on the repair scheme, so as to be used in other subsequent steps, and the specific situation may be determined according to actual needs.
For example, in the implementation process of the foregoing scheme, it may also relate to a situation that a sub-block needs to be repaired on the basis of repairing a super-block, that is, a failed super-block needs to be repaired by using redundancy resources, and the foregoing scheme may therefore include, before the foregoing scheme step 103 is executed: and determining whether the storage blocks in the DRAM storage array meet the subblock repair condition or not according to the residual redundant resources and the failed subblocks, wherein the residual redundant resources are the residual parts of the redundant resources after the redundant resources are removed and meet the super subblock repair condition.
And if the subblock repairing conditions are met, generating a corresponding subblock repairing scheme.
Based on this, the repairing the memory block in the DRAM memory array according to the super block repair scheme in step 103 may specifically include:
and repairing the storage blocks in the DRAM storage array according to the super block repairing scheme and the sub-block repairing scheme.
After determining that the redundant resources can meet the repair requirement for the failed super block in the DRAM memory array in the previous step, it is further required to determine whether the remaining redundant resources can meet the repair requirement for the failed sub block, i.e., determine whether the remaining redundant resources meet the sub block repair condition. The basis of the judgment in the step is the residual redundant resource, so that the repairing requirements of the super block and the common subblock can be considered in the repairing process of the DRAM storage array, and the judgment basis is the residual redundant resource after the repairing condition of the super block is met but not the original redundant resource after the redundant resource is determined to meet the repairing condition of the super block and the repairing condition of the subblock is determined to meet the repairing condition of the subblock, so that the repairing result is ensured to be real and effective, the repairing result is ensured to be consistent with the judgment expectation, and the accuracy of the repairing result of the DRAM storage array is improved. Meanwhile, based on the method, the repairing process is carried out based on the superblock repairing condition and the subblock repairing condition, so that the corresponding repairing condition can be set according to the needs of a user in the repairing process, the repairing result meets different repairing requirements, and the method disclosed by the invention has better flexibility.
For example, under certain conditions, the repair condition of a superblock may be that all superblocks are required to be repaired, and thus, in the foregoing example, the superblock repair condition may include that all failed superblocks are repaired. Based on this, in step 101, it is determined whether the memory block in the DRAM memory array satisfies the super block repair condition according to the redundant resource and the failed super block, and the specific execution may be:
first, the number of redundant resources and the number of failed super block addresses are obtained. The number of the redundant resources is obtained by counting according to the addresses of the redundant resources, and the number of the failed super block addresses is determined by matching the addresses of the super blocks with the failed addresses.
Then, whether the redundant resource quantity exceeds the failure super block address quantity is judged, and the failure super block address quantity is determined based on the super block repairing condition.
Corresponding to the above specific implementation manner of step 101, in step 102, if the superblock repair condition is satisfied, the corresponding superblock repair scheme is generated, which may specifically be: and if the quantity of the redundant resources exceeds the quantity of the invalid super block addresses, generating a corresponding super block repairing scheme.
Therefore, when the super block repairing condition is that all the super blocks are repaired, whether the redundant resource quantity can exceed the invalid super block address quantity or not can be determined by comparing the redundant resource quantity with the invalid super block address quantity, and the repairing result is judged in a quantitative mode, so that the repairing process is more visual and accurate.
For example, for the implementation manner of acquiring the number of redundant resources and the number of failed super block addresses in the foregoing example, the implementation manner may include:
firstly, all super block addresses in the storage blocks are obtained, and invalid super block addresses are determined according to the invalid address information. And the failed super block address is an address matched after the address in the failed address information is compared with the super block address. In this example, the fail address information may be acquired from a machine dedicated to chip fail testing. Meanwhile, the mode of determining the failed super block address according to the failed address information can be that all the failed addresses are matched with each super block address one by one, and if the matching is successful, the super block corresponding to the successfully matched super block address is failed.
Then, counting the number of all the failed super block addresses in the storage block as the number of the failed super block addresses.
By matching the super block address with the failure address information, the number of the failure super block addresses is determined and then counted to serve as the number of the failure super block addresses, the number of the failure super block addresses in the storage block can be accurately determined, and a foundation is laid for the subsequent execution of corresponding repair operation.
For example, in some embodiments, after determining that the redundant resource satisfies the super block repair condition, it may actually determine how much of the redundant resource is used to repair the failed super block, that is, it can determine how much of the redundant resource is used to repair the portion of the super block, and how much of the redundant resource is left, so before performing step 103 to determine whether the memory block in the DRAM memory array satisfies the sub-block repair condition according to the remaining redundant resource and the failed sub-block, the method may further include a process of determining resources to be used and the remaining redundant resource, specifically:
and determining resources to be used which meet the super block repairing condition according to the redundant resources and the failed super block, and determining the residual redundant resources according to the resources to be used and the redundant resources.
Therefore, the superblock needing to be repaired can be determined based on superblock repairing conditions, meanwhile, as the repair of the redundant resources to the failed superblock is corresponding, resources to be used can be directly determined, the redundant resources left after the resources to be used which meet the requirements of superblock repair are determined, and then judgment basis is provided for repairing the subblocks by subsequently utilizing the left redundant resources.
For example, in the foregoing example, the resource to be used that meets the superblock repair condition is determined according to the redundant resource and the failed superblock, and the remaining redundant resource is determined according to the resource to be used and the redundant resource, and the method may be specifically performed in the following manner during execution:
firstly, acquiring the number of the failed super block addresses, and determining the number of resources to be used which meet the super block repairing condition according to the number of the failed super block addresses;
and then, calculating the quantity of the residual redundant resources according to the quantity of the redundant resources and the quantity of the resources to be used.
Therefore, the residual situation of the redundant resources after the super block repairing condition is met, namely the residual redundant resource quantity, is determined quantitatively, so that the subsequent analysis in quantity can be ensured when whether the residual redundant resources can meet the sub block repairing condition is judged, and the convenience of the judging process is ensured.
For example, in some embodiments, since the sub-block repair condition may be at least the number of failed sub-blocks repaired, the sub-block repair condition may include a sub-block repair number, the sub-block repair number being at least one;
based on this, in the foregoing step 103, determining whether the memory block in the DRAM memory array satisfies the subblock repair condition according to the remaining redundant resources and the failed subblock, which may be specifically performed as follows: and judging whether the quantity of the residual redundant resources exceeds the sub-block repair quantity.
Similarly, if the sub-block repairing condition is satisfied in the foregoing step 104, a corresponding sub-block repairing scheme is generated, and the specific execution may be:
and if the quantity of the residual redundant resources exceeds the sub-block repairing quantity, generating a corresponding sub-block repairing scheme.
The judgment process is carried out based on the quantity of the residual redundant resources and the repair quantity of the subblocks, so that the quantity form is used as a judgment basis for judging the subsequent repair, the analysis can be carried out more intuitively and simply, the accuracy of a prediction result is further ensured, and a foundation is laid for the accuracy of the subsequent repair based on the prejudgment.
For example, when repairing a DRAM memory array, the redundant resources and the failed super block or sub-block are actually repaired one-to-one according to addresses, that is, in the process of generating the repair scheme, the address of each failed storage medium is actually matched with the address of the redundant resources to be repaired.
Based on this, the generating of the corresponding superblock repair scenario in the foregoing example may specifically be, when executed:
and matching the failed super block according to the address by using the redundant resource, and generating corresponding first matching information. The first matching information comprises the address of the failed super block and the address of the redundant resource used for repairing the failed super block.
Therefore, the redundant resources are matched with the failed superblocks according to the addresses, so that corresponding first matching information is obtained, the first matching information comprises the addresses of all the failed superblocks and the addresses of the redundant resources for repair, the corresponding repair operation can be executed according to the first matching information, and meanwhile, the backtracking and analysis can be carried out based on the first matching information if abnormity or other problems exist in the repair process.
For example, the sub-block repair scheme is similar to that described in the foregoing example, so that the generation of the corresponding sub-block repair scheme in the foregoing example may specifically be performed as follows:
and matching the failed sub-blocks according to addresses by using the residual redundant resources, and generating corresponding second matching information. The second matching information comprises the address of the failed subblock and the address of the residual redundant resource for repairing the failed subblock.
The second matching information contains the address of the failed sub-block and the corresponding address for repairing the failed residual redundant resource, so that the execution based on the second matching information in the subsequent repairing process is ensured, and a foundation is laid for the subsequent repairing operation. Meanwhile, the second matching information can also be used as the basis for follow-up problem and troubleshooting and backtracking when problems or abnormalities exist in the follow-up repairing process.
For example, the step 105 of repairing the memory block in the DRAM memory array according to the super block repair scheme and the sub-block repair scheme may include:
firstly, acquiring the first matching information and the second matching information;
then, combining the first matching information and the second matching information to obtain repair information;
and finally, repairing the failed super block and the failed sub-block according to addresses by using the redundant resources according to the repair information.
The merged repair information comprises the first matching information for repairing the super block and the second matching information for repairing the sub block, so that the condition that only one piece of information is used for repairing during subsequent repair is ensured, and the operation complexity in the repair process is simplified.
Illustratively, at least one of the memory blocks is included in a DRAM memory array. Meanwhile, in this embodiment, before repairing the DRAM memory array, the failed memory medium existing in the DRAM may be determined first, that is, each memory block is tested to obtain the failed super block and the failed sub block which need to be repaired, and the redundant resource which can repair the two. Therefore, before determining whether a memory block in the DRAM memory array satisfies a super block repair condition according to a redundant resource and a failed super block in step 101, the method of this example may further include:
firstly, testing each super block, each sub block and each redundant resource in each storage block in the DRAM storage array to obtain a test result, wherein the test result comprises failure super block information, failure sub block information and redundant resource information;
then, the redundant resources, the failed super block and the failed sub block are determined according to the test result.
It should be noted that, in this example, the test process may be performed by using a machine dedicated for chip testing, and the specific test process may be: firstly, addresses can be distributed, the addresses of a super block in a BANK (storage block) of a DRAM are distributed to a super block address test, the addresses of all redundant resources in the storage block are distributed to a redundant resource address test, and the space of a machine failure address storage is distributed according to the size of an array to be tested to record failure addresses generated in the test process; and then, testing the super block which is distributed in the step and is tested at the super block address, recording the failure part in the testing process in a failure address memory, similarly testing other sub-blocks and recording the other sub-blocks in the failure address memory, and traversing all the storage blocks to obtain a testing result.
Therefore, the test result is obtained through the pre-test, the redundant resource, the failure super block and the failure sub block are determined according to the test result, and a foundation can be laid for subsequently determining each part (the redundant resource, the failure super block and the failure sub block) in each storage block.
For example, in some cases, there may be a case where a user does not satisfy the sub-block repair condition after ensuring that all the failed super blocks are repaired, and at this time, since there may be a repair requirement that only a part of the failed sub-blocks are repaired because there is not high chip requirement, in this case, after determining whether the storage blocks in the DRAM storage array satisfy the sub-block repair condition according to the remaining redundancy resources and the failed sub-blocks in step 103, the method further includes:
and if the redundant resources meet the super block repair condition and do not meet the sub block repair condition, repairing the storage block in the DRAM storage array according to the super block repair scheme, and outputting prompt information, wherein the prompt information is used for indicating that all super blocks and partial sub blocks of the storage block are repaired.
Illustratively, in some cases, it may also be referred to a case that the redundant resource does not satisfy the repair condition of the failed super block, but still needs to be repaired as much as possible by using the current redundant resource, so after the foregoing step determines whether the memory block in the DRAM memory array satisfies the super block repair condition according to the redundant resource and the failed super block, the method further includes:
and if the super block repairing condition is not met, generating a super block primary repairing scheme according to the redundant resources, wherein the super block primary repairing scheme is used for completing repairing of a part of the failed super blocks in the storage block by using all the redundant resources.
Therefore, the function of repairing partial failure super blocks when the redundant resources do not meet the super block repairing conditions can be ensured, the effect of repairing partial failure super blocks when the redundant resources are less can be achieved, and the repairing requirements of some special scenes are met.
Further, as a specific implementation procedure of the method, an embodiment of the present invention further provides a specific repair procedure of the DRAN, which may be specifically shown in fig. 2-B, where the repair procedure includes:
s100, starting to execute;
s110, super block testing, namely testing the storage array to determine the quantity of redundant resources and the quantity of failed super blocks;
s120, whether the data can be repaired or not is judged, namely whether the redundant resources in each storage block in the current DRAM storage array meet the super block repairing condition or not is judged in sequence;
s130, repairing the redundant resources, namely performing primary repair by using all the current redundant resources when the condition for repairing the super block is determined not to be met;
s140, generating a repair file, namely generating a superblock repair scheme corresponding to the current storage block when the superblock repair condition is determined to be met;
s150, testing the whole array, namely traversing and analyzing all the storage blocks in sequence;
s160, whether the data can be repaired or not is judged, namely whether all the storage blocks in the whole DRAM storage array meet the super block repairing condition or not is analyzed in sequence;
s170, repairing the redundant resources, namely repairing the partially failed super block which can be repaired by utilizing the existing redundant resources if the judgment result of the step S150 is not met;
s180, generating a repair file, namely if all storage blocks in the storage array are determined to meet the super block repair condition, generating repair schemes corresponding to all storage blocks
And S190, finishing, namely executing the repairing operation according to the repairing scheme.
In addition, in practical application, on the basis of the above scheme, a process of analyzing and determining the subblocks may also be involved, so that this embodiment further provides another repair process of the DRAM memory array, which may be specifically as shown in fig. 2-C, where the repair process includes:
s200, starting;
s210, determining super block addresses, namely counting all the super block addresses and the number in the DRAM storage array;
s220, counting failure addresses, and distributing redundancy resources, namely counting all failure super blocks and failure sub blocks in the DRAM storage array;
s230, judging whether the redundant resources can be repaired or not, namely judging whether the redundant resources meet the super block repair condition or not;
s240, repairing the super block by using all redundant resources to generate a repair file, namely repairing the partially failed super block by using the current redundant resources when the step S230 determines that the redundant resources cannot meet the super block repair condition;
s250, preferentially using the redundant resources to which the super blocks belong to repair, and generating a repair file, namely preferentially using the redundant resources to which the super blocks belong to match and generating a corresponding super block repair scheme when the step S230 determines that the redundant resources can meet the super block repair conditions;
s260, determining the address of the secondary subblock, namely determining subblocks except the super block;
s270, counting failure addresses, distributing redundant resources, counting failure sub-blocks in the sub-blocks, and determining residual redundant resources based on a super block repair scheme;
s280, judging whether the sub-block can be repaired or not, namely judging whether the residual redundant resources meet the sub-block repair condition or not;
s290, repairing the failure addresses except the super block by using the redundant resources to generate a repair file, namely generating a repair scheme according to the residual redundant resources and the failure sub block when the residual redundant resources are determined to meet the sub block repair condition;
s300, repairing the super block by using all redundant resources to generate a repair file, namely, performing primary repair on partial failure sub blocks according to the residual redundant resources when the fact that the residual redundant resources do not meet the sub block repair condition is determined;
s310, combining the super block and the repair files of other addresses, namely generating an overall repair scheme of the DRAM storage array according to the super block repair scheme generated in the step S250 and the sub block repair scheme generated in the step S290;
s320, writing the repair scheme into the chip, and enabling the repair to be effective, namely repairing according to the integral repair scheme of the S310;
and S330, ending.
Based on the repairing process, the corresponding repairing modes can be completed under different conditions, and the corresponding repairing process can be executed according to the actual needs of users, so that the repairing functions of the DRAM storage array in various modes are realized, and different repairing requirements of the users are met.
In a second aspect, based on the same inventive concept of the method described above, an embodiment of the present specification further provides a repair apparatus for a DRAM memory array, where the functions and effects implemented by the repair apparatus are as in the method of the first aspect, and the processes executed by the repair apparatus are not repeated here, and for example, the repair apparatus is shown in fig. 3, where the repair apparatus includes:
a first determining unit 31, configured to determine whether a storage block in the DRAM storage array meets a super block repair condition according to a redundant resource and a failed super block, where the super block repair condition is used to determine whether the number of redundant resources in the DRAM storage array meets a repair number of failed super blocks of the storage block, the redundant resource and the failed super block both belong to the storage block, the redundant resource is a storage medium that can be used to repair a failure in the storage block, the storage block includes a super block and a sub block, and the failed super block is a detected failed super block in the storage block;
a first generating unit 32, configured to generate a corresponding super block repair scheme if the first determining unit 31 determines that the super block repair condition is met;
the repair unit 33 may be configured to repair the memory block in the DRAM memory array according to the super block repair scheme generated by the first generation unit 32.
Optionally, as shown in fig. 4, the apparatus further includes:
a second determining unit 34, configured to determine whether a memory block in the DRAM memory array satisfies a subblock repair condition according to a remaining redundant resource and a failed subblock, where the remaining redundant resource is a remaining portion of the redundant resource after the redundant resource is removed to satisfy the super-block repair condition;
a second generating unit 35, configured to generate a corresponding sub-block repair scheme if the second determining unit 34 determines that the sub-block repair condition is met;
the repair unit 33 may be further configured to repair the memory block in the DRAM memory array according to the super block repair scheme generated by the first generation unit 32 and the sub-block repair scheme generated by the second generation unit 35.
Optionally, as shown in fig. 4, the superblock repair condition includes repairing all failed superblocks;
the first determining unit 31 includes:
the obtaining module 311 may be configured to obtain the number of redundant resources and the number of failed super block addresses, where the number of redundant resources is obtained by statistics according to addresses of the redundant resources, and the failed super block data is determined after matching the address of the super block and the failed address;
a determining module 312, configured to determine whether the amount of the redundant resources acquired by the acquiring module 311 exceeds the number of failed super block addresses, where the number of failed super block addresses is determined based on the super block repair condition;
the first generating unit 32 may be specifically configured to generate a corresponding super block repair scheme if the number of the redundant resources exceeds the number of the failed super block addresses.
Optionally, as shown in fig. 4, the obtaining module 311 includes:
the determining sub-module 3111 is configured to obtain all super block addresses in the storage block, and determine a failed super block address according to the failed address information, where the failed super block address is an address matched after comparing an address in the failed address information with the super block address;
the counting sub-module 3112 may be configured to count the number of failed super block addresses determined by the determining sub-module 3111 in all the storage blocks, as the number of failed super block addresses.
Optionally, as shown in fig. 4, the apparatus further includes:
the third determining unit 36 may be configured to determine, according to the redundant resource and the failed super block, a resource to be used that meets the super block repair condition, and determine the remaining redundant resource according to the resource to be used and the redundant resource, so that the second determining unit 34 performs determination according to the remaining redundant resource.
Optionally, as shown in fig. 4, the third determining unit 36 includes:
the determining module 361 may be configured to obtain the number of the failed super block addresses, and determine, according to the number of the failed super block addresses, the number of resources to be used that satisfy the super block repair condition;
the calculating module 362 may be configured to calculate the remaining number of redundant resources according to the number of redundant resources and the number of resources to be used determined by the determining module 361.
Optionally, as shown in fig. 4, the sub-block repair condition includes a sub-block repair number, where the sub-block repair number is at least one;
the second determining unit 34 may be specifically configured to determine whether the number of the remaining redundant resources exceeds the sub-block repair number;
the second generating unit 35 may be specifically configured to generate a corresponding sub-block repair scheme if the number of the remaining redundant resources exceeds the sub-block repair number.
Optionally, as shown in fig. 4, the first generating unit 32 may be further specifically configured to match the failed super block according to an address by using the redundant resource, and generate corresponding first matching information, where the first matching information includes the address of the failed super block and an address of the redundant resource that can be used to repair the failed super block.
Optionally, as shown in fig. 4, the second generating unit 35 may be further specifically configured to match the failed sub-block according to an address by using the remaining redundant resources, and generate corresponding second matching information, where the second matching information includes the address of the failed sub-block and an address of the remaining redundant resources that may be used to repair the failed sub-block.
Optionally, as shown in fig. 4, the repair unit 33 includes:
an obtaining module 331, configured to obtain the first matching information and the second matching information;
a merging module 332, configured to merge the first matching information and the second matching information acquired by the acquiring module 331 to obtain repair information;
the repairing module 333 may be configured to repair the failed super block and the failed sub block according to an address by using the redundant resource according to the repairing information obtained by the merging module 332.
Optionally, as shown in fig. 4, at least one of the memory blocks is included in the DRAM memory array;
the device further comprises:
a test unit 37, configured to test each super block, each sub block, and each redundant resource in each memory block in the DRAM memory array, and obtain a test result, where the test result includes information of a failed super block, information of a failed sub block, and information of a redundant resource;
the fourth determining unit 38 may be configured to determine the redundant resource, the failed super block, and the failed sub block according to the obtained test result of the testing unit 37, so that the first determining unit 31 performs a determination based on the redundant resource.
Optionally, as shown in fig. 4, the apparatus further includes:
the execution unit 39 may be configured to repair the memory block in the DRAM memory array according to the super block repair scheme and output a prompt message if the second determination unit 34 determines that the redundant resources satisfy the super block repair condition and do not satisfy the sub block repair condition, where the prompt message may be used to indicate that all super blocks and some sub blocks of the memory block have been repaired.
Optionally, as shown in fig. 4, the executing unit 39 may be further specifically configured to generate a preliminary super block repair scheme according to the redundant resources if the first determining unit 31 determines that the redundant resources do not satisfy the super block repair condition, where the preliminary super block repair scheme is used to complete repair of a part of the failed super blocks in the storage block by using all the redundant resources.
Fig. 5 is a schematic diagram illustrating a partial structure of a repair apparatus for a DRAM memory array according to an embodiment of the present invention. The apparatus of the repair apparatus for a DRAM memory array includes a memory 501, and the memory 501 is used for storing a program for executing the method in the foregoing first embodiment. The apparatus of the repair device for a DRAM memory array further comprises a processor 502 coupled to the memory 501, the processor 502 configured to execute a program stored in the memory 501.
The processor 502, when executing the computer program, implements the steps of the method of repairing a DRAM memory array in the first embodiment described above. Alternatively, the processor implements the functions of the modules/units in the device of the repair device for a DRAM memory array of the second embodiment described above when executing the computer program.
Illustratively, the present embodiment further provides a computer-readable storage medium, as shown in fig. 6, on which a computer program 601 is stored, and the computer program 601, when executed by a processor, implements the method for repairing a DRAM memory array according to any of the embodiments of the first aspect.
The embodiment provides a method for repairing a DRAM memory array and related equipment, wherein the method comprises the following steps: determining whether a storage block in the DRAM storage array meets a super block repair condition according to redundant resources and a failed super block; if the super block repairing condition is met, generating a corresponding super block repairing scheme; and repairing the memory blocks in the DRAM memory array according to the super block repairing scheme, thereby realizing the repairing function of the DRAM memory array. In the above scheme, the super block repair condition is used to determine whether the number of redundant resources in the DRAM memory array satisfies the repair number of failed super blocks of the memory block, the redundant resources and the failed super blocks both belong to the memory block, the redundant resources are storage media used to repair failures in the memory block, the memory block includes a super block and a sub-block, and the failed super block is a super block that has been detected to have failed in the memory block, so that in the repair process, when the number of redundant resources satisfies the repair number of failed super blocks, a super block repair scheme can be generated and the DRAM memory array can be repaired based on the super block repair scheme, thereby ensuring that the repair of a chip can be ensured when the redundant resources satisfy the super block repair condition in the repair process, and thus ensuring that the chip with repaired super block can also be used as a normal chip, therefore, the yield of the product is improved, and the problem of low yield in the conventional repair process at present is solved.
In the present invention, unless otherwise expressly stated or limited, the terms "mounted," "connected," "secured," and the like are to be construed broadly and can, for example, be fixedly connected, detachably connected, or integrally formed; may be mechanically coupled, may be electrically coupled or may be in communication with each other; they may be directly connected or indirectly connected through intervening media, or they may be connected internally or in any other suitable relationship, unless expressly stated otherwise. The specific meanings of the above terms in the present invention can be understood by those skilled in the art according to specific situations.
While embodiments of the invention have been disclosed above, it is not limited to the applications set forth in the description and the embodiments, which are fully applicable in various fields of endeavor to which the invention pertains, and further modifications may readily be made by those skilled in the art, it being understood that the invention is not limited to the details shown and described herein without departing from the general concept defined by the appended claims and their equivalents.

Claims (10)

1. A method of repairing a DRAM memory array, comprising:
determining whether a storage block in the DRAM storage array meets a super block repair condition according to redundant resources and a failed super block, wherein the super block repair condition is used for judging whether the number of the redundant resources in the DRAM storage array meets the repair number of the failed super block of the storage block, the redundant resources and the failed super block both belong to the storage block, the redundant resources are storage media used for repairing failure in the storage block, the storage block comprises the super block and sub blocks, and the failed super block is a detected failed super block in the storage block;
if the super block repairing condition is met, generating a corresponding super block repairing scheme;
and repairing the memory blocks in the DRAM memory array according to the super block repair scheme.
2. The method of claim 1, wherein prior to said repairing said memory block in said DRAM memory array according to said super-block repair scheme, said method further comprises:
determining whether a storage block in the DRAM storage array meets a subblock repairing condition or not according to a residual redundant resource and a failed subblock, wherein the residual redundant resource is the residual part of the redundant resource after the redundant resource is removed and meets the super block repairing condition, and the failed subblock is the failed subblock in the storage block;
if the subblock repairing conditions are met, generating a corresponding subblock repairing scheme;
the repairing the memory block in the DRAM memory array according to the super block repair scheme includes:
and repairing the storage blocks in the DRAM storage array according to the super block repairing scheme and the sub-block repairing scheme.
3. The method of claim 2, wherein the superblock repair condition includes repairing all failed superblocks;
the determining whether the memory blocks in the DRAM memory array satisfy the superblock repair condition according to the redundant resources and the failed superblock includes:
acquiring the number of redundant resources and the number of failed super block addresses, wherein the number of the redundant resources is obtained after statistics according to the addresses of the redundant resources, and the failed super block data is determined after matching the addresses of the super blocks and the failed addresses;
judging whether the quantity of the redundant resources exceeds the quantity of the failed super block addresses, wherein the quantity of the failed super block addresses is determined based on the super block repairing condition;
if the superblock repair condition is met, generating a corresponding superblock repair scheme, including:
and if the quantity of the redundant resources exceeds the quantity of the invalid super block addresses, generating a corresponding super block repairing scheme.
4. The method of claim 3, wherein obtaining the number of redundant resources and the number of failed super block addresses comprises:
acquiring all super block addresses in the storage block, and determining invalid super block addresses according to the invalid address information, wherein the invalid super block addresses are addresses matched after comparing addresses in the invalid address information with the super block addresses;
and counting the number of all the failed super block addresses in the storage block as the number of the failed super block addresses.
5. The method of claim 2, wherein prior to the determining whether a memory block in the DRAM memory array satisfies a subblock repair condition based on remaining redundant resources and failed subblocks, the method further comprises:
and determining resources to be used which meet the super block repairing condition according to the redundant resources and the failed super block, and determining the residual redundant resources according to the resources to be used and the redundant resources.
6. The method of claim 5, wherein the determining the resources to be used that satisfy the superblock repair condition according to the redundant resources and the failed superblock, and the determining the remaining redundant resources according to the resources to be used and the redundant resources comprises:
acquiring the number of the invalid super block addresses, and determining the number of resources to be used which meet the super block repairing condition according to the number of the invalid super block addresses;
and calculating the quantity of the residual redundant resources according to the quantity of the redundant resources and the quantity of the resources to be used.
7. The method of claim 6, wherein the sub-block repair condition comprises a sub-block repair number, the sub-block repair number being at least one;
the determining whether the storage blocks in the DRAM storage array meet the subblock repair condition according to the remaining redundant resources and the failed subblocks includes:
judging whether the quantity of the residual redundant resources exceeds the repair quantity of the subblocks or not;
if the subblock repair condition is met, generating a corresponding subblock repair scheme, including:
and if the quantity of the residual redundant resources exceeds the sub-block repairing quantity, generating a corresponding sub-block repairing scheme.
8. A repair apparatus for a DRAM memory array, comprising:
a first determining unit, configured to determine whether a storage block in the DRAM storage array meets a super block repair condition according to a redundant resource and a failed super block, where the super block repair condition is used to determine whether the number of redundant resources in the DRAM storage array meets a repair number of failed super blocks of the storage block, the redundant resource and the failed super block both belong to the storage block, the redundant resource is a storage medium used to repair a failure in the storage block, the storage block includes a super block and a sub-block, and the failed super block is a detected failed super block in the storage block;
the first generating unit is used for generating a corresponding super block repairing scheme if the super block repairing condition is met;
and the repair unit is used for repairing the storage block in the DRAM storage array according to the super block repair scheme.
9. An electronic device comprising a processor and a memory coupled to the processor, the processor being configured to invoke program instructions in the memory to perform the method of repairing a DRAM memory array of any of claims 1 to 7.
10. A computer-readable storage medium, having stored thereon a program which, when executed by a processor, implements the method of repairing a DRAM memory array of any of claims 1 to 7.
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114333941A (en) * 2021-12-15 2022-04-12 西安紫光国芯半导体有限公司 Three-dimensional stacked memory chip, data read-write method and electronic equipment

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1717749A (en) * 2002-12-20 2006-01-04 飞思卡尔半导体公司 Self-repair of memory arrays using preallocated redundancy (PAR) architecture
CN1823392A (en) * 2003-07-15 2006-08-23 尔必达存储器株式会社 Semiconductor storage device
CN105095026A (en) * 2015-08-31 2015-11-25 小米科技有限责任公司 Superblock repair method and apparatus for EXT file system and intelligent device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1717749A (en) * 2002-12-20 2006-01-04 飞思卡尔半导体公司 Self-repair of memory arrays using preallocated redundancy (PAR) architecture
CN1823392A (en) * 2003-07-15 2006-08-23 尔必达存储器株式会社 Semiconductor storage device
CN105095026A (en) * 2015-08-31 2015-11-25 小米科技有限责任公司 Superblock repair method and apparatus for EXT file system and intelligent device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114333941A (en) * 2021-12-15 2022-04-12 西安紫光国芯半导体有限公司 Three-dimensional stacked memory chip, data read-write method and electronic equipment
CN114333941B (en) * 2021-12-15 2023-11-10 西安紫光国芯半导体有限公司 Three-dimensional stacked memory chip, data read-write method and electronic equipment

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