CN112882973B - Method and device for determining expansion slot position, storage medium and electronic equipment - Google Patents

Method and device for determining expansion slot position, storage medium and electronic equipment Download PDF

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CN112882973B
CN112882973B CN202110144437.2A CN202110144437A CN112882973B CN 112882973 B CN112882973 B CN 112882973B CN 202110144437 A CN202110144437 A CN 202110144437A CN 112882973 B CN112882973 B CN 112882973B
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expansion
level signal
host
signal value
slot
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CN112882973A (en
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王淑瑶
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Zhejiang Dahua Technology Co Ltd
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Zhejiang Dahua Technology Co Ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/40Bus structure
    • G06F13/4004Coupling between buses
    • G06F13/4027Coupling between buses using bus bridges
    • G06F13/404Coupling between buses using bus bridges with address mapping
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/382Information transfer, e.g. on bus using universal interface adapter
    • G06F13/385Information transfer, e.g. on bus using universal interface adapter for adaptation of a particular data processing system to different peripheral devices

Abstract

The invention discloses a method and a device for determining an expansion slot position, a storage medium and electronic equipment. Wherein the method comprises the following steps: the method comprises the steps that a group of host address bits on a host of an acquisition station are respectively connected with a group of expansion address bits on each expansion slot bit in a group of expansion slot bits in a staggered cascade mode, and level signal values on the group of expansion address bits on each expansion slot bit are different preset level signal values, so that first level signal values on a first group of expansion address bits on a first expansion slot bit in the group of expansion slot bits are obtained; under the condition that the first level signal value is the same as the first preset level signal value, the corresponding expansion host is inserted into the first expansion slot, the purpose of directly determining the expansion host inserted into the slot according to address bit information is achieved, and the technical problem that the determination mode of the expansion slot is single in the prior art is solved.

Description

Method and device for determining expansion slot position, storage medium and electronic equipment
Technical Field
The invention relates to the technical field of single-chip microcomputer, in particular to a method and a device for determining an expansion slot position, a storage medium and electronic equipment.
Background
In current law enforcement management systems, law enforcement instrument data acquisition stations mainly have two important functions: 1. charging a law enforcement recorder; 2. and uploading video information of the law enforcement recorder to the acquisition station through data. The data acquisition station of the early law enforcement instrument has a complex structure and a huge volume, the number of the abutted law enforcement instruments is fixed, the data acquisition station cannot be flexibly configured, various manufacturers push out combined data acquisition station equipment aiming at the defects of the data acquisition station of the early law enforcement instrument, the data acquisition station equipment can be flexibly configured according to the needs of clients, the data acquisition station equipment mainly comprises acquisition station hosts and extension host equipment, one extension host can be abutted to 8 handheld terminals to realize charging and data uploading, and the clients can select and purchase the extension hosts with corresponding numbers according to the needs to realize the number extension of 8, 16, 24 and 32.
In the prior art, more materials are needed for the dial switch, and besides, the dial switch is arranged outside, and the structure needs corresponding holes and relevant remark prompts, so that the cost is increased; when the customer installs, the setting steps of the dial switch are added, if the dial switch is not set according to the requirement or damaged, the equipment is abnormal.
In view of the above problems, no effective solution has been proposed at present.
Disclosure of Invention
The embodiment of the invention provides a method and a device for determining an expansion slot position, a storage medium and electronic equipment, which at least solve the technical problem that the determination mode of the expansion slot position is single in the prior art.
According to an aspect of the embodiment of the present invention, there is provided a method for determining an extended slot, including: acquiring a first level signal value on a first set of expansion address bits on a first expansion slot bit in a set of expansion slots, wherein a set of host address bits on a host of an acquisition station are respectively connected with a set of expansion address bits on each expansion slot bit in the set of expansion slots in a staggered cascade mode, the number of host address bits in the set of host address bits connected with the set of expansion address bits on each expansion slot bit in the set of expansion slots is different, and under the condition that a corresponding expansion host is inserted into each expansion slot bit in the set of expansion slots, the level signal value on the set of expansion address bits on each expansion slot bit is a different preset level signal value, and the preset level signal value corresponding to the first expansion slot bit is the first preset level signal value; determining whether the first level signal value is the same as the first preset level signal value; and under the condition that the first level signal value is the same as the first preset level signal value, determining that the corresponding expansion host is inserted into the first expansion slot.
Optionally, before determining whether the first level signal value is the same as the first preset level signal value, the method includes: acquiring a first preset level signal value on each expansion slot in the group of expansion slots; and establishing a level signal mapping table according to each expansion slot and the first preset level signal value.
Optionally, the determining whether the first level signal value is the same as the first preset level signal value includes: and determining whether the first level signal value is the same as the first preset level signal value according to the level signal mapping table.
Optionally, the method includes: configuring at least N extension hosts for the acquisition station host under the condition that a group of extension address bits on each extension slot bit in the group of extension slot bits comprises N-bit address symbols, wherein each extension host in the N extension hosts comprises N pins, N is more than or equal to 2, and N is less than or equal to N; the N extension hosts are connected in a staggered mode, so that each extension host in the N extension host accesses one extension slot, level signal values on a group of extension address bits on each extension slot are read to be different preset level signal values, wherein each level signal in the group of level signals is an N-bit electric signal, and the N-bit electric signal corresponds to the N-bit address symbol.
Optionally, each expansion host in the N expansion hosts includes N pins, and the N expansion hosts are connected in a staggered manner, including: n pins in an ith expansion host in the N expansion hosts are connected with N-1 pins in an ith-1 expansion host, and N pins in an (i+1) th expansion host are connected with N-1 pins in the ith expansion host; and reading the level signal corresponding to the ith expansion slot from the set of level signals, and determining that the i expansion slots are accessed to the expansion host.
Optionally, the method includes: acquiring level signal values of host detection bits on the acquisition station host, wherein different numbers of target expansion slots in the group of expansion slots correspond to different preset level signal values of the host detection bits, and the target expansion slots are expansion slots into which an expansion host is inserted; and determining the number of the target expansion slots according to the level signal value on the host detection bit.
Optionally, the determining the number of the target expansion slots according to the level signal value on the host detection bit includes: under the condition that an extension host is connected to one extension slot in the group of extension slots, acquiring first voltage information; and determining the number of the expansion hosts cascaded with the acquisition master station according to the first voltage information and a voltage mapping table, wherein the voltage mapping table records the voltage information of each expansion slot in a group of expansion slots and the voltage information when each expansion slot is accessed to the expansion host.
According to another aspect of the embodiment of the present invention, there is also provided a device for determining an expansion slot, including: the first acquisition unit is used for acquiring a first level signal value on a first set of expansion address bits on a first expansion slot bit in a set of expansion slot bits, wherein a set of host address bits on a host of an acquisition station are respectively connected with a set of expansion address bits on each expansion slot bit in the set of expansion slot bits in a staggered cascade mode, the number of host address bits in the set of host address bits connected with the set of expansion address bits on each expansion slot bit in the set of expansion slot bits is different, and under the condition of inserting a corresponding expansion host, the level signal value on the set of expansion address bits on each expansion slot bit is a different preset level signal value, and the preset level signal value corresponding to the first expansion slot bit is the first preset level signal value; a first determining unit configured to determine whether the first level signal value is the same as the first preset level signal value; and the second determining unit is used for determining that the corresponding expansion host is inserted into the first expansion slot under the condition that the first level signal value is the same as the first preset level signal value.
Optionally, the apparatus includes: a second obtaining unit, configured to obtain a first preset level signal value on each expansion slot of the set of expansion slots before determining whether the first level signal value is the same as the first preset level signal value; and the establishing unit is used for establishing a level signal mapping table according to each expansion slot and the first preset level signal value.
Optionally, the first determining unit includes: and the first determining module is used for determining whether the first level signal value is the same as the first preset level signal value according to the level signal mapping table.
Optionally, the apparatus includes: the configuration unit is used for configuring at least N extension hosts for the acquisition station host under the condition that a group of extension address bits on each extension slot bit in the group of extension slot bits comprises N-bit address symbols, wherein each extension host in the N extension hosts comprises N pins, N is more than or equal to 2, and N is less than or equal to N; the N extension hosts are connected in a staggered mode, so that each extension host in the N extension host accesses one extension slot, level signal values on a group of extension address bits on each extension slot are read to be different preset level signal values, each level signal in the group of level signals is an N-bit electric signal, and the N-bit electric signal corresponds to the N-bit address symbol.
Optionally, the configuration unit is further configured to perform the following operations: n pins in an ith expansion host in the N expansion hosts are connected with N-1 pins in an ith-1 expansion host, and N pins in an (i+1) th expansion host are connected with N-1 pins in the ith expansion host; and reading the level signal corresponding to the ith expansion slot from the set of level signals, and determining that the i expansion slots are accessed to the expansion host.
Optionally, the apparatus includes: a third obtaining unit, configured to obtain a level signal value on a host detection bit on the acquisition station host, where different numbers of target expansion slots in the set of expansion slots correspond to different preset level signal values on the host detection bit, and the target expansion slots are expansion slots into which an expansion host is inserted; and a third determining unit, configured to determine the number of the target expansion slots according to the level signal value on the host detection bit.
Optionally, the third determining unit includes: the acquisition module is used for acquiring first voltage information under the condition that an extension host is connected into one extension slot in the group of extension slots; and the second determining module is used for determining the number of the expansion hosts cascaded with the acquisition master station according to the first voltage information and a voltage mapping table, wherein the voltage mapping table records the voltage information of each expansion slot in a group of expansion slots and the voltage information when each expansion slot is accessed to the expansion host.
According to still another aspect of the embodiments of the present invention, there is also provided a computer-readable storage medium having a computer program stored therein, wherein the computer program is configured to perform the above-described method for determining an extended slot when running.
According to still another aspect of the embodiments of the present invention, there is also provided an electronic device including a memory, and a processor, where the memory stores a computer program, and the processor is configured to execute the method for determining an extended slot according to the above-described computer program.
In the embodiment of the invention, a first level signal value on a first set of expansion address bits on a first expansion slot bit in a set of expansion slots is obtained, wherein a set of host address bits on a host of an acquisition station are respectively connected with a set of expansion address bits on each expansion slot bit in the set of expansion slots in a staggered cascade mode, the number of host address bits in a set of host address bits connected with a set of expansion address bits on each expansion slot in the set of expansion slots is different, and the level signal value on a set of expansion address bits on each expansion slot in the set of expansion slots is different preset level signal values under the condition that a corresponding expansion host is inserted, and the preset level signal value corresponding to the first expansion slot is the first preset level signal value; determining whether the first level signal value is the same as a first preset level signal value; and under the condition that the first level signal value is the same as the first preset level signal value, determining that the corresponding expansion host is inserted into the first expansion slot. Because a group of host address bits on the acquisition station host are respectively connected with a group of expansion address bits on each expansion slot bit in a group of expansion slot bits in a staggered cascade mode, the purpose of directly determining the expansion host inserted into the slot bit according to address bit information is achieved, and the technical problem that the determination mode of the expansion slot bit is single in the prior art is solved.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this application, illustrate embodiments of the invention and together with the description serve to explain the invention and do not constitute a limitation on the invention. In the drawings:
FIG. 1 is a flow chart of an alternative method of determining an extended slot in accordance with an embodiment of the present invention;
FIG. 2 is a flow chart of an alternative method of determining an extended slot in accordance with an embodiment of the present invention;
FIG. 3 is an alternative slot adaptive detection block diagram in accordance with an embodiment of the present invention;
FIG. 4 is a schematic diagram of an alternative slot adaptive detection circuit connection according to an embodiment of the present invention;
fig. 5 is a schematic structural view of an alternative electronic device according to an embodiment of the present invention.
Detailed Description
In order that those skilled in the art will better understand the present invention, a technical solution in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in which it is apparent that the described embodiments are only some embodiments of the present invention, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the present invention without making any inventive effort, shall fall within the scope of the present invention.
It should be noted that the terms "first," "second," and the like in the description and the claims of the present invention and the above figures are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that the embodiments of the invention described herein may be implemented in sequences other than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
Optionally, as an optional embodiment, as shown in fig. 1, the method for determining the extended slot includes:
step S102, a first level signal value on a first set of expansion address bits on a first expansion slot bit in a set of expansion slots is obtained, wherein a set of host address bits on a host of an acquisition station are respectively connected with a set of expansion address bits on each expansion slot bit in the set of expansion slots in a staggered cascade mode, the number of host address bits in a set of host address bits connected with a set of expansion address bits on each expansion slot in the set of expansion slots is different, the level signal value on a set of expansion address bits on each expansion slot is a different preset level signal value under the condition that a corresponding expansion host is inserted into each expansion slot, and the preset level signal value corresponding to the first expansion slot is a first preset level signal value.
Step S104, determining whether the first level signal value is the same as the first preset level signal value.
Step S106, determining that the corresponding expansion host is inserted into the first expansion slot under the condition that the first level signal value is the same as the first preset level signal value.
Optionally, in this embodiment, the method for determining the extended slot may include, but is not limited to, determining the number of extended hosts extended from the acquisition station host by an application, and so on. The acquisition station host may include, but is not limited to, a law enforcement instrument data acquisition station in a law enforcement management system. Such extended hosts include, but are not limited to, law enforcement recorders.
In this embodiment, since a set of host address bits on the host of the acquisition station are respectively connected with a set of expansion address bits on each expansion slot bit in a set of expansion slots in a staggered cascade manner, the number of host address bits in a set of host address bits connected with a set of expansion address bits on each expansion slot bit in a set of expansion slots is different, and under the condition that a corresponding expansion host is inserted into each expansion slot bit in a set of expansion slots, the level signal value on a set of expansion address bits on each expansion slot bit is a different preset level signal value, and the preset level signal value corresponding to the first expansion slot bit is a first preset level signal value, so that the number and the position of the expansion hosts accessing the expansion slot can be determined according to the acquired level signal value.
It should be noted that, each expansion slot may include, but is not limited to, n pins, where the n pins are used for accessing an expansion host, n pins correspond to n being a voltage signal, where the voltage signal is divided into a high level signal and a low level signal, in this embodiment, the high level signal takes a value of 1, and the low level signal takes a value of 0, and in the case that the expansion slot is accessed to the expansion host, the expansion slot corresponds to a set of level signals, if the expansion slot includes 4 pins, the expansion host corresponds to a level signal of 4 bits.
For example, after the first level signal value 0011 is obtained, it may be determined that 2 expansion slots are accessed to the expansion master, and expansion slots numbered 1 and 2 are accessed to the expansion master.
According to the embodiment provided by the application, a first level signal value on a first set of expansion address bits on a first expansion slot in a set of expansion slots is obtained, wherein a set of host address bits on a host of an acquisition station are respectively connected with a set of expansion address bits on each expansion slot in the set of expansion slots in a staggered cascade mode, the number of host address bits in a set of host address bits connected with a set of expansion address bits on each expansion slot in the set of expansion slots is different, the level signal value on a set of expansion address bits on each expansion slot in the set of expansion slots is different preset level signal values under the condition that a corresponding expansion host is inserted, and the preset level signal value corresponding to the first expansion slot is the first preset level signal value; determining whether the first level signal value is the same as a first preset level signal value; and under the condition that the first level signal value is the same as the first preset level signal value, determining that the corresponding expansion host is inserted into the first expansion slot. Because a group of host address bits on the acquisition station host are respectively connected with a group of expansion address bits on each expansion slot bit in a group of expansion slot bits in a staggered cascade mode, the purpose of directly determining the expansion host inserted into the slot bit according to address bit information is achieved, and the technical problem that the determination mode of the expansion slot bit is single in the prior art is solved.
Optionally, before determining whether the first level signal value is the same as the first preset level signal value, the method may include: acquiring a first preset level signal value on each expansion slot in a group of expansion slots; and establishing a level signal mapping table according to each expansion slot and the first preset level signal value.
Optionally, determining whether the first level signal value is the same as the first preset level signal value includes: and determining whether the first level signal value is the same as the first preset level signal value according to the level signal mapping table.
In this embodiment, a set of extension slots of the acquisition master station may be numbered, and in the case where each extension slot in the set of extension slots is accessed to the extension host, a level signal value corresponding to the corresponding extension slot may be obtained, and a level mapping table may be established according to the code of the extension slot and the corresponding level signal value. And further, the number and the positions of the extension hosts connected with the acquisition station can be rapidly determined. For example, the 2 nd expansion slot is accessed to the expansion host, i.e. there are 2 expansion hosts connected to the acquisition master station.
Optionally, the method may include: under the condition that a group of expansion address bits on each expansion slot bit in a group of expansion slot bits comprises N-bit address symbols, configuring at least N expansion hosts for the acquisition station host, wherein each expansion host in the N expansion hosts comprises N pins, N is more than or equal to 2, and N is less than or equal to N; the N extension hosts are connected in a staggered mode, so that each extension host in the N extension host accesses one extension slot, level signal values on a group of extension address bits on each extension slot are read to be different preset level signal values, each level signal in the group of level signals is an N-bit electric signal, and the N-bit electric signal corresponds to an N-bit address symbol.
Optionally, each expansion host in the N expansion hosts includes N pins, and the N expansion hosts are connected in a staggered manner, including: n pins in an ith expansion host in the N expansion hosts are connected with N-1 pins in the ith expansion host, and N pins in the (i+1) th expansion host are connected with N-1 pins in the ith expansion host; and reading a level signal corresponding to the ith expansion slot from the set of level signals, and determining that the i expansion slots are accessed to the expansion host.
Optionally, the method comprises: acquiring level signal values of host detection bits on a host of an acquisition station, wherein different numbers of target expansion slots in a group of expansion slots correspond to different preset level signal values of the host detection bits, and the target expansion slots are expansion slots into which an expansion host is inserted; and determining the number of the target expansion slots according to the level signal value on the host detection bit.
Optionally, determining the number of target expansion slots according to the level signal value on the host detection bit includes: under the condition that an extension host is connected into one extension slot in a group of extension slots, acquiring first voltage information; and determining the number of the expansion hosts cascaded with the acquisition master station according to the first voltage information and the voltage mapping table, wherein the voltage mapping table records the voltage information of each expansion slot in a group of expansion slots and the voltage information when each expansion slot is accessed to the expansion host.
Optionally, in the embodiment of the present application, a slot position adaptive detection method is also provided. As shown in fig. 2, the slot adaptive detection structure diagram. As shown in fig. 3, the slot adaptive detection circuit is connected with a schematic diagram. Each expansion slot includes 4 pins.
DET 1-4 correspond to 4 signals, 1K is pulled up on the main board side of the acquisition station host, 100K is pulled down on the main board side of the extension host, the corresponding DET 4-DET 1 is 1111 on the extension host 1, the corresponding DET 4-DET 1 is 0111 on the extension host 2, the corresponding DET 4-DET 1 is 0011 on the extension host 3, the corresponding DET 4-DET 1 is 0001 on the extension host 4, meanwhile, the singlechips on each extension host acquire the DET 1-4 corresponding to the respective slot positions, four bits after IIC addresses are set, the self-adaptive switching of the IIC addresses of the singlechips corresponding to the slot positions is realized, the main control can identify the position of the extension host corresponding to the current singlechips according to the agreed addresses, and corresponding control logic is realized
ADC_DET corresponds to a single signal, 10K is pulled up to 5V of the singlechip on the main board side of the acquisition station host, 10K is pulled down on the main board side of the extension host, ADC_DET provides ADC sampling of the singlechip of the acquisition box host, the number of slots is identified, the master control is reported, no slot access is prompted during 5V acquisition, and one slot access is prompted during 2.5V acquisition; prompting 2 slots to be accessed when 1.67V is acquired; when 1.25V is collected, 3 slots are prompted to be accessed, and when 1V is collected, 4 slots are prompted to be accessed.
In this embodiment, the number of extension hosts accessing the extension slot may be determined according to the voltage value.
Compared with the prior art, the method and the device have the advantages that corresponding dialing adjustment is carried out according to the position requirement of the customer matching extension host, and in the embodiment, the user operation is facilitated through the self-adaptive extension host position and quantity detection.
It should be noted that, for simplicity of description, the foregoing method embodiments are all described as a series of acts, but it should be understood by those skilled in the art that the present invention is not limited by the order of acts described, as some steps may be performed in other orders or concurrently in accordance with the present invention. Further, those skilled in the art will also appreciate that the embodiments described in the specification are all preferred embodiments, and that the acts and modules referred to are not necessarily required for the present invention.
According to another aspect of the embodiment of the invention, there is also provided an expansion slot position determining device for implementing the above expansion slot position determining method. As shown in fig. 4, the device for determining the extended slot position includes: a first acquisition unit 41, a first determination unit 43, and a second determination unit 45.
The first obtaining unit 41 is configured to obtain a first level signal value on a first set of extended address bits on a first extended slot in a set of extended slots, where a set of host address bits on a host of the acquisition station are respectively connected to a set of extended address bits on each extended slot in the set of extended slots in a staggered cascade manner, the number of host address bits in a set of host address bits connected to a set of extended address bits on each extended slot in the set of extended slots is different, and in a case where each extended slot in the set of extended slots is inserted into a corresponding extended host, the level signal value on a set of extended address bits on each extended slot is a different preset level signal value, and the preset level signal value corresponding to the first extended slot is a first preset level signal value.
The first determining unit 43 is configured to determine whether the first level signal value is the same as the first preset level signal value.
The second determining unit 45 is configured to determine that the corresponding expansion host is inserted into the first expansion slot when the first level signal value is the same as the first preset level signal value.
According to the embodiment provided by the application, the first obtaining unit 41 obtains a first level signal value on a first set of expansion address bits on a first expansion slot bit in a set of expansion slots, wherein a set of host address bits on a host of an acquisition station are respectively connected with a set of expansion address bits on each expansion slot bit in the set of expansion slots in a staggered cascade manner, the number of host address bits in a set of host address bits connected with a set of expansion address bits on each expansion slot in the set of expansion slots is different, and under the condition that a corresponding expansion host is inserted into each expansion slot in the set of expansion slots, the level signal value on a set of expansion address bits on each expansion slot is a different preset level signal value, and the preset level signal value corresponding to the first expansion slot is the first preset level signal value; the first determining unit 43 determines whether the first level signal value is the same as the first preset level signal value; the second determining unit 45 determines that the corresponding expansion host is inserted into the first expansion slot when the first level signal value is the same as the first preset level signal value.
Optionally, the apparatus may include: the second acquisition unit is used for acquiring the first preset level signal value on each expansion slot in the group of expansion slots before determining whether the first level signal value is the same as the first preset level signal value; and the establishing unit is used for establishing a mapping table according to each expansion slot and the first preset level signal value.
Optionally, the first determining unit 43 may include: the first determining module is used for determining whether the first level signal value is identical to the first preset level signal value according to the mapping table.
Optionally, the apparatus may include: the configuration unit is used for configuring at least N extension hosts for the acquisition station host under the condition that a group of extension address bits on each extension slot bit in the group of extension slot bits comprises N-bit address symbols, wherein each extension host in the N extension hosts comprises N pins, N is more than or equal to 2, and N is less than or equal to N; the N extension hosts are connected in a staggered mode, so that each extension host in the N extension host accesses one extension slot, level signal values on a group of extension address bits on each extension slot are read to be different preset level signal values, each level signal in the group of level signals is an N-bit electric signal, and the N-bit electric signal corresponds to an N-bit address symbol.
Wherein, the configuration unit is further configured to perform the following operations: n pins in an ith expansion host in the N expansion hosts are connected with N-1 pins in the ith expansion host, and N pins in the (i+1) th expansion host are connected with N-1 pins in the ith expansion host; and reading a level signal corresponding to the ith expansion slot from the set of level signals, and determining that the i expansion slots are accessed to the expansion host.
Optionally, the apparatus may include: a third obtaining unit, configured to obtain level signal values on a host detection bit on a host of the acquisition station, where different numbers of target expansion slots in a set of expansion slots correspond to different preset level signal values on the host detection bit, and the target expansion slots are expansion slots into which the expansion host is inserted; and the third determining unit is used for determining the number of the target expansion slots according to the level signal value on the host detection bit.
Optionally, the third determining unit may include: the acquisition module is used for acquiring the first voltage information under the condition that an extension host is connected into one extension slot in a group of extension slots; the second determining module is used for determining the number of the expansion hosts cascaded with the acquisition master station according to the first voltage information and the voltage mapping table, wherein the voltage mapping table records the voltage information of each expansion slot in a group of expansion slots and the voltage information when each expansion slot is accessed to the expansion host.
According to still another aspect of the embodiment of the present invention, there is further provided an electronic device for implementing the method for determining an extended slot as described above, where the electronic device may be a terminal device or a server as shown in fig. 1. The present embodiment is described taking the electronic device as a server as an example. As shown in fig. 5, the electronic device comprises a memory 502 and a processor 504, the memory 502 having stored therein a computer program, the processor 504 being arranged to perform the steps of any of the method embodiments described above by means of the computer program.
Alternatively, in this embodiment, the electronic device may be located in at least one network device of a plurality of network devices of the computer network.
Alternatively, in the present embodiment, the above-described processor may be configured to execute the following steps by a computer program:
s1, acquiring a first level signal value on a first set of expansion address bits on a first expansion slot bit in a set of expansion slots, wherein a set of host address bits on a host of an acquisition station are respectively connected with a set of expansion address bits on each expansion slot bit in the set of expansion slots in a staggered cascade mode, the number of host address bits in a set of host address bits connected with a set of expansion address bits on each expansion slot bit in the set of expansion slots is different, and the level signal value on a set of expansion address bits on each expansion slot bit is a different preset level signal value under the condition that a corresponding expansion host is inserted into each expansion slot bit;
S2, determining whether the first level signal value is the same as a first preset level signal value;
s3, determining that the corresponding expansion host is inserted into the first expansion slot under the condition that the first level signal value is the same as the first preset level signal value.
Alternatively, it will be understood by those skilled in the art that the structure shown in fig. 5 is only schematic, and the electronic device may also be a smart phone (such as an Android mobile phone, an iOS mobile phone, etc.), a tablet computer, a palm computer, and a terminal device such as a mobile internet device (Mobile Internet Devices, MID), a PAD, etc. Fig. 5 is not limited to the structure of the electronic device and the electronic apparatus described above. For example, the electronics can also include more or fewer components (e.g., network interfaces, etc.) than shown in fig. 5, or have a different configuration than shown in fig. 5.
The memory 502 may be used to store software programs and modules, such as program instructions/modules corresponding to the method and apparatus for determining an extended slot in the embodiment of the present invention, and the processor 504 executes the software programs and modules stored in the memory 502 to perform various functional applications and data processing, that is, implement the method for determining an extended slot. Memory 502 may include high-speed random access memory, and may also include non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some examples, memory 502 may further include memory located remotely from processor 504, which may be connected to the terminal via a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof. The memory 502 may be used to store, but is not limited to, address bit information. As an example, as shown in fig. 5, the memory 502 may include, but is not limited to, the acquisition unit 41, the first determination unit 43, and the second determination unit 45 in the determination device including the expansion slot. In addition, other module units in the above-mentioned determination device of the expansion slot may be further included, which is not described in detail in this example.
Optionally, the transmission device 506 is configured to receive or transmit data via a network. Specific examples of the network described above may include wired networks and wireless networks. In one example, the transmission device 506 includes a network adapter (Network Interface Controller, NIC) that may be connected to other network devices and routers via a network cable to communicate with the internet or a local area network. In one example, the transmission device 506 is a Radio Frequency (RF) module, which is used to communicate with the internet wirelessly.
In addition, the electronic device further includes: a display 508 for displaying the address bit information; and a connection bus 510 for connecting the respective module parts in the above-described electronic device.
In other embodiments, the terminal device or the server may be a node in a distributed system, where the distributed system may be a blockchain system, and the blockchain system may be a distributed system formed by connecting the plurality of nodes through a network communication. Among them, the nodes may form a Peer-To-Peer (P2P) network, and any type of computing device, such as a server, a terminal, etc., may become a node in the blockchain system by joining the Peer-To-Peer network.
According to one aspect of the present application, there is provided a computer program product or computer program comprising computer instructions stored in a computer readable storage medium. The computer instructions are read from the computer-readable storage medium by a processor of a computer device, and executed by the processor, cause the computer device to perform the method of determining an expansion slot provided in various alternative implementations of the above-described aspect of determining an expansion slot or aspects of determining an expansion slot. Wherein the computer program is arranged to perform the steps of any of the method embodiments described above when run.
Alternatively, in the present embodiment, the above-described computer-readable storage medium may be configured to store a computer program for executing the steps of:
s1, acquiring a first level signal value on a first set of expansion address bits on a first expansion slot bit in a set of expansion slots, wherein a set of host address bits on a host of an acquisition station are respectively connected with a set of expansion address bits on each expansion slot bit in the set of expansion slots in a staggered cascade mode, the number of host address bits in a set of host address bits connected with a set of expansion address bits on each expansion slot bit in the set of expansion slots is different, and the level signal value on a set of expansion address bits on each expansion slot bit is a different preset level signal value under the condition that a corresponding expansion host is inserted into each expansion slot bit;
S2, determining whether the first level signal value is the same as a first preset level signal value;
s3, determining that the corresponding expansion host is inserted into the first expansion slot under the condition that the first level signal value is the same as the first preset level signal value.
Alternatively, in this embodiment, it will be understood by those skilled in the art that all or part of the steps in the methods of the above embodiments may be performed by a program for instructing a terminal device to execute the steps, where the program may be stored in a computer readable storage medium, and the storage medium may include: flash disk, read-Only Memory (ROM), random-access Memory (Random Access Memory, RAM), magnetic or optical disk, and the like.
The foregoing embodiment numbers of the present invention are merely for the purpose of description, and do not represent the advantages or disadvantages of the embodiments.
The integrated units in the above embodiments may be stored in the above-described computer-readable storage medium if implemented in the form of software functional units and sold or used as separate products. Based on such understanding, the technical solution of the present invention may be embodied in essence or a part contributing to the prior art or all or part of the technical solution in the form of a software product stored in a storage medium, comprising several instructions for causing one or more computer devices (which may be personal computers, servers or network devices, etc.) to perform all or part of the steps of the method described in the embodiments of the present invention.
In the foregoing embodiments of the present invention, the descriptions of the embodiments are emphasized, and for a portion of this disclosure that is not described in detail in this embodiment, reference is made to the related descriptions of other embodiments.
In several embodiments provided in the present application, it should be understood that the disclosed client may be implemented in other manners. The above-described embodiments of the apparatus are merely exemplary, and the division of the units, such as the division of the units, is merely a logical function division, and may be implemented in another manner, for example, multiple units or components may be combined or may be integrated into another system, or some features may be omitted, or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be through some interfaces, units or modules, or may be in electrical or other forms.
The units described as separate units may or may not be physically separate, and units shown as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
In addition, each functional unit in the embodiments of the present invention may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit. The integrated units may be implemented in hardware or in software functional units.
The foregoing is merely a preferred embodiment of the present invention and it should be noted that modifications and adaptations to those skilled in the art may be made without departing from the principles of the present invention, which are intended to be comprehended within the scope of the present invention.

Claims (12)

1. The method for determining the extended slot is characterized by comprising the following steps:
acquiring a first level signal value on a first set of expansion address bits on a first expansion slot bit in a set of expansion slots, wherein a set of host address bits on a host of an acquisition station are respectively connected with a set of expansion address bits on each expansion slot bit in the set of expansion slots in a staggered cascade mode, the number of host address bits in the set of host address bits connected with the set of expansion address bits on each expansion slot bit in the set of expansion slots is different, and under the condition that a corresponding expansion host is inserted into each expansion slot bit in the set of expansion slots, the level signal value on the set of expansion address bits on each expansion slot bit is a different preset level signal value, and the preset level signal value corresponding to the first expansion slot bit is the first preset level signal value;
Determining whether the first level signal value is the same as the first preset level signal value;
under the condition that the first level signal value is the same as the first preset level signal value, determining that a corresponding expansion host is inserted into the first expansion slot;
acquiring level signal values of host detection bits on the acquisition station host, wherein different numbers of target expansion slots in the group of expansion slots correspond to different preset level signal values of the host detection bits, and the target expansion slots are expansion slots into which an expansion host is inserted;
determining the number of the target expansion slots according to the level signal value on the host detection bit, including: under the condition that an extension host is connected to one extension slot in the group of extension slots, acquiring first voltage information; and determining the number of the expansion hosts cascaded with the acquisition master station according to the first voltage information and a voltage mapping table, wherein the voltage mapping table records the voltage information of each expansion slot in a group of expansion slots and the voltage information when each expansion slot is accessed to the expansion host.
2. The method of claim 1, wherein prior to determining whether the first level signal value is the same as the first preset level signal value, the method comprises:
Acquiring a first preset level signal value on each expansion slot in the group of expansion slots;
and establishing a level signal mapping table according to each expansion slot and the first preset level signal value.
3. The method of claim 2, wherein said determining whether said first level signal value is the same as said first preset level signal value comprises:
and determining whether the first level signal value is the same as the first preset level signal value according to the level signal mapping table.
4. The method according to claim 1, characterized in that the method comprises:
configuring at least N extension hosts for the acquisition station host under the condition that a group of extension address bits on each extension slot bit in the group of extension slot bits comprises N-bit address symbols, wherein each extension host in the N extension hosts comprises N pins, N is more than or equal to 2, and N is less than or equal to N;
the N extension hosts are connected in a staggered mode, so that each extension host in the N extension host accesses one extension slot, level signal values on a group of extension address bits on each extension slot are read to be different preset level signal values, each level signal in the group of level signals is an N-bit electric signal, and the N-bit electric signal corresponds to an N-bit address symbol.
5. The method of claim 4, wherein each of the N expansion hosts comprises N pins, the N expansion hosts being misconnected, comprising:
n pins in an ith expansion host in the N expansion hosts are connected with N-1 pins in an ith-1 expansion host, and N pins in an (i+1) th expansion host are connected with N-1 pins in the ith expansion host;
and reading the level signal corresponding to the ith expansion slot from the set of level signals, and determining that the i expansion slots are accessed to the expansion host.
6. An expansion slot position determining device is characterized by comprising:
the first acquisition unit is used for acquiring a first level signal value on a first set of expansion address bits on a first expansion slot bit in a set of expansion slot bits, wherein a set of host address bits on a host of an acquisition station are respectively connected with a set of expansion address bits on each expansion slot bit in the set of expansion slot bits in a staggered cascade mode, the number of host address bits in the set of host address bits connected with the set of expansion address bits on each expansion slot bit in the set of expansion slot bits is different, and under the condition of inserting a corresponding expansion host, the level signal value on the set of expansion address bits on each expansion slot bit is a different preset level signal value, and the preset level signal value corresponding to the first expansion slot bit is the first preset level signal value;
A first determining unit configured to determine whether the first level signal value is the same as the first preset level signal value;
the second determining unit is used for determining that the corresponding expansion host is inserted into the first expansion slot under the condition that the first level signal value is the same as the first preset level signal value;
a third obtaining unit, configured to obtain a level signal value on a host detection bit on the acquisition station host, where different numbers of target expansion slots in the set of expansion slots correspond to different preset level signal values on the host detection bit, and the target expansion slots are expansion slots into which an expansion host is inserted;
a third determining unit, configured to determine the number of the target expansion slots according to the level signal value on the host detection bit;
the third determination unit includes:
the acquisition module is used for acquiring first voltage information under the condition that an extension host is connected into one extension slot in the group of extension slots;
and the second determining module is used for determining the number of the expansion hosts cascaded with the acquisition master station according to the first voltage information and a voltage mapping table, wherein the voltage mapping table records the voltage information of each expansion slot in a group of expansion slots and the voltage information when each expansion slot is accessed to the expansion host.
7. The apparatus of claim 6, wherein the apparatus comprises:
a second obtaining unit, configured to obtain a first preset level signal value on each expansion slot of the set of expansion slots before determining whether the first level signal value is the same as the first preset level signal value;
and the establishing unit is used for establishing a level signal mapping table according to each expansion slot and the first preset level signal value.
8. The apparatus according to claim 7, wherein the first determining unit includes:
and the first determining module is used for determining whether the first level signal value is the same as the first preset level signal value according to the level signal mapping table.
9. The apparatus of claim 6, wherein the apparatus comprises:
the configuration unit is used for configuring at least N extension hosts for the acquisition station host under the condition that a group of extension address bits on each extension slot bit in the group of extension slot bits comprises N-bit address symbols, wherein each extension host in the N extension hosts comprises N pins, N is more than or equal to 2, and N is less than or equal to N;
the N extension hosts are connected in a staggered mode, so that each extension host in the N extension host accesses one extension slot, level signal values on a group of extension address bits on each extension slot are read to be different preset level signal values, each level signal in a group of level signals is an N-bit electric signal, and the N-bit electric signal corresponds to an N-bit address symbol.
10. The apparatus of claim 9, wherein the configuration unit is further configured to:
n pins in an ith expansion host in the N expansion hosts are connected with N-1 pins in an ith-1 expansion host, and N pins in an (i+1) th expansion host are connected with N-1 pins in the ith expansion host;
and reading the level signal corresponding to the ith expansion slot from the set of level signals, and determining that the i expansion slots are accessed to the expansion host.
11. A computer readable storage medium, characterized in that the computer readable storage medium comprises a stored program, wherein the program when run performs the method of any one of claims 1 to 5.
12. An electronic device comprising a memory and a processor, characterized in that the memory has stored therein a computer program, the processor being arranged to execute the method according to any of the claims 1 to 5 by means of the computer program.
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