CN107608809B - Exception handling method and device - Google Patents

Exception handling method and device Download PDF

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Publication number
CN107608809B
CN107608809B CN201610546144.6A CN201610546144A CN107608809B CN 107608809 B CN107608809 B CN 107608809B CN 201610546144 A CN201610546144 A CN 201610546144A CN 107608809 B CN107608809 B CN 107608809B
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memory
memory address
context information
determining
address range
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CN107608809A (en
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王刚
宿安心
周祥娟
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ZTE Corp
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ZTE Corp
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Priority to PCT/CN2017/092150 priority patent/WO2018010600A1/en
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/30Monitoring
    • G06F11/34Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment

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  • General Engineering & Computer Science (AREA)
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Abstract

The application provides an exception handling method and device, wherein the method comprises the following steps: determining a memory address range to be transferred in a memory of a system according to abnormal context information of the system; reading the memory data corresponding to the determined memory address range; and sending the read memory data to one or more nonvolatile memories, and/or storing the read memory data into a reserved memory of a single board or a processing unit where the abnormality is located. According to the application, the problem that the memory transfer information needs a large-capacity nonvolatile memory in a memory transfer mode in the system abnormality in the related art is solved, and the effect of improving the efficiency of memory transfer in the abnormality is achieved.

Description

Exception handling method and device
Technical Field
The present application relates to the field of communications, and in particular, to an exception handling method and apparatus.
Background
In the field of embedded systems, exception handling is an important support module. Because the embedded equipment has very high requirements on performance and timeliness of fault recovery, exception handling must be rapid and accurate so that the normal state of the equipment can be recovered in time.
In the exception handling of an operating system, an important part is to save information on the site of the exception, in particular the context information of the process or thread. When locating an exception, more memory information related to the exception is sometimes required, but in the case of a single board or processing unit being abnormally restarted, the required other memory information cannot be obtained.
The os generally provides a memory transfer function during an exception, and usually is coredump of Linux, which can store all memory information in the process where the exception occurs into a designated nonvolatile memory. Therefore, even if the single board or the processing unit is restarted due to the abnormality, the abnormality can be analyzed and positioned according to the information of the memory transfer. The memory can transfer information when one complete abnormality, the capacity can reach tens to hundreds of megabytes (1 megabyte equals 1024) 2 Bytes) and even up to gigabytes.
Because most single boards or processing units in the embedded equipment have no large-capacity nonvolatile memory; or even if the nonvolatile memory with large capacity exists, the complete memory transfer during the exception can take a relatively long time, and the timeliness of exception handling is affected. Therefore, complete memory transfer during exception is not completely suitable for exception handling in embedded systems.
Therefore, in the related art, the memory transfer method during the system exception has the problem that the memory transfer information needs a large capacity of nonvolatile memory.
Disclosure of Invention
The embodiment of the application provides an exception handling method and device, which at least solve the problem that a nonvolatile memory with large capacity is needed for memory transfer information in a memory transfer mode when a system is in an exception in the related art.
According to an embodiment of the present application, there is provided an exception handling method including: determining a memory address range to be transferred in a memory of a system according to abnormal context information of the system; reading the memory data corresponding to the determined memory address range; and sending the read memory data to one or more nonvolatile memories, and/or storing the read memory data into a reserved memory of a single board or a processing unit where the abnormality is located.
Optionally, determining the memory address range of the memory of the system to be transferred according to the abnormal context information of the abnormality of the system includes: judging whether the memory address pointed by the abnormal context information is valid or not; and under the condition that the judgment result is yes, determining the memory address range needing to be restored as follows: and a memory address range from a memory address of a first preset distance before the memory address pointed by the abnormal context information to a memory address of a second preset distance after the memory address pointed by the abnormal context information.
Optionally, determining the memory address range of the memory of the system to be transferred according to the abnormal context information of the abnormality of the system includes: under the condition that the number of the abnormal context information is multiple, determining the memory address range which corresponds to each abnormal context information and needs to be transferred; merging the overlapped memory address ranges under the condition that the memory address ranges which are required to be restored and correspond to the determined abnormal context information are overlapped; and determining the combined memory address range as the memory address range needing to be transferred.
Optionally, before determining the memory address range that the memory of the system needs to be restored according to the abnormal context information of the abnormality of the system, the method further includes: in the case that the abnormal context information is stack memory information, determining the abnormal context information includes: and the stack top pointer of the stack memory information corresponds to the information stored in the memory address of the third preset distance before the position to the memory address of the fourth preset distance after the position corresponding to the stack top pointer.
Optionally, in the case of saving the read memory data in a reserved memory of the board or the processing unit where the exception is located, after saving the read memory data in the reserved memory of the board or the processing unit where the exception is located, the method further includes: and after the abnormality is recovered or the single board or the processing unit where the abnormality is located is restarted, the memory data stored in the reserved memory is sent to one or more nonvolatile memories.
According to another embodiment of the present application, there is provided an abnormality processing apparatus including: the first determining module is used for determining a memory address range which needs to be transferred in a memory of the system according to abnormal context information of the system; the reading module is used for reading the memory data corresponding to the determined memory address range; the first sending module is used for sending the read memory data to one or more nonvolatile memories, and/or the storing module is used for storing the read memory data into a reserved memory of a single board or a processing unit where the abnormality is located.
Optionally, the first determining module includes: the judging unit is used for judging whether the memory address pointed by the abnormal context information is valid or not; the first determining unit is configured to determine, when the determination result is yes, that the memory address range that needs to be restored is: and a memory address range from a memory address of a first preset distance before the memory address pointed by the abnormal context information to a memory address of a second preset distance after the memory address pointed by the abnormal context information.
Optionally, the first determining module includes: the second determining unit is used for respectively determining memory address ranges which are needed to be transferred and correspond to the abnormal context information when the abnormal context information is a plurality of; the merging unit is used for merging the overlapped memory address ranges under the condition that the memory address ranges which are required to be transferred and correspond to the determined abnormal context information are overlapped; and the third determining unit is used for determining the combined memory address range as the memory address range needing to be transferred.
Optionally, the apparatus further comprises: the second determining module is configured to determine, when the abnormal context information is stack memory information, that the abnormal context information includes: and the stack top pointer of the stack memory information corresponds to the information stored in the memory address of the third preset distance before the position to the memory address of the fourth preset distance after the position corresponding to the stack top pointer.
Optionally, the apparatus further comprises: and the second sending module is used for sending the memory data stored in the reserved memory to one or more nonvolatile memories after the abnormality is recovered or the abnormality is restarted under the condition that the read memory data is stored in the reserved memory of the single board or the processing unit where the abnormality is located.
According to still another embodiment of the present application, there is also provided a storage medium. The storage medium is arranged to store program code for performing the steps of: determining a memory address range to be transferred in a memory of a system according to abnormal context information of the system; reading the memory data corresponding to the determined memory address range; and sending the read memory data to one or more nonvolatile memories, and/or storing the read memory data into a reserved memory of a single board or a processing unit where the abnormality is located.
Optionally, the storage medium is further arranged to store program code for performing the steps of: according to the abnormal context information of the abnormality of the system, determining the memory address range of the memory of the system to be restored comprises: judging whether the memory address pointed by the abnormal context information is valid or not; and under the condition that the judgment result is yes, determining the memory address range needing to be restored as follows: and a memory address range from a memory address of a first preset distance before the memory address pointed by the abnormal context information to a memory address of a second preset distance after the memory address pointed by the abnormal context information.
Optionally, the storage medium is further arranged to store program code for performing the steps of: according to the abnormal context information of the abnormality of the system, determining the memory address range of the memory of the system to be restored comprises: under the condition that the number of the abnormal context information is multiple, determining the memory address range which corresponds to each abnormal context information and needs to be transferred; merging the overlapped memory address ranges under the condition that the memory address ranges which are required to be restored and correspond to the determined abnormal context information are overlapped; and determining the combined memory address range as the memory address range needing to be transferred.
Optionally, the storage medium is further arranged to store program code for performing the steps of: before determining the memory address range of the memory of the system to be restored according to the abnormal context information of the abnormality of the system, the method further comprises: in the case that the abnormal context information is stack memory information, determining the abnormal context information includes: and the stack top pointer of the stack memory information corresponds to the information stored in the memory address of the third preset distance before the position to the memory address of the fourth preset distance after the position corresponding to the stack top pointer.
Optionally, the storage medium is further arranged to store program code for performing the steps of: under the condition that the read memory data is stored in the reserved memory of the single board or the processing unit where the abnormality is located, after the read memory data is stored in the reserved memory of the single board or the processing unit where the abnormality is located, the method further comprises: and after the abnormality is recovered or the single board or the processing unit where the abnormality is located is restarted, the memory data stored in the reserved memory is sent to one or more nonvolatile memories.
According to the application, when the system is abnormal, the memory address range needing to be transferred is determined according to the abnormal context information, the memory data corresponding to the determined memory address range (namely the memory data needing to be transferred) is read, the read memory data is sent to the nonvolatile memory, and/or is stored in the single board or the reserved memory of the processing unit, and the memory data in the memory address range determined by the abnormal context information is sent or stored, so that the requirement on the capacity of the nonvolatile memory is greatly reduced relative to the complete memory transfer, and therefore, the problem that the nonvolatile memory with large capacity is needed for the memory transfer information in the memory transfer mode during the system abnormality in the related art can be solved, and the effect of improving the efficiency of the memory transfer during the abnormality is achieved.
Drawings
The accompanying drawings, which are included to provide a further understanding of the application and are incorporated in and constitute a part of this specification, illustrate embodiments of the application and together with the description serve to explain the application and do not constitute a limitation on the application. In the drawings:
FIG. 1 is a block diagram of the hardware architecture of an embedded device of an exception handling method according to an embodiment of the present application;
FIG. 2 is a flow chart of an exception handling method according to an embodiment of the present application;
FIG. 3 is a flowchart of a method of exception handling in accordance with a preferred embodiment of the present application;
FIG. 4 is a second flowchart of an exception handling method in accordance with a preferred embodiment of the present application;
FIG. 5 is a block diagram of an exception handling apparatus according to an embodiment of the present application;
FIG. 6 is a block diagram of a first determination module 52 of an exception handling apparatus according to an embodiment of the present application;
FIG. 7 is a block diagram II of a first determination module 52 of an exception handling apparatus according to an embodiment of the present application;
FIG. 8 is a block diagram II of an exception handling apparatus according to an embodiment of the present application;
fig. 9 is a block diagram III of an abnormality processing apparatus according to an embodiment of the present application.
Detailed Description
The application will be described in detail hereinafter with reference to the drawings in conjunction with embodiments. It should be noted that, without conflict, the embodiments of the present application and features of the embodiments may be combined with each other.
It should be noted that the terms "first," "second," and the like in the description and the claims of the present application and the above figures are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order.
Example 1
The method embodiment provided in embodiment 1 of the present application may be executed in an embedded device or similar computing device. Taking the operation on the embedded device as an example, fig. 1 is a hardware structure block diagram of the embedded device of an exception handling method according to an embodiment of the present application. As shown in fig. 1, the embedded appliance 10 may include one or more (only one is shown in the figure) processors 102 (the processor 102 may include, but is not limited to, a microprocessor MCU or a processing device such as a programmable logic device FPGA), a memory 104 for storing data, and a transmission device 106 for communication functions. It will be appreciated by those of ordinary skill in the art that the configuration shown in fig. 1 is merely illustrative and is not intended to limit the configuration of the electronic device described above. For example, the embedded device 10 may also include more or fewer components than shown in FIG. 1, or have a different configuration than shown in FIG. 1.
The memory 104 may be used to store software programs and modules of application software, such as program instructions/modules corresponding to the exception handling method in the embodiment of the present application, and the processor 102 executes the software programs and modules stored in the memory 104 to perform various functional applications and data processing, i.e., implement the above-mentioned method. Memory 104 may include high-speed random access memory, and may also include non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some examples, the memory 104 may further include memory remotely located with respect to the processor 102, which may be connected to the embedded device 10 via a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.
The transmission means 106 is arranged to receive or transmit data via a network. Specific examples of the network described above may include a wireless network provided by a communication provider of the embedded device 10. In one example, the transmission device 106 includes a network adapter (Network Interface Controller, NIC) that can connect to other network devices through a base station to communicate with the internet. In one example, the transmission device 106 may be a Radio Frequency (RF) module for communicating with the internet wirelessly.
In this embodiment, an exception handling method running on the above embedded device is provided, and fig. 2 is a flowchart of an exception handling method according to an embodiment of the present application, as shown in fig. 2, where the flowchart includes the following steps:
step S202, determining a memory address range to be transferred in a memory of a system according to abnormal context information of the system;
step S204, reading the memory data corresponding to the determined memory address range;
step S206, the read memory data is sent to one or more nonvolatile memories, and/or the read memory data is stored in the reserved memory of the single board or the processing unit where the abnormality is located.
Through the steps, when the system is abnormal, the memory address range needing to be transferred is determined according to the abnormal context information, the memory data corresponding to the determined memory address range is read, the read memory data is sent to the nonvolatile memory and/or stored in the single board or the reserved memory of the processing unit, the problem that the nonvolatile memory with large capacity is needed by the memory transfer information in the memory transfer mode when the system is abnormal in the related art is solved, and the memory transfer efficiency when the system is abnormal is improved.
Alternatively, the memory address range to be restored in the memory of the system may be determined in various manners, for example, it may be first determined whether the memory address pointed by the abnormal context information is valid, and when the memory address pointed by the abnormal context information is valid, the memory address range to be restored is determined as follows: the memory address range from the memory address of the first predetermined distance before the memory address pointed by the abnormal context information to the memory address of the second predetermined distance after the memory address pointed by the abnormal context information can be the same or different, and the specific size can be set according to the requirement. By determining that the memory address range to be transferred is the memory address range of the predetermined distance before and after the memory address pointed by the abnormal context information under the condition that the memory address pointed by the abnormal context information is effective, the correlation between the acquired memory data and the abnormality can be improved.
For another example, the following manner may be used to determine the memory address range that needs to be restored in the memory of the system: the memory address ranges which are required to be restored and correspond to the abnormal context information can be respectively determined under the condition that the abnormal context information is a plurality of, the overlapped memory address ranges are combined under the condition that the memory address ranges which are required to be restored and correspond to the abnormal context information are overlapped, and the combined memory address ranges are determined to be the memory address ranges which are required to be restored. By combining the overlapping portions of the memory address ranges determined according to the abnormal context information in the case that the abnormal context information is plural, repeated acquisition of memory data in the same memory address can be avoided, the amount of acquired memory data is reduced, and the efficiency of memory transfer during an abnormality is improved.
Optionally, before step S202, in the case where the abnormal context information is stack memory information, the abnormal context information may also be determined as follows: and determining the information stored in the memory address from the memory address with the third preset distance before the corresponding position of the stack top pointer to the memory address with the fourth preset distance after the corresponding position of the stack top pointer of the stack memory information as the abnormal context information. The third predetermined distance and the fourth predetermined distance may be the same or different, and the size of the distance may be set as needed.
By the technical scheme provided by the embodiment of the application, under the condition that the abnormal context information is stack memory information, the information stored in the memory addresses with the preset distance before and after the stack pointer is determined by the abnormal context information, so that the accuracy of the acquired abnormal related information can be improved.
Optionally, after step S206, after the read memory data is stored in the reserved memory of the board or the processing unit where the exception is located, after the exception is recovered, or after the board or the processing unit where the exception is located is restarted, the memory data stored in the reserved memory may be sent to one or more nonvolatile memories.
According to the technical scheme provided by the embodiment of the application, after the exception is replied or the single board or the processing unit where the exception is located is restarted, the memory data which is stored in the reserved memory and needs to be transferred is sent to one or more nonvolatile memories, so that the analysis of the exception data is facilitated, and the loss of the memory data which is stored in the reserved memory and needs to be transferred is avoided.
Based on the foregoing embodiment and the optional implementation manner, in the preferred embodiment, an exception handling method is provided for illustrating the whole flow interaction of the scheme. FIG. 3 is a flowchart of an exception handling method according to a preferred embodiment of the present application, as shown in FIG. 3, the flowchart comprising the steps of:
in step S302, after the exception occurs, the memory address range to be restored is determined according to the exception context information.
Typical exception context information, which mainly includes CPU register information and stack memory information, is illustrated in the present preferred embodiment. For stack memory information, 1K (1 K=1024) byte memory is required to be limited before and after the current stack top pointer; if the memory address pointed by the abnormal context information is valid, adding the front and rear memories with the abnormal context information as the midpoint into an address range needing to be transferred; the overlapping memory address ranges are merged.
The stack memory address range 1K byte and the memory address range 4K bytes (2K bytes each) to be transferred are described as typical configuration (the transferred memory address range does not exceed 4 megabytes), and the stack memory address range can be optimally configured according to the situation in the practical application environment.
Specifically, according to the abnormal context information, the method for determining the memory address range to be restored is as follows:
(1) Under the condition that the abnormal context information is CPU register information, traversing all CPU registers, taking the value of the registers as a memory address, and then judging whether the address is valid or not; if the address is valid, the 2K bytes before and after the address are added into the memory address range which needs to be transferred. In traversing the registers, overlapping address ranges may be merged.
(2) Under the condition that the abnormal context information is stack memory information, traversing the current stack top pointer, which is 1K byte of memory before and after, taking each memory value as an address, and then judging whether the address is valid or not; if so, the 2K bytes before and after the address are added to the memory address range that needs to be transferred. Overlapping address ranges may also be merged during traversal of the stack memory.
Step S304, the memory content is read in sequence, and the read memory content is sent to a single board or a processing unit with a nonvolatile memory in real time.
After determining the memory address range to be transferred, the memory contents are sequentially read and sent to a single board or a processing unit with a nonvolatile memory in real time. And on the target board or processing unit, the memory content is saved to a nonvolatile memory, such as a hard disk, a memory card, and the like.
When the board or the processing unit having the nonvolatile memory receives the memory data to be transferred, the method of saving the memory data to the nonvolatile memory can be selected, for example, saving the memory data to the nonvolatile memory in a text mode or saving the memory data in a binary mode. The former is convenient for analysis, the latter has smaller storage space, and the storage mode can be selected according to the situation in the practical application environment. The timing of selection may be selected when the memory content needs to be saved, or may be preset.
FIG. 4 is a second flowchart of an exception handling method according to a preferred embodiment of the present application, as shown in FIG. 4, the flowchart comprising the steps of:
in step S402, after the exception occurs, the memory address range to be restored is determined according to the exception context information.
The method for determining the memory address range to be restored in step S402 according to the abnormal context information is similar to the method for determining the memory address range to be restored in step S302 according to the abnormal context information, and will not be described here.
Step S404, the memory contents are read in sequence, and the read memory contents are stored in the reserved memory of the single board or the processing unit.
If an abnormal single board or processing unit occurs, a reserved memory with a larger capacity (i.e. a memory area with the content unchanged under the condition that the single board or processing unit is restarted without power off) is supported, then after determining the memory address range needing to be restored, the memory content needing to be restored can be temporarily stored in the reserved memory, and after the abnormal recovery, the memory content is sent to the single board or processing unit with the nonvolatile memory. This facilitates a faster recovery from anomalies.
In step S406, after the exception recovery, or after the single board (processing unit) is restarted, the memory content is read from the reserved memory, and the read memory content is sent to the single board or the processing unit having the nonvolatile memory.
After the abnormal recovery or the restarting of the single board (processing unit), the memory content is read from the reserved memory, and the read memory content is sent to the single board or the processing unit with the nonvolatile memory. On the target board or processing unit, the memory contents are saved to a non-volatile memory, such as a hard disk and a memory card.
When the board or the processing unit having the nonvolatile memory receives the memory data to be transferred, the method of saving the memory data to the nonvolatile memory can be selected, for example, saving the memory data to the nonvolatile memory in a text mode or saving the memory data in a binary mode. The former is convenient for analysis, the latter has smaller storage space, and the storage mode can be selected according to the situation in the practical application environment. The timing of selection may be selected when the memory content needs to be saved, or may be preset.
In an actual engineering application environment, when the embedded system exception handling is used for storing exception field information, only the exception stack information and definitely related memory information are stored, or a complete memory transfer mode is performed in a proper scene, the actual requirement cannot be met, the former needs definitely the abnormally related memory information, which is difficult to achieve in an industrial application environment, and the latter needs a large-capacity nonvolatile memory. By the technical scheme, the memory transfer requirement is met, meanwhile, memory information related to abnormality is not required to be clear, and the required memory capacity is smaller than that of a complete memory transfer mode.
From the description of the above embodiments, it will be clear to a person skilled in the art that the method according to the above embodiments may be implemented by means of software plus the necessary general hardware platform, but of course also by means of hardware, but in many cases the former is a preferred embodiment. Based on such understanding, the technical solution of the present application may be embodied essentially or in a part contributing to the prior art in the form of a software product stored in a storage medium (e.g. ROM/RAM, magnetic disk, optical disk) comprising instructions for causing a terminal device (which may be a mobile phone, a computer, a server, or a network device, etc.) to perform the method according to the embodiments of the present application.
Example 2
In this embodiment, an exception handling device is further provided, and the exception handling device is used to implement the foregoing embodiments and preferred embodiments, and is not described in detail. As used below, the term "module" may be a combination of software and/or hardware that implements a predetermined function. While the means described in the following embodiments are preferably implemented in software, implementation in hardware, or a combination of software and hardware, is also possible and contemplated.
FIG. 5 is a block diagram of an exception handling apparatus according to an embodiment of the present application, as shown in FIG. 5, the apparatus includes: the first determination module 52, the reading module 54, the first sending module 56, and/or the saving module 58. The device will be described below.
A first determining module 52, configured to determine, according to abnormal context information of an abnormality of the system, a memory address range that needs to be restored in a memory of the system; the reading module 54 is connected to the first determining module 52, and is configured to read the memory data corresponding to the determined memory address range; the first sending module 56 is connected to the reading module 54, and is configured to send the read memory data to one or more nonvolatile memories, and the storing module 58 is connected to the reading module 54, and is configured to store the read memory data in a reserved memory of a board or a processing unit where the exception is located.
Fig. 6 is a block diagram of a first determining module 52 of an exception handling apparatus according to an embodiment of the present application, as shown in fig. 6, the first determining module 52 includes: a judgment unit 62, a first determination unit 64. The first determination module 52 is described below.
A judging unit 62, configured to judge whether the memory address pointed to by the abnormal context information is valid; the first determining unit 64 is connected to the determining unit 62, and is configured to determine, when the determination result is yes, that the memory address range to be restored is: and a memory address range from a memory address of a first predetermined distance before the memory address pointed by the abnormal context information to a memory address of a second predetermined distance after the memory address pointed by the abnormal context information.
Fig. 7 is a block diagram of a second configuration of a first determination module 52 of the exception handling apparatus according to an embodiment of the present application, and as shown in fig. 7, the first determination module 52 includes: a second determination unit 72, a merging unit 74, a third determination unit 76. The first determination module 52 is described below.
A second determining unit 72, configured to determine, when the number of abnormal context information is plural, a memory address range that needs to be restored and corresponds to each abnormal context information, respectively; a merging unit 74, connected to the second determining unit 72, for merging the overlapped memory address ranges when the memory address ranges to be restored corresponding to the determined abnormal context information overlap; a third determining unit 76, coupled to the merging unit 74, is configured to determine the merged memory address range as a memory address range that needs to be restored.
Fig. 8 is a block diagram of a second configuration of an exception handling apparatus according to an embodiment of the present application, as shown in fig. 8, which includes, in addition to all the modules shown in fig. 5:
the second determining module 82 is configured to determine, in a case where the abnormal context information is stack memory information, the abnormal context information includes: and the stack top pointer of the stack memory information corresponds to the information stored in the memory address from the memory address at the third preset distance before the position corresponding to the stack top pointer to the memory address at the fourth preset distance after the position corresponding to the stack top pointer.
Fig. 9 is a block diagram III of an abnormality processing apparatus according to an embodiment of the present application, which, as shown in fig. 9, includes, in addition to all the modules shown in fig. 5:
the second sending module 92 is configured to send, when the read memory data is stored in the reserved memory of the board or the processing unit where the exception is located, the memory data stored in the reserved memory to one or more nonvolatile memories after the exception is restored or the board or the processing unit where the exception is located is restarted.
Alternatively, the first transmitting module 56 and the second transmitting module 92 of the preferred embodiment may be the same or different.
Alternatively, the exception handling means of the preferred embodiment may be located in a single board or processing unit within the embedded device.
It should be noted that each of the above modules may be implemented by software or hardware, and for the latter, it may be implemented by, but not limited to: the modules are all located in the same processor; alternatively, the above modules may be located in different processors in any combination.
Example 3
The embodiment of the application also provides a storage medium. Alternatively, in the present embodiment, the above-described storage medium may be configured to store program code for performing the steps of:
s1, determining a memory address range to be transferred in a memory of a system according to abnormal context information of the system;
s2, reading memory data corresponding to the determined memory address range;
s3, sending the read memory data to one or more nonvolatile memories, and/or storing the read memory data to a single board or a reserved memory of a processing unit where the abnormality is located.
Optionally, the storage medium is further arranged to store program code for performing the steps of:
according to the abnormal context information of the system, determining the memory address range of the memory of the system, which needs to be transferred, comprises the following steps:
s1, judging whether a memory address pointed by abnormal context information is valid or not;
s2, under the condition that the judgment result is yes, determining the memory address range needing to be restored as follows: and a memory address range from a memory address of a first predetermined distance before the memory address pointed by the abnormal context information to a memory address of a second predetermined distance after the memory address pointed by the abnormal context information.
Optionally, the storage medium is further arranged to store program code for performing the steps of:
according to the abnormal context information of the system, determining the memory address range of the memory of the system, which needs to be transferred, comprises the following steps:
s1, under the condition that a plurality of abnormal context information are provided, determining memory address ranges which correspond to the abnormal context information and need to be transferred;
s2, under the condition that the memory address ranges which are required to be transferred and correspond to the determined abnormal context information are overlapped, merging the overlapped memory address ranges;
s3, determining the combined memory address range as the memory address range needing to be transferred.
Optionally, the storage medium is further arranged to store program code for performing the steps of:
before determining the memory address range of the memory to be transferred of the system according to the abnormal context information of the system, the method further comprises the following steps:
in the case where the exception context information is stack memory information, determining the exception context information includes: and the stack top pointer of the stack memory information corresponds to the information stored in the memory address from the memory address at the third preset distance before the position corresponding to the stack top pointer to the memory address at the fourth preset distance after the position corresponding to the stack top pointer.
Optionally, the storage medium is further arranged to store program code for performing the steps of:
in the case of saving the read memory data in the reserved memory of the board or the processing unit where the exception is located, after saving the read memory data in the reserved memory of the board or the processing unit where the exception is located, the method further includes:
and after the abnormality is recovered or the single board or the processing unit where the abnormality is located is restarted, the memory data stored in the reserved memory is sent to one or more nonvolatile memories.
Alternatively, in the present embodiment, the storage medium may include, but is not limited to: a U-disk, a Read-Only Memory (ROM), a random access Memory (RAM, random Access Memory), a removable hard disk, a magnetic disk, or an optical disk, or other various media capable of storing program codes.
Optionally, in this embodiment, the processor executes according to program code stored in the storage medium: determining a memory address range to be transferred in a memory of the system according to abnormal context information of the system; reading memory data corresponding to the determined memory address range; and sending the read memory data to one or more nonvolatile memories, and/or storing the read memory data into a reserved memory of a single board or a processing unit where the abnormality is located.
Optionally, in this embodiment, the processor executes according to program code stored in the storage medium: according to the abnormal context information of the system, determining the memory address range of the memory of the system, which needs to be transferred, comprises the following steps: judging whether the memory address pointed by the abnormal context information is valid or not; and under the condition that the judgment result is yes, determining the memory address range needing to be transferred to be: and a memory address range from a memory address of a first predetermined distance before the memory address pointed by the abnormal context information to a memory address of a second predetermined distance after the memory address pointed by the abnormal context information.
Optionally, in this embodiment, the processor executes according to program code stored in the storage medium: according to the abnormal context information of the system, determining the memory address range of the memory of the system, which needs to be transferred, comprises the following steps: under the condition that the number of the abnormal context information is multiple, determining the memory address range which corresponds to each abnormal context information and needs to be transferred; merging the overlapped memory address ranges under the condition that the memory address ranges which are required to be restored and correspond to the determined abnormal context information are overlapped; and determining the combined memory address range as the memory address range needing to be transferred.
Optionally, in this embodiment, the processor executes according to program code stored in the storage medium: before determining the memory address range of the memory to be transferred of the system according to the abnormal context information of the system, the method further comprises the following steps: in the case where the exception context information is stack memory information, determining the exception context information includes: and the stack top pointer of the stack memory information corresponds to the information stored in the memory address from the memory address at the third preset distance before the position corresponding to the stack top pointer to the memory address at the fourth preset distance after the position corresponding to the stack top pointer.
Optionally, in this embodiment, the processor executes according to program code stored in the storage medium: in the case of saving the read memory data in the reserved memory of the board or the processing unit where the exception is located, after saving the read memory data in the reserved memory of the board or the processing unit where the exception is located, the method further includes: after the exception is recovered or the single board or the processing unit where the exception is located is restarted, the memory data stored in the reserved memory is sent to one or more nonvolatile memories
Alternatively, specific examples in this embodiment may refer to examples described in the foregoing embodiments and optional implementations, and this embodiment is not described herein.
It will be appreciated by those skilled in the art that the modules or steps of the application described above may be implemented in a general purpose computing device, they may be concentrated on a single computing device, or distributed across a network of computing devices, they may alternatively be implemented in program code executable by computing devices, so that they may be stored in a memory device for execution by computing devices, and in some cases, the steps shown or described may be performed in a different order than that shown or described, or they may be separately fabricated into individual integrated circuit modules, or multiple modules or steps within them may be fabricated into a single integrated circuit module for implementation. Thus, the present application is not limited to any specific combination of hardware and software.
The above description is only of the preferred embodiments of the present application and is not intended to limit the present application, but various modifications and variations can be made to the present application by those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application should be included in the protection scope of the present application.

Claims (8)

1. An exception handling method, comprising:
determining a memory address range to be transferred in a memory of a system according to abnormal context information of the system;
reading the memory data corresponding to the determined memory address range;
transmitting the read memory data to one or more nonvolatile memories, and/or storing the read memory data to a reserved memory of a single board or a processing unit where the abnormality is located;
wherein the abnormal context information includes: at least one of CPU register information and stack memory information, said determining said memory address range for which said memory of said system needs to be restored based on said exception context information for said exception of said system comprising:
judging whether the memory address pointed by the abnormal context information is valid or not;
and under the condition that the judgment result is yes, determining the memory address range needing to be restored as follows: and a memory address range from a memory address of a first preset distance before the memory address pointed by the abnormal context information to a memory address of a second preset distance after the memory address pointed by the abnormal context information.
2. The method of claim 1, wherein determining the memory address range that the memory of the system needs to be restored based on the exception context information for the exception of the system comprises:
under the condition that the number of the abnormal context information is multiple, determining the memory address range which corresponds to each abnormal context information and needs to be transferred;
merging the overlapped memory address ranges under the condition that the memory address ranges which are required to be restored and correspond to the determined abnormal context information are overlapped;
and determining the combined memory address range as the memory address range needing to be transferred.
3. The method of claim 1, further comprising, prior to determining the memory address range that the memory of the system needs to be restored based on the exception context information for the exception of the system:
in the case that the abnormal context information is stack memory information, determining the abnormal context information includes: and the stack top pointer of the stack memory information corresponds to the information stored in the memory address of the third preset distance before the position to the memory address of the fourth preset distance after the position corresponding to the stack top pointer.
4. A method according to any one of claims 1 to 3, wherein in the case of saving the read memory data into the reserved memory of the board or processing unit in which the exception is located, after saving the read memory data into the reserved memory of the board or processing unit in which the exception is located, further comprising:
and after the abnormality is recovered or the single board or the processing unit where the abnormality is located is restarted, the memory data stored in the reserved memory is sent to one or more nonvolatile memories.
5. An abnormality processing apparatus, comprising:
the first determining module is used for determining a memory address range which needs to be transferred in a memory of the system according to abnormal context information of the system;
the reading module is used for reading the memory data corresponding to the determined memory address range;
a first sending module, configured to send the read memory data to one or more nonvolatile memories, and/or,
the storage module is used for storing the read memory data into a reserved memory of a single board or a processing unit where the abnormality is located;
wherein the first determining module includes:
the judging unit is used for judging whether the memory address pointed by the abnormal context information is valid or not;
the first determining unit is configured to determine, when the determination result is yes, that the memory address range that needs to be restored is: and a memory address range from a memory address of a first preset distance before the memory address pointed by the abnormal context information to a memory address of a second preset distance after the memory address pointed by the abnormal context information.
6. The apparatus of claim 5, wherein the first determining module comprises:
the second determining unit is used for respectively determining memory address ranges which are needed to be transferred and correspond to the abnormal context information when the abnormal context information is a plurality of;
the merging unit is used for merging the overlapped memory address ranges under the condition that the memory address ranges which are required to be transferred and correspond to the determined abnormal context information are overlapped;
and the third determining unit is used for determining the combined memory address range as the memory address range needing to be transferred.
7. The apparatus as recited in claim 5, further comprising:
the second determining module is configured to determine, when the abnormal context information is stack memory information, that the abnormal context information includes: and the stack top pointer of the stack memory information corresponds to the information stored in the memory address of the third preset distance before the position to the memory address of the fourth preset distance after the position corresponding to the stack top pointer.
8. The apparatus according to any one of claims 5 to 7, further comprising:
and the second sending module is used for sending the memory data stored in the reserved memory to one or more nonvolatile memories after the abnormality is recovered or the abnormality is restarted under the condition that the read memory data is stored in the reserved memory of the single board or the processing unit where the abnormality is located.
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Publication number Priority date Publication date Assignee Title
CN111209164B (en) * 2020-01-03 2023-09-26 杭州迪普科技股份有限公司 Abnormality information storage method and device, electronic equipment and storage medium
CN112860469A (en) * 2021-02-04 2021-05-28 百果园技术(新加坡)有限公司 Method, device, equipment and storage medium for collecting information of katon log

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101299192A (en) * 2008-06-18 2008-11-05 中国科学院计算技术研究所 Non-aligning access and storage processing method
CN101853196A (en) * 2010-04-21 2010-10-06 中兴通讯股份有限公司 Method and device recording exceptional data
CN103226510A (en) * 2013-04-27 2013-07-31 华为技术有限公司 Method and device for analyzing vmcore file

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100535870C (en) * 2006-12-29 2009-09-02 中兴通讯股份有限公司 Embedded system progress abnormal tracking position-finding method
CN103186461B (en) * 2011-12-30 2016-07-06 重庆重邮信科通信技术有限公司 The store method of a kind of field data and restoration methods and relevant apparatus
CN103226499B (en) * 2013-04-22 2016-02-24 华为技术有限公司 A kind of method of the abnormal data recovered in internal storage and device
CN104899111B (en) * 2015-06-09 2018-03-20 烽火通信科技股份有限公司 A kind of method and system for handling home gateway system Kernel Panic

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101299192A (en) * 2008-06-18 2008-11-05 中国科学院计算技术研究所 Non-aligning access and storage processing method
CN101853196A (en) * 2010-04-21 2010-10-06 中兴通讯股份有限公司 Method and device recording exceptional data
CN103226510A (en) * 2013-04-27 2013-07-31 华为技术有限公司 Method and device for analyzing vmcore file

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
通信领域中嵌入式软件异常处理模块分析与实现;何先波等;《计算机工程》;20070505(第09期);全文 *

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