CN112882715B - Measurement and control device definition method, computer and definable measurement and control device - Google Patents
Measurement and control device definition method, computer and definable measurement and control device Download PDFInfo
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Abstract
The embodiment of the application belongs to the field of firmware generation, and relates to a measuring and controlling device defining method, which comprises the steps of determining preset control modules corresponding to the number and the types of chips and buses according to the chips and the buses required to be used in a test process; editing the control module and compiling the control module to generate FPGA firmware; determining an equipment tree file and a configuration file of a preset drive program according to the electrical connection relation between the chip and the bus; and packaging the FPGA file, the equipment number file and the driving program into measurement and control firmware. The application also provides a definable measurement and control device, computer equipment and a storage medium. The scheme can define the testing device according to the testing environment, and the application range of the testing device is wide.
Description
Technical Field
The present application relates to the field of firmware generation technologies, and in particular, to a method and an apparatus for defining a measurement and control apparatus, a computer device, and a storage medium.
Background
The traditional board test work is based on special test hardware. Later, a test tool based on software definition realized by FPGA is developed in the industry, specifically, the FPGA is used as a core of task processing, the test and information uploading effect is realized by respectively communicating with the universal board card and the upper computer through buses, and the corresponding universal board card and the corresponding measurement and control firmware are needed to realize aiming at different test scenes.
The measurement and control firmware is used for executing a xavier control board card, a user controls the board card to be tested to realize a test function through the measurement and control firmware, the measurement and control firmware comprises FPGA firmware and a driving program, the driving program is used for controlling hardware structures such as a physical interface, a memory and a register of the board card to be tested, and the FPGA firmware is used for executing a corresponding test function. In order to test a board to be tested, generally, a xavier control board needs to control the board to be tested through a plurality of chips and buses, and on the basis, a whole set of driving control needs to be provided. If the test and control firmware is compiled according to each group of boards to be tested, the code amount is very large, the compiling efficiency of the test and control firmware is low, and the test efficiency is extremely low.
Disclosure of Invention
The embodiment of the application aims to provide a method for generating measurement and control firmware so as to improve the compiling efficiency of the measurement and control firmware.
In order to solve the above technical problem, an embodiment of the present application provides a method for defining a measurement and control device, which adopts the following technical scheme:
a measurement and control device definition method comprises the following steps:
specifying the type of the FPGA integrated circuit;
generating a firmware according to the type of the FPGA integrated circuit and a chip carried by the mounting board card;
and burning the firmware onto a memory matched with the FPGA integrated circuit so as to control the measurement and control device to carry out measurement and control of corresponding types through the FPGA integrated circuit.
Further, the step of generating the firmware according to the type of the FPGA integrated circuit and the chip mounted on the mounting board specifically includes:
determining preset control modules corresponding to the number and the types of chips and buses according to the chips and the buses required to be used in the test process;
editing the control module and compiling the control module to generate FPGA firmware;
determining an equipment tree file and a configuration file of a preset drive program according to the electrical connection relation between the chip and the bus;
and packaging the FPGA file, the equipment tree file and the driving program into measurement and control firmware.
Further, the step of editing the control module and compiling the control module to generate the FPGA firmware specifically includes:
acquiring setting information corresponding to the control module, wherein the setting information comprises pin information corresponding to functions on the control module;
generating a TCL file corresponding to the control module according to the setting information and the pins of the FPGA integrated circuit distributed to the control module;
compiling the TCL file into FPGA firmware.
Further, the generating a TCL file corresponding to the control module according to the setting information and the pins of the FPGA integrated circuit allocated to the control module specifically includes:
reading at least one pin of the control module and a function corresponding to the pin;
the pins correspond to pins on an FPGA integrated circuit;
and generating a script statement for controlling the control module according to the corresponding function of the pin and the corresponding relation between the pin and the pin, and generating a corresponding TCL file.
Further, in the determining of the device tree file and the configuration file of the preset driver according to the electrical connection relationship between the chip and the bus, the determining method of the configuration file specifically includes:
determining a bus connected with a corresponding chip and a chip port according to the FPGA module and the electric connection relation between the chip and the bus;
and configuring and generating the configuration file according to the corresponding chip type, port and connected bus of the chip.
Further, the configuring and generating the configuration file according to the chip type, the port and the connected bus corresponding to the chip specifically includes:
extracting corresponding preset drive according to the type of the chip;
and editing the preset driver to designate a port for communicating with the chip and a bus protocol for communicating with the chip so as to generate the configuration file.
In order to solve the above technical problem, an embodiment of the present application further provides … …, which adopts the following technical solutions:
a definable measurement and control device, comprising:
the type appoints the module, is used for appointing the type of FPGA integrated circuit;
the firmware generation module is used for generating firmware according to the type of the FPGA integrated circuit and a chip carried by the mounting board card;
and the burning module is used for burning the firmware onto a memory matched with the FPGA integrated circuit so as to control the measurement and control device to carry out measurement and control of corresponding types through the FPGA integrated circuit.
Further, the firmware generation module includes:
the device determining module is used for determining preset control modules corresponding to the number and the types of the chips and the buses according to the chips and the buses required to be used in the testing process;
the FPGA firmware compiling module is used for editing the control module and compiling the control module to generate FPGA firmware;
the configuration file determining module is used for determining an equipment tree file and a configuration file of a preset drive program according to the electric connection relation between the chip and the bus;
and the packaging module is used for packaging the FPGA file, the equipment number file and the driving program into the measurement and control firmware.
In order to solve the above technical problem, an embodiment of the present application further provides a computer device, which adopts the following technical solutions:
a computer device comprising a memory and a processor, wherein the memory stores a computer program, and the processor implements the steps of the measurement and control apparatus defining method when executing the computer program.
In order to solve the above technical problem, an embodiment of the present application further provides a computer-readable storage medium, which adopts the following technical solutions:
a computer-readable storage medium, having a computer program stored thereon, which, when being executed by a processor, carries out the steps of a measurement and control device definition method as set forth above.
Compared with the prior art, the embodiment of the application mainly has the following beneficial effects: the method comprises the steps of determining a software version used by the integrated circuit according to the type of the FPGA integrated circuit, generating firmware according to a board card inserted into a measurement and control device under the current application environment, burning the firmware into a memory matched with the FPGA integrated circuit, and then performing corresponding test by using the generated firmware to match with the assembled board card.
Drawings
In order to more clearly illustrate the solution of the present application, the drawings needed for describing the embodiments of the present application will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present application, and that other drawings can be obtained by those skilled in the art without inventive effort.
FIG. 1 is a flow diagram of one embodiment of a measurement and control device definition method according to the present application;
FIG. 2 is a flowchart of step S20 in FIG. 1;
fig. 3 is a flowchart of step S22 in fig. 2;
FIG. 4 is a flowchart of step S222 in FIG. 3;
fig. 5 is a flowchart of step S23 in fig. 2;
FIG. 6 is a flowchart of step S232 in FIG. 5;
FIG. 7 is a schematic block diagram of one embodiment of a definable measurement and control device according to the application;
FIG. 8 is a block diagram of a firmware generation module of FIG. 7;
FIG. 9 is a schematic block diagram of one embodiment of a computer device according to the present application.
Detailed Description
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs; the terminology used in the description of the application herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application; the terms "including" and "having," and any variations thereof, in the description and claims of this application and the description of the above figures are intended to cover non-exclusive inclusions. The terms "first," "second," and the like in the description and claims of this application or in the above-described drawings are used for distinguishing between different objects and not for describing a particular order.
Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the application. The appearances of the phrase in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. It is explicitly and implicitly understood by one skilled in the art that the embodiments described herein can be combined with other embodiments.
In order to make the technical solutions better understood by those skilled in the art, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings.
Referring to fig. 1 to 6, a flowchart of an embodiment of a measurement and control device defining method according to the present application is shown. The measurement and control device definition method comprises the following steps:
step S10: specifying the type of the FPGA integrated circuit;
step S20: generating a firmware according to the type of the FPGA integrated circuit and a chip carried by the mounting board card;
step S30: and burning the firmware onto a memory matched with the FPGA integrated circuit so as to control the measurement and control device to carry out measurement and control of corresponding types through the FPGA integrated circuit.
The method comprises the steps of determining a software version used by the integrated circuit according to the type of the FPGA integrated circuit, generating firmware according to a board card inserted into a measurement and control device under the current application environment, burning the firmware into a memory matched with the FPGA integrated circuit, and then performing corresponding test by using the generated firmware to match with the assembled board card.
Further, the step 20 of generating a firmware according to the type of the FPGA integrated circuit and the chip mounted on the mounting board specifically includes:
step S21: determining preset control modules corresponding to the number and the types of chips and buses according to the chips and the buses required to be used in the test process;
specifically, the test environment in which the measurement and control firmware is applied generally adopts a physical structure including an FPGA integrated circuit, a chip, and a bus connecting the FPGA integrated circuit and each external chip, wherein the chip has a certain preset function, and includes a chip, such as a dmm001 multimeter chip, which is arranged on an external board card to realize specific functions such as signal reception; and external chips for assisting the FPGA integrated circuit, such as a TCA9548 chip for assisting the FPGA integrated circuit in connecting and managing the multi-speed external board card, and a CAT9555 chip for controlling the two GPIO ports to receive and transmit data on the I2C bus. The chips can be integrated with the FPGA integrated circuit on a circuit board, or can be physically independent external boards, and the chips are communicated with the FPGA integrated circuit through a bus. And the FPGA integrated circuit runs with a driving program to realize the establishment of communication with each chip through a bus, and also runs with FPGA firmware to call each chip to acquire corresponding information.
And the user controls the FPGA integrated circuit through a preset software interface on the FPGA integrated circuit and a high-level language so as to call the whole test environment.
And determining a chip and an applied bus required by the test environment according to the task specifically related to the test environment, wherein the chip and the applied bus specifically used by the test environment can be specified by a user or can be identified and preset by hardware and other means. And then determining a control module to be used according to the used chip and bus, wherein the control module comprises an FPGA firmware program for controlling the corresponding chip and bus, the FPGA firmware program is written in advance, but the FPGA firmware program can be used in a test environment only by being edited according to the test environment.
Step S22: editing the control module and compiling the control module to generate FPGA firmware;
specifically, the extracted preset control module is edited to adapt to the current test environment, and then the edited content of the control module is compiled to generate the FPGA firmware.
Step S23: determining an equipment tree file and a configuration file of a preset drive program according to the electrical connection relation between the chip and the bus;
specifically, the drivers of the chip and the board card may be preset, but the drivers need to be configured according to different hardware structures of different test environments so as to be used in the corresponding test environments, and specifically, the configuration file of the preset driver is modified according to the point connection relationship between the chip and the bus, so as to specify the operation path of the electrical signal, thereby realizing the generation of the driver.
Step S24: and packaging the FPGA file, the equipment tree file and the driving program into measurement and control firmware.
And packaging the FPGA file, the equipment tree file and the driving program to obtain complete measurement and control firmware so as to control the current test environment. According to the scheme, the test control firmware can be quickly compiled according to the bus, the chip and the connecting structure which are required to be used in the test process, and the compiling efficiency of the test control firmware is high.
Further, the step S22: the step of editing the control module and compiling the control module to generate the FPGA firmware specifically includes:
step S221: acquiring setting information corresponding to the control module, wherein the setting information comprises pin information corresponding to functions on the control module;
specifically, the control module stores functions included in the control module, and records pin information related to the functions, for example, a pin corresponding to a data input/output function, a pin corresponding to a control signal input/output function, a pin corresponding to a clock signal input/output function, and the like. The chip is provided with pins, and the chip is operated under the control of a program in the control module and communicates with the outside through the pins to realize functions.
Step S222: generating a TCL file corresponding to the control module according to the setting information and the pins of the FPGA integrated circuit distributed to the control module;
specifically, the finally generated FPGA firmware runs on the FPGA integrated circuit, and in one embodiment, the FPGA integrated circuit is an integrated circuit and has a plurality of pins, the pins receive and transmit signals according to the definition of a user, and the pins on the FPGA integrated circuit correspond to the pins on the control module to receive and transmit information, so that the FPGA integrated circuit is in communication connection with the chip corresponding to the control module. And adjusting the control module according to the setting information and the pins of the FPGA integrated circuit distributed to the control module, and then generating a script file in a TCL format.
Step S223: compiling the TCL file into FPGA firmware.
The TCL file is compiled to generate the final binary FPGA firmware. According to the scheme, the preset control module corresponding to the chip is called, the content of the control module is modified, so that the control module can work and simplify the changing operation of the FPGA firmware on a single chip and a bus under a test environment, the writing process of the FPGA firmware is transparent to a user, and the writing efficiency of the FPGA firmware is improved.
Further, the step S222: generating a TCL file corresponding to the control module according to the setting information and the pins of the FPGA integrated circuit distributed to the control module, and specifically comprising:
step S2221: reading at least one pin of the control module and a function corresponding to the pin;
specifically, the functions of the control module and the corresponding relationship with the pins of the control module are preset through file records.
Step S2222: the pins correspond to pins on an FPGA integrated circuit;
and pins on the FPGA integrated circuit are distributed to the pins of the control module, so that the FPGA integrated circuit is communicated with the control module through the corresponding pins.
Step S2223: and generating a script statement for controlling the control module according to the corresponding function of the pin and the corresponding relation between the pin and the pin, and generating a corresponding TCL file.
Specifically, the control module is adjusted through the function of the control module, the pins corresponding to the function and the pins on the FPGA integrated circuit distributed by the pins, and then the TCL file is generated for the adjusted control module. The scheme can simplify the generation of the TCL file, the programming process of the TCL file is transparent to a user, and the generation efficiency of the TCL file is high.
Further, the step S23: determining an equipment tree file and a configuration file of a preset driver according to the electrical connection relation between the chip and the bus, wherein the determination method of the configuration file specifically comprises the following steps:
step S231: determining a bus connected with a corresponding chip and a chip port according to the FPGA module and the electric connection relation between the chip and the bus;
specifically, the FPGA module is preset through an ARM driver required by the communication between the chip and the bus, is stored in a memory provided by a test environment, operates according to a configuration file, and edits the configuration file according to the connection relation among the FPGA integrated circuit, the chip and the bus so as to adapt to the current test environment.
Step S232: and configuring and generating the configuration file according to the corresponding chip type, port and connected bus of the chip.
And calling a corresponding driver according to the type of the chip, and configuring a corresponding configuration file to enable the driver to adapt to the current test environment. The scheme simplifies the writing process of the driver, and the programming process of the driver is transparent to users, so that the generation efficiency of the driver is high.
Further, the step S232: configuring and generating the configuration file according to the chip type, the port and the connected bus corresponding to the chip specifically comprises:
step S2321: extracting corresponding preset drive according to the type of the chip;
step S2322: editing the preset driver to specify a port for communicating with the chip, and specifying a bus protocol for communicating with the chip to generate the configuration file.
The scheme has high generation efficiency of the driver.
In this embodiment, an electronic device (for example, the server/terminal device shown in fig. 1) on which a measurement and control device definition method operates may receive a request through a wired connection manner or a wireless connection manner. It should be noted that the wireless connection means may include, but is not limited to, a 3G/4G connection, a WiFi connection, a bluetooth connection, a WiMAX connection, a Zigbee connection, a uwb (ultra wideband) connection, and other wireless connection means now known or developed in the future.
It will be understood by those skilled in the art that all or part of the processes of the methods of the embodiments described above can be implemented by a computer program, which can be stored in a computer-readable storage medium, and can include the processes of the embodiments of the methods described above when the computer program is executed. The storage medium may be a non-volatile storage medium such as a magnetic disk, an optical disk, a Read-Only Memory (ROM), or a Random Access Memory (RAM).
It should be understood that, although the steps in the flowcharts of the figures are shown in order as indicated by the arrows, the steps are not necessarily performed in order as indicated by the arrows. The steps are not performed in the exact order shown and may be performed in other orders unless explicitly stated herein. Moreover, at least a portion of the steps in the flow chart of the figure may include multiple sub-steps or multiple stages, which are not necessarily performed at the same time, but may be performed at different times, which are not necessarily performed in sequence, but may be performed alternately or alternately with other steps or at least a portion of the sub-steps or stages of other steps.
With further reference to fig. 6, as an implementation of the method shown in fig. 2, the present application provides an embodiment of a definable measurement and control apparatus, where the embodiment of the apparatus corresponds to the embodiment of the method shown in fig. 2, and the apparatus may be specifically applied to various electronic devices.
As shown in fig. 7 and 8, the definable measurement and control device according to this embodiment includes:
the type appoints the module 1, is used for appointing the type of FPGA integrated circuit;
the firmware generation module 2 is used for generating firmware according to the type of the FPGA integrated circuit and a chip carried by the mounting board card;
and the burning module 3 is used for burning the firmware onto a memory matched with the FPGA integrated circuit so as to control the measurement and control device to carry out measurement and control of corresponding types through the FPGA integrated circuit.
Further, the firmware generation module 1 includes:
a device determination module 100, configured to determine a preset control module corresponding to the number and types of chips and buses according to the chips and buses that need to be used in the test process;
the FPGA firmware compiling module 200 is used for editing the control module and compiling the control module to generate FPGA firmware;
a configuration file determining module 300, configured to determine an equipment tree file and a configuration file of a preset driver according to an electrical connection relationship between the chip and the bus;
and the packaging module 400 is used for packaging the FPGA file, the equipment number file and the driver into the measurement and control firmware.
And packaging the FPGA file, the equipment tree file and the driving program to obtain complete measurement and control firmware so as to control the current test environment. According to the scheme, the test control firmware can be quickly compiled according to the bus, the chip and the connecting structure which are required to be used in the test process, and the compiling efficiency of the test control firmware is high.
Further, the FPGA firmware compiling module 200 specifically includes:
the setting information obtaining submodule 201 is configured to obtain setting information corresponding to the control module, where the setting information includes an address and/or an IO pin;
the TCL file generation submodule 202 is used for generating a TCL file corresponding to the control module according to the setting information and the pins of the FPGA integrated circuit distributed to the control module;
and the compiling submodule 203 is used for compiling the TCL file into FPGA firmware.
According to the scheme, the preset control module corresponding to the chip is called, the content of the control module is modified, so that the control module can work under a test environment, the FPGA firmware can be changed into the operation of the single chip and the bus in a simplified mode, the writing process of the FPGA firmware is transparent to a user, and the writing efficiency of the FPGA firmware is improved.
Further, the TCL file generation sub-module 202 specifically includes:
the control module extraction submodule 2021 is configured to read at least one pin of the control module and a function corresponding to the pin;
the connecting sub-module 2022 is used for corresponding the pins to pins on the FPGA integrated circuit;
the binary data generating sub-module 2023 is configured to generate a script statement for controlling the control module according to the function corresponding to the pin and the correspondence between the pin and the pin, and generate a corresponding TCL file.
The scheme can simplify the generation of the TCL file, the programming process of the TCL file is transparent to a user, and the generation efficiency of the TCL file is high.
Further, the configuration file determining module 300 specifically includes:
the connection configuration determining submodule 301 is configured to determine a bus to which a corresponding chip is connected and a chip port according to the FPGA module and an electrical connection relationship between the chip and the bus;
the configuration submodule 302 is configured to configure and generate the configuration file according to the chip type, the port and the connected bus corresponding to the chip.
The scheme simplifies the writing process of the driver, and the programming process of the driver is transparent to users, so that the generation efficiency of the driver is high.
Further, the configuration sub-module 302 specifically includes:
a preset driver extracting submodule 3021 configured to extract a corresponding preset driver according to the type of the chip;
a configuration file editing sub-module 3022, which edits the preset driver to designate a port for communicating with the chip, and designates a bus protocol for communicating with the chip, so as to generate the configuration file.
The scheme has high generation efficiency of the driver.
In order to solve the technical problem, an embodiment of the present application further provides a computer device. Referring to fig. 9, fig. 9 is a block diagram of a basic structure of a computer device according to the present embodiment.
The computer device 6 comprises a memory 61, a processor 62, a network interface 63 communicatively connected to each other via a system bus. It is noted that only a computer device 6 having components 61-63 is shown, but it is understood that not all of the shown components are required to be implemented, and that more or fewer components may be implemented instead. As will be understood by those skilled in the art, the computer device is a device capable of automatically performing numerical calculation and/or information processing according to a preset or stored instruction, and the hardware includes, but is not limited to, a microprocessor, an Application Specific Integrated Circuit (ASIC), a Programmable Gate Array (FPGA), a Digital Signal Processor (DSP), an embedded device, and the like.
The computer device can be a desktop computer, a notebook, a palm computer, a cloud server and other computing devices. The computer equipment can carry out man-machine interaction with a user through a keyboard, a mouse, a remote controller, a touch panel or voice control equipment and the like.
The memory 61 includes at least one type of readable storage medium including a flash memory, a hard disk, a multimedia card, a card type memory (e.g., SD or DX memory, etc.), a Random Access Memory (RAM), a Static Random Access Memory (SRAM), a Read Only Memory (ROM), an Electrically Erasable Programmable Read Only Memory (EEPROM), a Programmable Read Only Memory (PROM), a magnetic memory, a magnetic disk, an optical disk, etc. In some embodiments, the memory 61 may be an internal storage unit of the computer device 6, such as a hard disk or a memory of the computer device 6. In other embodiments, the memory 61 may also be an external storage device of the computer device 6, such as a plug-in hard disk, a Smart Media Card (SMC), a Secure Digital (SD) Card, a Flash memory Card (Flash Card), and the like, which are provided on the computer device 6. Of course, the memory 61 may also comprise both an internal storage unit of the computer device 6 and an external storage device thereof. In this embodiment, the memory 61 is generally used for storing an operating system and various application software installed in the computer device 6, for example, a program code of a measurement and control device defining method. Further, the memory 61 may also be used to temporarily store various types of data that have been output or are to be output.
The processor 62 may be a Central Processing Unit (CPU), controller, microcontroller, microprocessor, or other data Processing chip in some embodiments. The processor 62 is typically used to control the overall operation of the computer device 6. In this embodiment, the processor 62 is configured to run a program code stored in the memory 61 or process data, for example, a program code of the measurement and control device defining method.
The network interface 63 may comprise a wireless network interface or a wired network interface, and the network interface 63 is typically used for establishing a communication connection between the computer device 6 and other electronic devices.
The present application provides another embodiment, which is to provide a computer-readable storage medium storing a measurement and control device definition program, where the measurement and control device definition program is executable by at least one processor to cause the at least one processor to perform the steps of the measurement and control device definition method.
Through the above description of the embodiments, those skilled in the art will clearly understand that the method of the above embodiments can be implemented by software plus a necessary general hardware platform, and certainly can also be implemented by hardware, but in many cases, the former is a better implementation manner. Based on such understanding, the technical solutions of the present application may be embodied in the form of a software product, which is stored in a storage medium (such as ROM/RAM, magnetic disk, optical disk) and includes instructions for enabling a terminal device (such as a mobile phone, a computer, a server, an air conditioner, or a network device) to execute the method according to the embodiments of the present application.
It is to be understood that the above-described embodiments are merely illustrative of some, but not restrictive, of the broad invention, and that the appended drawings illustrate preferred embodiments of the invention and do not limit the scope of the invention. This application is capable of embodiments in many different forms and is provided for the purpose of enabling a thorough understanding of the disclosure of the application. Although the present application has been described in detail with reference to the foregoing embodiments, it will be apparent to one skilled in the art that the present application may be practiced without modification or with equivalents of some of the features described in the foregoing embodiments. All equivalent structures made by using the contents of the specification and the drawings of the present application are directly or indirectly applied to other related technical fields and are within the protection scope of the present application.
Claims (8)
1. A method for defining a measurement and control device is characterized in that:
specifying the type of the FPGA integrated circuit;
generating a firmware according to the type of the FPGA integrated circuit and a chip carried by the mounting board card;
burning the firmware onto a memory matched with the FPGA integrated circuit so as to control the measurement and control device to carry out measurement and control of corresponding types through the FPGA integrated circuit;
generating a firmware according to the type of the FPGA integrated circuit and a chip carried by the mounting board card specifically comprises:
determining preset control modules corresponding to the number and the types of chips and buses according to the chips and the buses required to be used in the test process;
editing the control module and compiling the control module to generate FPGA firmware;
determining an equipment tree file and a configuration file of a preset drive program according to the electrical connection relation between the chip and the bus;
and packaging the FPGA firmware, the equipment tree file and the driving program into measurement and control firmware.
2. The measurement and control device defining method according to claim 1, wherein the step of editing the control module and compiling the control module to generate the FPGA firmware specifically comprises:
acquiring setting information corresponding to the control module, wherein the setting information comprises pin information corresponding to functions on the control module;
generating a TCL file corresponding to the control module according to the setting information and the pins of the FPGA integrated circuit distributed to the control module;
compiling the TCL file into FPGA firmware.
3. The measurement and control device defining method according to claim 2, wherein: generating a TCL file corresponding to the control module according to the setting information and the pins of the FPGA integrated circuit distributed to the control module, specifically comprising:
reading at least one pin of the control module and a function corresponding to the pin;
the pins correspond to pins on an FPGA integrated circuit;
and generating a script statement for controlling the control module according to the corresponding function of the pin and the corresponding relation between the pin and the pin, and generating a corresponding TCL file.
4. The measurement and control device defining method according to claim 3, wherein in the configuration files of the device tree file and the preset driver according to the electrical connection relationship between the chip and the bus, the determining method of the configuration files specifically comprises:
determining a bus connected with a corresponding chip and a chip port according to the electric connection relation among the FPGA module, the chip and the bus;
and configuring and generating the configuration file according to the corresponding chip type, port and connected bus of the chip.
5. The measurement and control device defining method according to claim 4, wherein the configuring and generating the configuration file according to the chip type, the port and the connected bus corresponding to the chip specifically comprises:
extracting corresponding preset drive according to the type of the chip;
and editing the preset driver to designate a port for communicating with the chip and a bus protocol for communicating with the chip so as to generate the configuration file.
6. A definable measurement and control device is characterized in that:
the type appoints the module, is used for appointing the type of FPGA integrated circuit;
the firmware generation module is used for generating firmware according to the type of the FPGA integrated circuit and a chip carried by the mounting board card;
the burning module is used for burning the firmware onto a memory matched with the FPGA integrated circuit so as to control the measurement and control device to carry out measurement and control of corresponding types through the FPGA integrated circuit;
the firmware generation module specifically includes:
the device determining module is used for determining preset control modules corresponding to the number and the types of the chips and the buses according to the chips and the buses required to be used in the testing process;
the FPGA firmware compiling module is used for editing the control module and compiling the control module to generate FPGA firmware;
the configuration file determining module is used for determining an equipment tree file and a configuration file of a preset drive program according to the electric connection relation between the chip and the bus;
and the packaging module is used for packaging the FPGA firmware, the equipment tree file and the driving program into the measurement and control firmware.
7. A computer arrangement comprising a memory in which a computer program is stored and a processor which, when executing the computer program, carries out the steps of a measurement and control device definition method according to any one of claims 1 to 5.
8. A computer-readable storage medium, characterized in that the computer-readable storage medium has stored thereon a computer program which, when being executed by a processor, carries out the steps of a measurement and control device definition method according to any one of claims 1 to 5.
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| CN103959709B (en) * | 2011-09-30 | 2017-06-20 | 西门子瑞士有限公司 | Using the component of definition come dynamic configuration and the tool and method for realizing equipment firmware |
| US20140101500A1 (en) * | 2012-10-05 | 2014-04-10 | Lsi Corporation | Circuits and methods for functional testing of integrated circuit chips |
| CN104050068B (en) * | 2014-05-23 | 2016-06-15 | 北京兆易创新科技股份有限公司 | The method of FPGA Debugging and device in MCU chip |
| CN105004984A (en) * | 2015-06-25 | 2015-10-28 | 深圳市芯海科技有限公司 | Automatic chip testing method |
| EP3420421B1 (en) * | 2016-02-22 | 2020-06-24 | Analog Devices Global Unlimited Company | System and method for configuring a measurement module |
| CN107064775A (en) * | 2017-04-20 | 2017-08-18 | 北京品驰医疗设备有限公司 | A kind of system that distributed reliability test is carried out to printed circuit board (PCB) |
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| EP3791347A4 (en) * | 2018-05-06 | 2022-05-25 | Strong Force TX Portfolio 2018, LLC | Methods and systems for improving machines and systems that automate execution of distributed ledger and other transactions in spot and forward markets for energy, compute, storage and other resources |
| CN111813432B (en) * | 2020-06-01 | 2024-10-08 | 大唐微电子技术有限公司 | FPGA configuration upgrading method and FPGA platform |
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