CN112864183A - Pixel structure for improving transmission delay - Google Patents
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- CN112864183A CN112864183A CN202110062018.4A CN202110062018A CN112864183A CN 112864183 A CN112864183 A CN 112864183A CN 202110062018 A CN202110062018 A CN 202110062018A CN 112864183 A CN112864183 A CN 112864183A
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- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14603—Special geometry or disposition of pixel-elements, address-lines or gate-electrodes
- H01L27/14605—Structural or functional details relating to the position of the pixel elements, e.g. smaller pixel elements in the center of the imager compared to pixel elements at the periphery
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- H01L27/144—Devices controlled by radiation
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- H01L27/14601—Structural or functional details thereof
- H01L27/14609—Pixel-elements with integrated switching, control, storage or amplification elements
- H01L27/14612—Pixel-elements with integrated switching, control, storage or amplification elements involving a transistor
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Abstract
A pixel structure for improving transmission delay comprises a photodiode for collecting incident light and performing photoelectric conversion to generate carriers, a plurality of field effect transistors including transmission transistors, and a floating diffusion region; the method comprises the steps of arranging a plurality of metal blocks in an upper dielectric layer of the photodiode, and applying different voltages to the metal blocks, or arranging a single metal block in a shallow groove isolation region at the side of the photodiode, and applying voltages to the metal blocks, or combining the two modes, so that electric field distribution with directionality is formed in the photodiode. Therefore, the invention can realize that all the carriers in the photodiode are completely transmitted to the floating diffusion region within the short turn-on time of the transmission transistor, thereby improving the transmission efficiency of the carriers in the photodiode and improving the transmission delay problem.
Description
Technical Field
The invention belongs to the technical field of integrated circuit image sensors, and particularly relates to a pixel structure for improving transmission delay.
Background
An image sensor refers to a device that converts an optical signal into an electrical signal. The image sensor cell class mainly includes Charge-coupled devices (CCD) and complementary metal oxide semiconductor (CMOS image sensor) devices.
Compared with the traditional CCD sensor, the CMOS image sensor has the characteristics of low power consumption, low cost, compatibility with the CMOS process and the like, so that the CMOS image sensor is more and more widely applied to the fields of consumer electronics, automotive electronics, security monitoring, industrial monitoring, biotechnology, medicine and the like.
The CMOS image sensor comprises a pixel array formed by a plurality of pixel units, a row driver, a column driver, a time sequence control logic, an AD converter, a data bus output interface, a control interface and other module units. The pixel unit is a core device for realizing light sensing of the image sensor.
In the prior art, the most common 4T (4Transistors) pixel unit usually includes an active pixel structure composed of a photodiode (Photo Diode), 4 field effect Transistors (fets) and a Floating Diffusion (Floating Diffusion), and the 4Transistors are respectively a Reset (RST) transistor, a Transmission (TX) transistor, a Source Follower (SF) and a Select (SEL) transistor. In the above device, the photodiode is a photosensitive unit, and generates carriers based on incident light, thereby realizing light collection and photoelectric conversion; the transfer transistor transfers carriers generated by the photodiode to the floating diffusion region by gate control thereof, and then converts electrons into a voltage signal by a subsequent readout circuit to read out.
Referring to fig. 1, fig. 1 is a schematic cross-sectional view of a pixel structure of an image sensor based on a conventional technical solution. As shown in fig. 1, a photodiode side shallow trench isolation region 102 and a photodiode 103 are formed on a P-type substrate 101, a P-type isolation region 106 is formed between the photodiode 103 and the photodiode side shallow trench isolation region 102, and a photodiode surface P + type isolation region 107 is used for isolating the influence of silicon surface defects. Electrons generated in the photodiode 103 are transferred to the floating diffusion region 104 through the transfer transistor 105.
In a dark light environment, in order to improve an image effect, a high-sensitivity pixel index is often required, so that the signal-to-noise ratio is improved. Because it is relatively simple to make the area of the photodiode of the pixel large, the sensitivity is generally improved by increasing the area of a single pixel, thereby increasing the signal-to-noise ratio. However, when the area of the photodiode of the pixel is increased, it is difficult to transfer all the carriers in the photodiode to the floating diffusion region during the on time of the transfer transistor. If a carrier remains in the photodiode during this time, image lag is formed.
For a small pixel, isolation regions around the photodiode (such as the P-type isolation region 106 and the P + -type isolation region 107 shown in fig. 1) affect electric field distribution in the photodiode, and an electric field with directivity is easily formed, facilitating carrier transmission. For a large pixel, when the area of the photodiode is increased, the influence of an isolation region around the photodiode is basically negligible, and the electric field distribution in the photodiode becomes flat and has no directivity any more, which is not beneficial to carrier transmission, so that carriers remain in the photodiode to form image lag.
It is clear to those skilled in the art that the electric field distribution in the photodiode can be adjusted by using multiple sub-region doping, so that a directional electric field distribution is formed in the photodiode of a large pixel, but this method requires additional process steps such as photolithography and implantation, and the process is complicated. Therefore, a simple method for improving carrier transmission efficiency is needed for a large pixel structure.
Disclosure of Invention
Aiming at the defects of the prior art, the invention provides a pixel structure for improving transmission delay, and the pixel structure is characterized in that a metal block is arranged in a dielectric layer above a photodiode or a shallow groove isolation region on the side edge of the photodiode, and proper voltage is applied to the metal block, so that electric field distribution with directionality is formed in the photodiode, the transmission capability of carriers in the photodiode is improved, and the problem of image delay is solved.
In order to achieve the purpose, the technical scheme of the invention is as follows:
a pixel structure that improves transmission lag, comprising:
a photodiode for collecting incident light and performing photoelectric conversion to generate electrons;
a plurality of field effect transistors including a pass transistor;
a floating diffusion region;
and arranging a plurality of metal blocks in an upper dielectric layer of the photodiode, and applying different voltages to the metal blocks, or arranging a single metal block in a shallow slot isolation region at the side of the photodiode, and applying voltages to the metal blocks, or combining the two modes, so that directional electric field distribution is formed in the photodiode.
Further, the plurality of metal blocks are composed of a plurality of single-layer metal blocks which can be arranged only in a single dielectric layer, or a plurality of multi-layer metal blocks which can cross a plurality of multi-layer dielectric layers, or at least one single-layer metal block and at least one multi-layer metal block, wherein the single-layer metal block and the multi-layer metal block are partially exposed on the surface of the photodiode.
Furthermore, the single-layer metal block is completely arranged in the same dielectric layer above the photodiode, or partially arranged in the same dielectric layer above the photodiode, or completely arranged in different dielectric layers above the photodiode.
Furthermore, the plurality of metal blocks are all arranged in different dielectric layers above the photodiode, the length of each metal block in the horizontal direction is different, the shortest metal block is located in the dielectric layer closest to the photodiode, the longest metal block is located in the dielectric layer farthest from the photodiode, and one end of each metal block is aligned in the projection direction.
Furthermore, the number of the metal blocks is 3, the first metal block is arranged in the first dielectric layer above the photodiode, the second metal block is divided into three sections, the first section and the second section are respectively arranged in the first dielectric layer and the second dielectric layer above the photodiode, and the third section penetrates through an interface between the first dielectric layer and the second dielectric layer and is respectively connected with the first section and the second section of the second metal block; the third metal block is divided into three sections, the first section and the second section are respectively arranged in the first dielectric layer and the third dielectric layer above the photodiode, and the third section penetrates through the interfaces among the first dielectric layer, the second dielectric layer and the third dielectric layer and is respectively connected with the first section and the second section of the third metal block; wherein the distances between the first dielectric layer, the second dielectric layer, the third dielectric layer and the photodiode are sequentially increased
Further, the number of the plurality of metal blocks is equal to 2 and when the single metal block is not provided in the photodiode-side shallow trench isolation region, the voltage applied to the metal block far from the transfer transistor is V1, the voltage applied to the metal block near the transfer transistor is Vn, and | V1| > | Vn |.
Further, V1<0V, Vn ═ 0V.
Further, the number of the plurality of metal blocks is greater than 2, and when the single metal block is not provided in the photodiode-side shallow trench isolation region, voltages are applied to at least 2 of the metal blocks, the applied voltages are V1, V2, V3 … … Vn respectively at the farthest to the nearest distances from the transfer transistor, and | V1| > | V2| > | V3| > … … > | Vn |.
Further, when the number of the plurality of metal blocks is greater than or equal to 2 and the single metal block is provided in the photodiode-side shallow trench isolation region, a voltage V1 is applied to the single metal block, and a voltage V2 and a voltage V3 … … Vn are applied to at least 1 of the plurality of metal blocks, respectively, at a distance from the transfer transistor closest to the transfer transistor, and | V1| > | V2| > | V3| > … … > | Vn |.
Further, the values of V1, V2, V3 … … Vn are equal to or less than 0V, so that an electric field distribution is formed in the photodiode in a direction away from the transfer transistor.
As can be seen from the above technical solutions, in the technical solution of the present invention, a metal block is disposed above or on a side of the photodiode, and a proper voltage is applied to the metal block, so that an electric field distribution having directionality is formed in the photodiode. A force directed away from the photodiode in the direction of the transfer transistor is obtained for the carriers, which contributes to the drift of the carriers in the photodiode during the read-out phase to the vicinity of the transfer transistor and further to the transfer through the transfer transistor into the floating diffusion. By the method, all carriers in the photodiode can be completely transmitted to the floating diffusion region within the turn-on time of the transmission transistor, so that the transmission efficiency of the carriers in the photodiode is improved, and the problem of transmission delay is solved.
Drawings
FIG. 1 is a schematic cross-sectional view of an image sensor pixel structure based on a conventional technical scheme
FIG. 2 is a diagram of an image sensor pixel structure according to an embodiment of the present invention
FIG. 3 is a diagram illustrating a pixel structure of an image sensor according to an embodiment of the present invention
FIG. 4 is a diagram illustrating a pixel structure of an image sensor according to an embodiment of the present invention
FIG. 5 is a diagram illustrating a pixel structure of an image sensor according to an embodiment of the present invention
FIG. 6 is a diagram illustrating a pixel structure of an image sensor according to an embodiment of the present invention
FIG. 7 is a diagram illustrating a pixel structure of an image sensor according to an embodiment of the present invention
FIG. 8 is a diagram illustrating a pixel structure of an image sensor according to an embodiment of the present invention
FIG. 9 is a diagram of an image sensor pixel structure according to an embodiment of the present invention
Detailed Description
The following describes in further detail embodiments of the present invention with reference to fig. 2-9.
It should be noted that the pixel structure for improving transmission delay of the present invention can be cited to all pixel structures, for example, a 3T pixel structure, a 4T pixel structure, a 5T pixel structure, a 6T pixel structure, an 8T pixel structure, and the like. In the pixel structures, the transmission transistors are arranged, and the invention is to arrange a plurality of metal blocks above the photodiode of the conventional pixel structure and apply different voltages on the metal blocks, so that electric field distribution with directionality is formed in the photodiode.
In the following embodiments of the present invention, the pixel structure for improving the transmission delay includes a photodiode for collecting incident light and performing photoelectric conversion to generate carriers, a plurality of field effect transistors including a transmission transistor, and a floating diffusion region, as in the prior art. Unlike the prior art, the present invention arranges the metal block above or beside the photodiode, and applies a proper voltage on the metal block to form a directional electric field distribution in the photodiode, so that the carriers in the photodiode obtain a force pointing from the far of the photodiode to the direction of the transfer transistor, thereby facilitating the drift of the carriers in the photodiode to the vicinity of the transfer transistor during the readout phase, and further to the floating diffusion region through the transfer transistor. .
Example 1
Referring to fig. 2, fig. 2 is a schematic diagram of a pixel structure of an image sensor according to an embodiment of the invention. As shown in the figure, the pixel structure for improving transmission delay is provided with metal blocks in a dielectric layer above an N-type photodiode, the number of the metal blocks should be not less than 2, and different voltages can be applied to at least 2 metal blocks, so that an electric field distribution deviating from the direction of a transmission transistor is formed in the photodiode.
In this embodiment, 4 metal blocks are disposed in the same dielectric layer above the N-type photodiode. A voltage V1 is applied to the metal block farthest from the transfer transistor, and a voltage Vn is applied to the metal block closest to the transfer transistor. Wherein V1< Vn. For example, V1 ═ 1V and Vn ═ 0V. Thus, an electric field is formed in the photodiode under the metal block, the direction of the electric field lines is as shown in fig. 2 (the electric field lines are not all drawn), and the electric field distribution is formed from the metal block with high voltage to the metal block with low voltage, i.e. away from the direction of the transmission transistor.
That is, for negatively charged electrons, a force is obtained that points away from the photodiode in the direction of the transfer transistor, thereby helping to drift the electrons in the photodiode to the vicinity of the transfer transistor during the readout phase and further to be transferred through the transfer transistor into the floating diffusion.
Example 2
Referring to fig. 3, fig. 3 is a schematic diagram of a pixel structure of an image sensor according to an embodiment of the invention. As shown in fig. 3, in this embodiment of the present invention, a plurality of metal blocks similar to embodiment 1 may be provided, except that voltages V1, V2, V3 … … Vn are applied to each metal block in sequence from far to near from the transfer transistor, and V1< V2< V3< … … < Vn ≦ 0V. For example, when the number of the metal blocks is 4, the voltages applied to the metal blocks are V1-3V, V2-2V, V3-1V, and V4-0V, respectively. As for the purpose of embodiment 1, an electric field distribution that contributes to electron drift to the transfer transistor is also generated in the photodiode.
Compared with the embodiment 1 in which only 2 voltages are applied, the embodiment 2 in which a voltage is applied to each metal block can adjust the electric field distribution in the photodiode to a more optimized degree, and improve the effect of improving the transmission delay of this embodiment. However, embodiment 2 requires more voltage configurations to be provided to the pixel, and puts higher demands on controlling the design cost and reducing the design complexity.
Example 3
Referring to fig. 4, fig. 4 is a schematic diagram of a pixel structure of an image sensor according to an embodiment of the invention. In the embodiment of the invention, a plurality of metal blocks are arranged in the upper dielectric layer of the N-type photodiode, and the number of the metal blocks is not less than 2. As shown in fig. 4, the 3 metal blocks are respectively disposed in three dielectric layers, specifically, the shortest metal block is located in the dielectric layer closest to the photodiode, the longest metal block is located in the dielectric layer farthest from the photodiode, and one ends of the metal blocks are aligned in the projection direction.
In use, different voltages can be applied to 2 of the metal blocks, so that an electric field distribution is formed in the photodiode in a direction away from the transfer transistor. In this embodiment, for the 3 metal blocks located in different dielectric layers, a voltage V1 may be applied to the metal block farthest from the pass transistor, and a voltage Vn may be applied to the metal block closest to the pass transistor; wherein V1< Vn ≦ 0V. For example, V1 ═ 1V and Vn ═ 0V.
Example 4
Referring to fig. 5, fig. 5 is a schematic diagram of a pixel structure of an image sensor according to an embodiment of the invention. As shown in fig. 5, in the embodiment of the present invention, different from embodiment 3, voltages V1, V2, and V3 … … Vn are sequentially applied to metal blocks disposed on different dielectric layers from far to near from the transfer transistor, and V1< V2< V3< … … < Vn ≦ 0V.
For example, when the number of the metal blocks is 3, the voltages applied to the metal blocks are V1-3V, V2-2V, and V3-1V, respectively. In this way, the electric field distribution in example 4 is more optimized than in example 3.
Examples 5 and 6
Referring to fig. 6 and 7, fig. 6 and 7 are schematic diagrams of pixel structures of an image sensor according to an embodiment of the invention. The principle of examples 5 and 6 corresponds to examples 1 to 4. Except that the metal blocks of examples 5 and 6 are a combination of a single-layer metal block and a multi-layer metal block. Of course, other combinations are possible without the teachings of the present invention, but can be derived by those skilled in the art from the principles of the present invention.
As shown in fig. 6 and 7, the number of the metal blocks is 3, a first metal block is disposed in the first dielectric layer above the photodiode, a second metal block is divided into three sections, the first section and the second section are respectively disposed in the first dielectric layer and the second dielectric layer above the photodiode, and the third section passes through an interface between the first dielectric layer and the second dielectric layer and is respectively connected to the first section and the second section of the second metal block; the third metal block is divided into three sections, the first section and the second section are respectively arranged in the first dielectric layer and the third dielectric layer above the photodiode, and the third section penetrates through the interfaces among the first dielectric layer, the second dielectric layer and the third dielectric layer and is respectively connected with the first section and the second section of the third metal block; the distances between the first dielectric layer, the second dielectric layer, the third dielectric layer and the photodiode are sequentially increased.
As shown in fig. 6, only the first and third metal blocks of the 3 metal blocks are applied with voltages V3 and V1, respectively, and the second metal block is not applied with a voltage. The first metal block and the third metal block apply voltages V3 and V1 at a distance from the transfer transistor that satisfy: v1< V3 ≦ 0V. For example, the voltages applied to the metal blocks are V1-3V and V3-1V, respectively.
As shown in FIG. 7, voltages V3, V2 and V1 are applied to 3 metal blocks in sequence according to the distance from the transfer transistor, and V1< V2< V3 ≦ 0V. For example, the voltages applied to the 3 metal blocks are V1 ═ 3V, V2 ═ 2V, and V3 ═ 1V, respectively. As for the purpose of embodiment 1, an electric field distribution that contributes to electron drift to the transfer transistor is also formed in the photodiode.
Compared with the embodiment 6 in which only 2 voltages are applied, and the embodiment 7 in which a voltage is applied to each metal block, the electric field distribution in the photodiode can be adjusted to a more optimized degree, and the effect of improving the transmission delay of this embodiment is improved. However, embodiment 7 requires more voltage configurations to be provided to the picture element, and puts higher demands on controlling the design cost and reducing the design complexity.
Example 8
Referring to fig. 8, fig. 8 is a schematic diagram of a pixel structure of an image sensor according to an embodiment of the invention. As shown in fig. 8, in the photodiode side shallow trench isolation region, a single metal block is provided, and a voltage V1<0V is applied to the single metal block, so that an electric field distribution in a direction away from the transfer transistor is formed in the photodiode.
Example 9
Referring to fig. 9, fig. 9 is a schematic diagram of a pixel structure of an image sensor according to an embodiment of the invention. As shown in fig. 9, 4 metal blocks are disposed above the photodiode, a first metal block and a second metal block are disposed in a first dielectric layer above the photodiode, a third metal block is disposed in a second dielectric layer above the photodiode, and a fourth metal block is disposed in a third dielectric layer above the photodiode, wherein distances between the first dielectric layer, the second dielectric layer, the third dielectric layer, and the photodiode are sequentially increased. Voltages can likewise be applied in the manner mentioned in the previous embodiments to form a suitable electric field profile.
The metal blocks in the above 9 embodiments all follow the same arrangement rule, that is, the metal block disposed in the dielectric layer farther from the photodiode cannot be completely shielded by the metal block disposed in the dielectric layer closer to the photodiode. Because the metal blocks disposed in the farther dielectric layer, if completely shielded, will be shielded from the influence of the electric field distribution, which is equivalent to no metal block disposed at the corresponding position.
In summary, the metal blocks in the above embodiments are very flexible, and can be disposed in the dielectric layer above the photodiode or in the shallow trench isolation region on the side of the photodiode, and the metal blocks can be single-layer metal blocks or multi-layer metal blocks, and various combinations can achieve the principle and effect of the present invention. The more the metal blocks are arranged, the more the applied voltage is, the finer the control is, the better the effect is, but the design cost and the design complexity are improved.
It should be noted that, first, those skilled in the art can easily understand that at least one dielectric layer (not labeled in the drawings) exists in the blank area above the drawings, and the metal block is disposed in the dielectric layer instead of being suspended. Second, the distance between the metal block and the transmission transistor is determined according to the degree of influence on the formation of the electric field, rather than the geometric center of the metal block, for example, the position where the influence of the multi-layer metal block is strong may be at the connection of two segments, and that is the distance from the connection to the transmission transistor is taken as the distance from the metal block to the transmission transistor. Thirdly, the invention only uses the modified layout design, sets the metal block at a proper position in the existing interconnection process, does not add extra process steps, and can be conveniently implemented.
In addition, all the voltages in the embodiments of the present invention are negative voltages or 0V, since the photodiodes in the embodiments are N-type, and if the photodiodes are P-type in some processes, it is easily understood that all the voltages should be positive voltages or 0V.
Therefore, the invention forms the electric field distribution with directionality in the photodiode by arranging the metal block above or at the side of the photodiode and applying proper voltage on the metal block. By the method, all carriers in the photodiode can be completely transmitted to the floating diffusion region within the turn-on time of the transmission transistor, so that the transmission efficiency of the photodiode is improved, and the problem of transmission delay is solved.
The above description is only for the preferred embodiment of the present invention, and the embodiment is not intended to limit the scope of the present invention, so that all the equivalent structural changes made by using the contents of the description and the drawings of the present invention should be included in the scope of the present invention.
Claims (10)
1. A pixel structure that improves transmission lag, comprising:
a photodiode for collecting incident light and performing photoelectric conversion to generate carriers;
a plurality of field effect transistors including a pass transistor;
a floating diffusion region; it is characterized in that the preparation method is characterized in that,
and arranging a plurality of metal blocks in an upper dielectric layer of the photodiode, and applying different voltages to the metal blocks, or arranging a single metal block in a shallow slot isolation region at the side of the photodiode, and applying voltages to the metal blocks, or combining the two modes, so that directional electric field distribution is formed in the photodiode.
2. The pixel structure for improving transmission delay of claim 1, wherein the plurality of metal blocks are composed of a plurality of single-layer metal blocks that can be disposed on only a single dielectric layer or a plurality of multi-layer metal blocks that can span multiple dielectric layers or at least one single-layer metal block and at least one multi-layer metal block, wherein the single-layer metal block and the multi-layer metal block are partially exposed on the surface of the photodiode.
3. A pixel structure for improving transmission delay according to claim 2, wherein the single metal block is entirely disposed in the same dielectric layer above the photodiode, or is partially disposed in the same dielectric layer above the photodiode, or is entirely disposed in different dielectric layers above the photodiode.
4. The pixel structure for improving transmission delay of claim 3, wherein the plurality of metal blocks are all disposed in different dielectric layers above the photodiode, each metal block has a different length in a horizontal direction, the shortest metal block is located in a dielectric layer closest to the photodiode, the longest metal block is located in a dielectric layer farthest from the photodiode, and one end of each of the plurality of metal blocks is aligned in a projection direction.
5. The pixel structure for improving transmission delay of claim 4, wherein the number of the plurality of metal blocks is 3, a first metal block is disposed in the first dielectric layer above the photodiode, a second metal block is divided into three sections, the first section and the second section are respectively disposed in the first dielectric layer and the second dielectric layer above the photodiode, and the third section penetrates through an interface between the first dielectric layer and the second dielectric layer and is connected to the first section and the second section of the second metal block; the third metal block is divided into three sections, the first section and the second section are respectively arranged in the first dielectric layer and the third dielectric layer above the photodiode, and the third section penetrates through the interfaces among the first dielectric layer, the second dielectric layer and the third dielectric layer and is respectively connected with the first section and the second section of the third metal block; the distances between the first dielectric layer, the second dielectric layer, the third dielectric layer and the photodiode are sequentially increased.
6. The pixel structure of improving transmission delay of claim 1, wherein the number of the plurality of metal blocks is equal to 2, and when the single metal block is not disposed in the photodiode-side shallow trench isolation region, a voltage applied to the metal block far from the transmission transistor is V1, a voltage applied to the metal block near the transmission transistor is Vn, and | V1| > | Vn |.
7. A picture element structure for improving transmission delay as claimed in claim 6, wherein V1<0V and Vn is 0V.
8. The pixel structure for improving transmission delay of claim 1, wherein the number of the plurality of metal blocks is greater than 2, and when the single metal block is not disposed in the photodiode-side shallow trench isolation region, voltages are applied to at least 2 of the metal blocks, the applied voltages are respectively V1, V2, V3 … … Vn as far as the nearest to the transmission transistor, and | V1| > | V2| > | V3| > … … > | Vn |.
9. The pixel structure for improving transmission delay of claim 1, wherein the number of the plurality of metal blocks is greater than or equal to 2, and when the single metal block is disposed in the photodiode-side shallow trench isolation region, a voltage V1 is applied to the single metal block, and a voltage V2 and a voltage V3 … … Vn are applied to at least 1 of the plurality of metal blocks, respectively, in a range from the farthest to the nearest from the transmission transistor, and | V1| > | V2| > | V3| > … … > | Vn |.
10. A pixel structure of improving transmission delay according to any one of claims 8 or 9, wherein the values of V1, V2, V3 … … Vn are equal to or less than 0V, so that an electric field distribution is formed in the photodiode in a direction away from the transmission transistor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110062018.4A CN112864183B (en) | 2021-01-18 | 2021-01-18 | Pixel structure for improving transmission delay |
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