CN112858792A - Energy storage capacitor failure detection method based on test carrier plate - Google Patents
Energy storage capacitor failure detection method based on test carrier plate Download PDFInfo
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- CN112858792A CN112858792A CN202110053239.5A CN202110053239A CN112858792A CN 112858792 A CN112858792 A CN 112858792A CN 202110053239 A CN202110053239 A CN 202110053239A CN 112858792 A CN112858792 A CN 112858792A
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- 238000012360 testing method Methods 0.000 title claims abstract description 101
- 239000003990 capacitor Substances 0.000 title claims abstract description 82
- 238000004146 energy storage Methods 0.000 title claims abstract description 61
- 238000001514 detection method Methods 0.000 title claims abstract description 15
- 238000010998 test method Methods 0.000 claims abstract description 3
- 238000000034 method Methods 0.000 claims description 8
- 239000000463 material Substances 0.000 claims description 7
- 239000004065 semiconductor Substances 0.000 abstract description 2
- 238000010586 diagram Methods 0.000 description 5
- 238000005070 sampling Methods 0.000 description 4
- 230000002159 abnormal effect Effects 0.000 description 3
- 230000005856 abnormality Effects 0.000 description 1
- 230000009194 climbing Effects 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 210000001503 joint Anatomy 0.000 description 1
- 238000011895 specific detection Methods 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R27/00—Arrangements for measuring resistance, reactance, impedance, or electric characteristics derived therefrom
- G01R27/02—Measuring real or complex resistance, reactance, impedance, or other two-pole characteristics derived therefrom, e.g. time constant
- G01R27/26—Measuring inductance or capacitance; Measuring quality factor, e.g. by using the resonance method; Measuring loss factor; Measuring dielectric constants ; Measuring impedance or related variables
- G01R27/2605—Measuring capacitance
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2801—Testing of printed circuits, backplanes, motherboards, hybrid circuits or carriers for multichip packages [MCP]
- G01R31/281—Specific types of tests or tests for a specific type of fault, e.g. thermal mapping, shorts testing
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2801—Testing of printed circuits, backplanes, motherboards, hybrid circuits or carriers for multichip packages [MCP]
- G01R31/281—Specific types of tests or tests for a specific type of fault, e.g. thermal mapping, shorts testing
- G01R31/2812—Checking for open circuits or shorts, e.g. solder bridges; Testing conductivity, resistivity or impedance
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Engineering & Computer Science (AREA)
- Measurement Of Resistance Or Impedance (AREA)
- Testing Electric Properties And Detecting Electric Faults (AREA)
- Testing Of Short-Circuits, Discontinuities, Leakage, Or Incorrect Line Connections (AREA)
Abstract
The invention relates to the technical field of semiconductor testing, in particular to an energy storage capacitor failure detection method based on a test carrier plate. The specific test method is as follows: s1: the test carrier plate is connected with the DPS test circuit; s2: placing the test carrier plate in an unloaded state; s3: the test carrier plate starts to operate; s4: estimating a target capacitance value C of the energy storage capacitor; s5: reading the constant output voltage Vdut and the clamping current Iclamp; s6: calculating the test time t; s7: setting working parameters of a DPS test circuit; s8: triggering a ForceV mode of a DPS test circuit; s9: calculating the capacitance value C of the actually measured energy storage capacitorMeasured in fact(ii) a S10: according to the capacitance value C of the energy storage capacitorMeasured in factAnd judging the failure condition of the energy storage capacitor. Compared with the prior art, the failure detection of the energy storage capacitor on the carrier circuit board is realized by utilizing the existing functions of the automatic testing machine, the failure condition of the energy storage capacitor on the carrier circuit board is accurately known, andand the test accuracy of the integrated circuit chip is ensured by time processing.
Description
Technical Field
The invention relates to the technical field of semiconductor testing, in particular to an energy storage capacitor failure detection method based on a test carrier plate.
Background
Generally, a stable power supply is required when the integrated circuit chip is operating normally. When a circuit is designed, decoupling capacitors, including a filter capacitor with a small capacitance value and an energy storage capacitor with a large capacitance value, are disposed near a power supply pin of a chip where the power supply pin is connected to a power supply network.
For chip testing applications, all pins of a chip need to be in one-to-one butt joint with pins of an automatic testing machine, and long internal cable connections are often arranged between the pins and a test circuit unit inside the automatic testing machine. Therefore, when the chip under test is loaded onto the test carrier circuit board, the power pins of the chip generally do not have the opportunity to connect to a large area copper-clad power network. In this case, in order to accurately test the functions and performance of the chip under test, it is more necessary to connect some decoupling capacitors on the test carrier board near the power pins of the chip.
However, among these decoupling capacitors, the energy storage capacitor with a large capacitance value causes a problem: when the static direct current leakage current IDDQ index of a tested chip needs to be tested, the energy storage capacitor brings obvious errors. Therefore, when the test item of the test program is executed to measure the IDDQ, the connection of the energy storage capacitor to the power pin of the chip to be tested needs to be cut off. That is, the connection of the energy storage capacitor needs to be designed to be on or off. The on-off switching is usually realized by using a relay, and when a test carrier circuit board is designed, the relay is connected in series between the energy storage capacitor and a power supply network.
However, various faults occur in the test carrier circuit board during the use process, and a typical failure scenario is a circuit failure related to the energy storage capacitor. For example: the failure of a relay, the failure of an energy storage capacitor, the open circuit or short circuit of circuit connection and the material error of the capacitor. The failures can show that the capacitance value of the energy storage capacitor is abnormal, so that the failures of the test carrier circuit board can be diagnosed by measuring the capacitance value of the capacitor.
Such failures typically result in reduced yield or reduced performance of the tested chips, but the factors relating to the testing process and yield are too numerous, and thus the failures are somewhat hidden. Under the common test condition, there is no specific detection means and scheme for whether the capacitance value of the energy storage capacitor is abnormal. Therefore, when the reason of low yield is investigated, many other factors are often investigated first, and then the link of inspecting the energy storage capacitor of the carrier circuit board is taken. This tends to take a lot of time.
Disclosure of Invention
The invention provides an energy storage capacitor failure detection method based on a test carrier board to overcome the defects of the prior art, and the failure detection of the energy storage capacitor on the carrier circuit board is realized by utilizing the existing functions of an automatic test machine.
In order to achieve the purpose, the energy storage capacitor failure detection method based on the test carrier plate comprises a DPS test circuit and the test carrier plate, and is characterized in that: the specific test method is as follows:
s1: the test carrier plate of the automatic tester is connected with the DPS test circuit;
s2: placing the test carrier plate in an idle state without a tested chip;
s3: the test carrier plate starts to operate;
s4: estimating a target capacitance value C of the energy storage capacitor according to the parameters of the test carrier circuit board;
s5: reading the constant output voltage Vdut and the clamping current Iclamp according to the data of the test program;
s6: calculating the test time t;
s7: setting working parameters of a DPS test circuit;
s8: the main control module of the automatic tester triggers the ForceV mode of the DPS test circuit;
s9: calculating the capacitance value C of the actually measured energy storage capacitorMeasured in fact；
S10: according to the measured capacitance value C of the energy storage capacitorMeasured in factAnd judging the failure condition of the energy storage capacitor.
The formula for calculating the test time is t = C Vdut/Icoil.
The calculation formula of the capacitance value of the energy storage capacitor is CMeasured in fact=ΔQ/ΔV=(I*t) /ΔV=I*(t1-t0)/(V1-V0)。
The failure conditions of the energy storage capacitor comprise short circuit of the energy storage capacitor to the ground, open circuit or falling of the capacitor, error in material specification of the capacitor, incapability of disconnecting the relay, incapability of closing the relay and incapability of connecting a circuit.
The specific judgment method for judging the failure condition of the energy storage capacitor is as follows:
(1) short circuit of energy storage capacitor to ground: under the condition that the relay is closed, when the test voltage is unchanged within the test time, the voltage is close to 0V;
(2) capacitive disconnection or shedding: under the condition that the relay is closed, when the voltage reaches a limit value immediately after the test is started, the display capacitance value cannot be measured;
(3) the specification of the capacitor material is wrong: under the relay closing condition, calculating the actually measured capacitance value and the standard deviation to be more than 25 percent after testing;
(4) the relay can not be disconnected: after the relay opening instruction and the relay closing instruction are executed, capacitance values are respectively tested, and the obtained results are the same and are the normal values of the capacitance;
(5) the relay cannot be closed: after the relay opening instruction and the relay closing instruction are executed, respectively testing capacitance values, wherein the obtained results are the same, and the obtained results are values of the capacitor open circuit condition and show that the capacitance values cannot be measured;
(6) the line connection is not through: under the condition that the relay is closed, when the voltage reaches a limit value immediately after the test is started, the display capacitance value cannot be measured.
Compared with the prior art, the invention provides the energy storage capacitor failure detection method based on the test carrier plate, the failure detection of the energy storage capacitor on the carrier circuit board is realized by utilizing the existing functions of the automatic test machine, the failure condition of the energy storage capacitor on the carrier circuit board is accurately known, and the failure condition is timely processed to ensure the test accuracy of the integrated circuit chip.
Drawings
FIG. 1 is a graph of DPS test circuit operation.
FIG. 2 is a flow chart of the present invention.
FIG. 3 is a schematic diagram of the DPS test circuit connected to a test carrier board.
Detailed Description
The invention is further illustrated below with reference to the accompanying drawings.
As shown in fig. 1, a Power pin of a chip under test is typically connected to a test circuit called a Device Power Supply (DPS) inside an automatic test machine.
The DPS has both a constant voltage output function and a current clamping function. In the process that the DPS starts to power on the chip to be tested, the output voltage of the DPS does not jump from 0 to the target voltage Vdut, but the chip to be tested is powered by a constant clamp current I _ clamp, and the DPS works in a clamp I mode and is essentially in a constant current mode. In this process, as the chip under test and its decoupling capacitor are charged, its voltage steadily increases. When the voltage rises to the target value Vdut, the DPS switches to the ForceV mode, i.e., the constant voltage mode, and the current decreases to the working current of the chip.
The DPS also has a measuring circuit for ADC sampling, which can measure the output current and voltage at any time. Thus we can draw a V-t curve.
In the stage of Clamp I, the total capacitance at the power supply pin of the chip to be tested can be calculated according to the time characteristic of voltage rise, namely the slope of a V-t curve, and the total capacitance can basically reflect the capacitance value of the energy storage capacitors connected in parallel.
As shown in fig. 2, a method for detecting failure of an energy storage capacitor based on a test carrier plate specifically includes:
s1: the test carrier plate of the automatic tester is connected with the DPS test circuit;
s2: placing the test carrier plate in an idle state without a tested chip;
s3: the test carrier plate starts to operate;
s4: estimating a target capacitance value C of the energy storage capacitor according to the parameters of the test carrier circuit board;
s5: reading the constant output voltage Vdut and the clamping current Iclamp according to the data of the test program;
s6: calculating the test time t;
s7: setting working parameters of a DPS test circuit;
s8: the main control module of the automatic tester triggers the ForceV mode of the DPS test circuit;
s9: calculating the capacitance value C of the actually measured energy storage capacitorMeasured in fact；
S10: according to the measured capacitance value C of the energy storage capacitorMeasured in factAnd judging the failure condition of the energy storage capacitor.
The formula for calculating the test time is t = C × Vdut/Iclamp.
The capacitance value of the energy storage capacitor is calculated by the formula CMeasured in fact=ΔQ/ΔV=(I*t) /ΔV=I*(t1-t0)/(V1-V0)。
The failure conditions of the energy storage capacitor comprise short circuit of the energy storage capacitor to the ground, open circuit or falling of the capacitor, error in material specification of the capacitor, incapability of opening a relay, incapability of closing the relay and incapability of connecting a circuit.
Judging the failure condition of the energy storage capacitor, wherein the specific judgment method comprises the following steps:
(1) short circuit of energy storage capacitor to ground: under the condition that the relay is closed, when the test voltage is unchanged within the test time, the voltage is close to 0V;
(2) capacitive disconnection or shedding: under the condition that the relay is closed, when the voltage reaches a limit value immediately after the test is started, the display capacitance value cannot be measured;
(3) the specification of the capacitor material is wrong: under the relay closing condition, calculating the actually measured capacitance value and the standard deviation to be more than 25 percent after testing;
(4) the relay can not be disconnected: after the relay opening instruction and the relay closing instruction are executed, capacitance values are respectively tested, and the obtained results are the same and are the normal values of the capacitance;
(5) the relay cannot be closed: after the relay opening instruction and the relay closing instruction are executed, respectively testing capacitance values, wherein the obtained results are the same, and the obtained results are values of the capacitor open circuit condition and show that the capacitance values cannot be measured;
(6) the line connection is not through: under the condition that the relay is closed, when the voltage reaches a limit value immediately after the test is started, the display capacitance value cannot be measured.
As shown in FIG. 3, the DPS test circuit is an equivalent circuit diagram for operating in a constant voltage output mode. The circuit has two negative feedback closed loop controls, one is current negative feedback formed by a sampling resistor and a current amplifier, and the other is voltage negative feedback formed by a voltage amplifier. When the output voltage is smaller, the output current is larger, the output of the current amplifier is larger than that of the voltage amplifier, at the moment, the diode in the figure is conducted, the circuit works in a current negative feedback mode, the output is constant current, and the constant current is clamp current. When the output current is relatively small, the output voltage is relatively large, the output of the current amplifier is smaller than that of the voltage amplifier, and at the moment, the circuit works in a voltage negative feedback mode, and the output is constant voltage.
When the test is prepared, firstly, the voltage of the DSP _ DAC is set to 0V, then the output end of the forced amplifier is also 0V, the voltage of the pin of the chip to be tested is 0V, and all negative feedback is also 0V. When the circuit starts to operate, the DSP _ DAC voltage is set to the target voltage (e.g., 3.3V), forcing the output voltage Vout of the amplifier to rise rapidly first. But due to the existence of the sampling resistor and the carrier plate capacitor, the voltage of the pin of the tested chip does not rise rapidly, and the output current Iout of the forced amplifier can rise rapidly along with Vout. The current negative feedback limits the output intensity of the forced amplifier to be further increased, and the output intensity is maintained at a current clamping value when the current output Iout is at the current clamping value, and the circuit works in a current clamping stage: the current is constant, the capacitor is charged and the voltage rises uniformly. When the voltage rises to the target value, closed-loop control of the voltage negative feedback is dominant. The circuit works in a constant voltage output stage: the voltage no longer climbs, the capacitor no longer charges, the output current also drops to a lower level quickly, and the diode is cut off. The actual test work is done during the current clamping phase. The voltage parameter of the constant voltage output of the DPS, namely the Force V parameter, can be set by setting the voltage of the DPS _ DAC, the clamping output current parameter of the DPS, namely the Clamp I parameter, can be set by selecting the gear of the adjustable sampling resistor, and the current actual current can be read out through the ADC at any time. The current actual voltage can also be read out at any time by the ADC. When the circuit works in a current clamping stage, the actual voltage is measured for multiple times, so that a V-t diagram (a voltage-time diagram, as shown in figure 1) can be drawn, when the circuit works in the current clamping stage, the actual current can be measured once, so that a clamping constant current value is calibrated, the slope delta V/delta t of a voltage climbing slope is calculated according to the V-t diagram, if the slope is not remarkably abnormal (not close to 0 or not close to infinity), then the actually measured capacitance C _ real = I _ clamp/(delta V/delta t) is calculated according to the actually measured value I _ clamp of the clamping current, and the slope and the capacitance can be used for judging whether the abnormality exists or not and deducing various failure conditions.
Claims (5)
1. The utility model provides an energy storage electric capacity failure detection method based on test carrier board, includes DPS test circuit, test carrier board, its characterized in that: the specific test method is as follows:
s1: the test carrier plate of the automatic tester is connected with the DPS test circuit;
s2: placing the test carrier plate in an idle state without a tested chip;
s3: the test carrier plate starts to operate;
s4: estimating a target capacitance value C of the energy storage capacitor according to the parameters of the test carrier circuit board;
s5: reading the constant output voltage Vdut and the clamping current Iclamp according to the data of the test program;
s6: calculating the test time t;
s7: setting working parameters of a DPS test circuit;
s8: the main control module of the automatic tester triggers the ForceV mode of the DPS test circuit;
s9: calculating the capacitance value C of the actually measured energy storage capacitorMeasured in fact；
S10: according to the measured capacitance value C of the energy storage capacitorMeasured in factAnd judging the failure condition of the energy storage capacitor.
2. The energy storage capacitor failure detection method based on the test carrier plate as claimed in claim 1, wherein: the formula for calculating the test time is t = C Vdut/Icoil.
3. The energy storage capacitor failure detection method based on the test carrier plate as claimed in claim 1, wherein: the calculation formula of the capacitance value of the energy storage capacitor is CMeasured in fact=ΔQ/ΔV=(I*t) /ΔV=I*(t1-t0)/(V1-V0)。
4. The energy storage capacitor failure detection method based on the test carrier plate as claimed in claim 1, wherein: the failure conditions of the energy storage capacitor comprise short circuit of the energy storage capacitor to the ground, open circuit or falling of the capacitor, error in material specification of the capacitor, incapability of disconnecting the relay, incapability of closing the relay and incapability of connecting a circuit.
5. The energy storage capacitor failure detection method based on the test carrier plate as claimed in claim 1, wherein: the specific judgment method for judging the failure condition of the energy storage capacitor is as follows:
(1) short circuit of energy storage capacitor to ground: under the condition that the relay is closed, when the test voltage is unchanged within the test time, the voltage is close to 0V;
(2) capacitive disconnection or shedding: under the condition that the relay is closed, when the voltage reaches a limit value immediately after the test is started, the display capacitance value cannot be measured;
(3) the specification of the capacitor material is wrong: under the relay closing condition, calculating the actually measured capacitance value and the standard deviation to be more than 25 percent after testing;
(4) the relay can not be disconnected: after the relay opening instruction and the relay closing instruction are executed, capacitance values are respectively tested, and the obtained results are the same and are the normal values of the capacitance;
(5) the relay cannot be closed: after the relay opening instruction and the relay closing instruction are executed, respectively testing capacitance values, wherein the obtained results are the same, and the obtained results are values of the capacitor open circuit condition and show that the capacitance values cannot be measured;
(6) the line connection is not through: under the condition that the relay is closed, when the voltage reaches a limit value immediately after the test is started, the display capacitance value cannot be measured.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110053239.5A CN112858792B (en) | 2021-01-15 | Energy storage capacitor failure detection method based on test carrier plate | |
| TW110128048A TWI777707B (en) | 2021-01-15 | 2021-07-30 | Energy-storage capacitor malfunction detection method based on test carrier board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110053239.5A CN112858792B (en) | 2021-01-15 | Energy storage capacitor failure detection method based on test carrier plate |
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| Publication Number | Publication Date |
|---|---|
| CN112858792A true CN112858792A (en) | 2021-05-28 |
| CN112858792B CN112858792B (en) | 2024-07-09 |
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| TWI777707B (en) | 2022-09-11 |
| TW202229907A (en) | 2022-08-01 |
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