CN101261598A - Mainboard test circuit - Google Patents
Mainboard test circuit Download PDFInfo
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- CN101261598A CN101261598A CNA2007102002529A CN200710200252A CN101261598A CN 101261598 A CN101261598 A CN 101261598A CN A2007102002529 A CNA2007102002529 A CN A2007102002529A CN 200710200252 A CN200710200252 A CN 200710200252A CN 101261598 A CN101261598 A CN 101261598A
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- mainboard
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- testing
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- 230000000875 corresponding Effects 0.000 claims description 7
- 238000000034 method Methods 0.000 description 6
- 238000004519 manufacturing process Methods 0.000 description 2
- 230000001276 controlling effect Effects 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 238000003745 diagnosis Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 239000000523 sample Substances 0.000 description 1
Abstract
A main board testing circuit comprises a current testing circuit, a voltage testing circuit and a control circuit, the control circuit monitors the testing current of a main board to be tested, when the value of the testing current is in the preset qualified range, the current testing circuit starts the voltage testing circuit and opens a power supply of the main board to be tested, hereafter, the control circuit starts to monitor the testing voltage of the main board to be tested, when the testing voltage is not in the preset qualified range, the voltage testing circuit and the power supply of the main board to be tested are closed by the control circuit. The main board testing circuit can measure the testing current and the testing voltage of the main board, when the testing current or the testing voltage of the main board to be tested is not in the preset qualified range, the test is stopped and the power supply of the main board to be tested is closed, thus avoiding the main board which is tested from being burned due to the excessive testing current or voltage.
Description
Technical field
The present invention relates to a kind of mainboard test circuit.
Background technology
On-line testing (In Circuit Test, ICT) technology is applied in the electronics manufacturing industry widely, its main application is to printed circuit board (PCB) (Printed circuit board, PCB) electronic devices and components on carry out electric test, above-mentioned electronic devices and components comprise: analog device, for example resistance, electric capacity and diode etc.; Digital device, for example impact damper, transverter, internal memory, microcontroller and other storeies etc.; And mixing components and parts, for example analog to digital converter and digital to analog converter etc.
On-line testing also comprises other advanced test, for example the online programming of serial electricallyerasable ROM (EEROM) and flash memory, boundry scanning chain test, by boundary-scan port to electricallyerasable ROM (EEROM) in CPLD or the sheet/flash memory online programming.
On-line testing is based on physics contact and adds electrical testing, is testing aspect connectivity and the electric property.The on-line testing instrument adopts each test point on the needle-bar anchor clamps contact PCB, then each electronic component is isolated to get up to test separately.Pass through if each electronic component is all tested, just can think that this piece PCB does not assemble defective and has normal application function.By on-line testing to PCB, can find the bad components and parts on the PCB apace, and manufacturing defect, the diagnosis and repair report is provided simultaneously.
But, existing many ICT testers (for example TR518ICT tester) can not be started shooting to mainboard and be gone up electrical testing, it can't be tested pwm voltage, central processing unit core voltage, chip core voltage etc. when mainboard is tested, and can't distinguish whether the test voltage after the mainboard start powers on is normal.
Summary of the invention
In view of above content, be necessary to provide a kind of mainboard test circuit, when being carried out on-line testing, can test the measuring current and the test voltage of mainboard to be measured simultaneously mainboard to be measured.
A kind of mainboard test circuit, comprise a current testing circuit, one circuit for testing voltage and a control circuit, described control circuit comprises that one can set reometer and at least one voltage table of setting the test voltage acceptability limit of measuring current acceptability limit, described current testing circuit starts the measuring current that described reometer is monitored mainboard to be measured, when the measuring current value of mainboard to be measured not during default acceptability limit at described reometer, described control circuit cuts out described current testing circuit, when the measuring current value of mainboard to be measured during at default acceptability limit described current testing circuit start described circuit for testing voltage, open the power supply of described mainboard to be measured simultaneously, this moment, described at least one voltage table began to monitor the test voltage of corresponding electronic component on the described mainboard to be measured, when the test voltage of electronic component on the described mainboard to be measured during not at the default acceptability limit of corresponding voltage table, described control circuit cuts out described circuit for testing voltage, closes the power supply of described mainboard to be measured simultaneously.
Above-mentioned mainboard test circuit is measured the measuring current of mainboard and is gone up the test voltage of each electronic component when mainboard on-line testing to be measured, when the measuring current of mainboard to be measured or test voltage are not in a default acceptability limit, stop test and close motherboard power supply to be measured, described mainboard test circuit can be measured the test voltage after the mainboard to be measured start, and avoids measuring current or voltage is excessive causes mainboard to be measured to burn.
Description of drawings
Below in conjunction with accompanying drawing and better embodiment the present invention is described in further detail:
Fig. 1 is the circuit diagram of mainboard test circuit better embodiment of the present invention.
Embodiment
With reference to figure 1, a kind of better embodiment that is used for the mainboard test circuit 10 of on-line testing instrument comprises a current testing circuit 14, a circuit for testing voltage 16 and a control circuit 18, one power supply 12 is connected with circuit for testing voltage 16 with described current testing circuit 14 and is its power supply, closing of described control circuit 18 described current testing circuits 14 of control and circuit for testing voltage 16, described current testing circuit 14 connects described circuit for testing voltage 16 and controls its unlatching.
Described mainboard test circuit 10 comprises first to the 8th relay, first to fourth timing relay and four pilot lamp L1 ~ L4, described first relay comprises that a relay coil J1 reaches two normally opened contact J1#1 and J1#2 by its control, described second relay comprises that a relay coil J2 reaches a normally opened contact J2#1 and the normally closed contact J2#2 by its control, described the 3rd relay comprises that a relay coil J3 reaches two normally opened contact J3#1 and J3#2 by its control, described the 4th relay comprises that a relay coil J4 reaches two normally closed contact J4#1 and a J4#3 and the normally opened contact J4#2 by its control, described the 5th relay comprises that a relay coil J5 reaches a normally closed contact J5#1 and the normally opened contact J5#2 by its control, described the 6th relay comprises that a relay coil J6 reaches the normally opened contact J6#1 by its control, described the 7th relay comprises that a relay coil J7 reaches two normally opened contact J7#1 and J7#2 by its control, described the 8th relay comprises that a relay coil J8 reaches a normally opened contact J8#1 and the normally closed contact J8#2 by its control, described first timing relay comprises that a timing relay coil TA1 reaches two normally opened contact TA1#1 and TA1#2 by its control, described second timing relay comprises that a timing relay coil TA2 reaches the normally closed contact TA2#1 by its control, described the 3rd timing relay comprises that a timing relay coil TA3 reaches two normally opened contact TA3#1 and TA3#2 by its control, and described the 4th timing relay comprises that a timing relay coil TA4 reaches the normally opened contact TA4#1 by its control.
Described current testing circuit comprises button ON, relay coil J1 ~ J3 and J8, timing relay coil TA1 ~ TA3, pilot lamp L1 and L2, normally opened contact J1#1, TA1#1, UP, DOWN and J3#1, normally closed contact J2#2, J4#3, J8#2 and TA2#1 and a stop button OFF at the beginning.Described stop button OFF is made up of a normally closed contact and a normally opened contact.Described normally opened contact UP and DOWN are respectively as the gauge tap of described pilot lamp L1 and L2.
An end is connected with the positive pole of described power supply 12 by the normally closed contact of described stop button OFF after described start button ON and the normally opened contact J1#1 parallel connection, and the other end is connected with the negative pole of described power supply 12 by described timing relay coil TA1; Described relay coil J1 be parallel to described timing relay coil TA1 two ends after described normally closed contact J4#3 connects; The end of described normally opened contact TA1#1 is connected between described normally opened contact J1#1 and the timing relay coil TA1, and the other end is connected with the negative pole of described power supply 12 by described timing relay coil TA3; Described relay coil J2 is connected between described normally opened contact TA1#1 and the timing relay coil TA3 by described normally opened contact UP with a end after pilot lamp L1 is in parallel, and the other end is connected with the negative pole of described power supply 12; Described relay J 8 is connected between described normally opened contact TA1#1 and the timing relay coil TA3 by described normally opened contact DOWN with a end after pilot lamp L2 is in parallel, and the other end is connected with the negative pole of described power supply 12; Described normally opened contact J3#1 one end is connected between described normally opened contact TA1#1 and the timing relay coil TA3, and the other end is connected in the negative pole of described power supply 12 by described timing relay coil TA2; It is in parallel after described normally closed contact J2#2 connects with J8#2 with described normally opened contact J3#1; It is in parallel after described relay coil J3 connects with described normally closed switch TA2#1 with described timing relay coil TA2.
Described circuit for testing voltage 16 comprises normally opened contact H1 ~ H6, N1 ~ N6, J1#2, TA1#2, J2#1, J4#2, J5#2, J7#2, J8#1, TA3#1 and TA3#2, normally closed contact J5#1 and TA4#1, relay coil J4, J5, J6 and J7, timing relay coil TA4 and pilot lamp L3 and L4.
Described normally opened contact J4#2 and described timing relay coil TA4 are series between the positive pole and negative pole of described power supply 12; An end is connected with the positive pole of described power supply 12 by described normally opened contact J1#2 after described normally opened contact H1 ~ H6 and N1 ~ N6 parallel connection, and the other end is connected with the negative pole of described power supply 12 with relay coil J5 by described normally opened contact TA3#2 successively; Described normally opened contact TA1#2 one end is connected with the positive pole of described power supply 12 by described normally opened contact J1#2, and the other end is connected with the negative pole of described power supply 12 with relay coil J6 by described normally opened contact J2#1 successively; Described normally opened contact J8#1 and J5#2 are all in parallel with described normally opened contact J2#1; Described pilot lamp L3 is in parallel with described relay coil J6; Described relay coil J7 is connected between described normally opened contact J4#2 and the described timing relay coil TA4 by described normally opened contact J7#2 with an end after pilot lamp L4 is in parallel, and the other end is connected with the negative pole of described power supply 12; Described normally opened contact TA3#1 one end is connected between described normally opened contact TA1#2 and the J2#1, and the other end is connected between described normally opened contact J7#2 and the relay coil J7 by described normally closed contact J5#1; The normally opened contact of described stop button OFF is in parallel with described normally opened contact J4#2; It is in parallel after described relay coil J4 connects with described normally closed switch TA4#1 with described timing relay coil TA4.Described normally opened contact J2#1, J8#1, J5#2, TA3#1 and normally closed contact J5#1 are used for controlling described pilot lamp L3 and L4.
Described control circuit 18 comprises an intelligent alarm type reometer A and six intelligent alarm type voltage table V1 ~ V6, described intelligent alarm type reometer A and intelligent alarm type voltage table V1 ~ V6 all with the needle-bar 20 of an on-line testing instrument on corresponding connection of test probe, to obtain test voltage.
Described mainboard test circuit 10 also comprises a hummer S, and its power end is connected with a 5V power supply with J7#1 by normally opened contact J6#1 respectively.Described normally opened contact J3#2 is connected with motherboard power supply POWER respectively with normally closed contact J4#1, control main board electric power starting or close.
After the on-line testing instrument is started working, the start button ON of closed path test circuit 14, relay coil J1 and timing relay coil TA1 get electric work, normally opened contact J1#1 and J1#2 closure, relay coil J1 and timing relay coil TA1 were locked after normally opened contact J1#1 closure was unclamped start button ON, after the delay time that timing relay coil TA1 is provided with, normally opened contact TA1#1 and TA1#2 closure, timing relay coil TA3 energising, open after the normally opened contact TA1#1 closure intelligent alarm type reometer A on/lower limit output test function, trigger voltage test circuit 16 after normally opened contact J1#2 and the TA1#2 closure, enter the testing current process this moment, described intelligent alarm type reometer A monitors the measuring current of mainboard to be measured, and the testing current time is set by timing relay coil TA3.
After testing current begins, if measuring current is in an acceptability limit of presetting, on the described intelligent alarm type reometer A/the lower limit alarm relay all do not work, upper current limit contact UP and lower current limit contact DOWN all keep disconnecting, relay coil J3 and timing relay coil TA2 switch on simultaneously, normally opened contact J3#1 is closed and finishes self-locking, open motherboard power supply POWER to be measured after the normally opened contact J3#2 closure, mainboard to be measured powers on, after the delay time that timing relay TA2 is provided with, normally closed contact TA2#1 disconnects, relay J 3 outages, all normally opened contacts disconnect, and enter next step voltage tester process.
After testing current begins, if measuring current is not in described default acceptability limit, the alarm relay work of described intelligent alarm type reometer A, make upper current limit contact UP or lower current limit contact DOWN closure, thereby make relay coil J2 or J8 energising work, pilot lamp L1 or L2 in parallel are bright, the indicator current upper limit or lower limit test crash, normally opened contact J2#1 or J8#1 are by the relay coil J2 of correspondence or J8 closure, and pilot lamp L3 is bright, relay coil J6 energising simultaneously, normally opened contact J6#1 closure, hummer S gives the alarm, and normally closed contact J2#2 or J8#2 are disconnected when relay coil J2 or J8 energising work, and test process stops.
Press stop button OFF, promptly open the normally opened contact of stop button OFF in the normally closed contact of stop button OFF in the described current testing circuit 14 and the closed described circuit for testing voltage 16 simultaneously, relay coil J1 outage, all normally opened contacts disconnect, and pilot lamp L3 extinguishes.Relay coil J4 and timing relay coil TA4 switch on simultaneously, normally closed contact J4#1 disconnects, close motherboard power supply POWER to be measured and make mainboard outage to be measured, normally opened contact J4#2 closure is finished self-locking, timing relay coil TA4 was provided with after the time, and normally closed contact TA4#1 disconnects, relay coil J4 outage, normally opened contact J4#2 disconnects, and described mainboard test circuit 10 is got back to original state.
After voltage tester began, intelligent alarm type voltage table V1 ~ V6 showed on the mainboard to be measured and the magnitude of voltage of its corresponding measuring point, makes the operator understand the test voltage of corresponding electronic component on the mainboard to be measured.After the timing relay coil TA3 delay time, normally opened contact TA3#1 and TA3#2 closure, open intelligent alarm type voltage table V1 ~ V6 on/lower limit outputs state detection function, the alarm relay closed pair of described intelligent alarm type voltage table V1 ~ V6 is answered when the test voltage value is not in a default acceptability limit upper voltage limit switch H1 ~ H6 or lower voltage limit switch N1 ~ N6.If arbitrary closure among described upper voltage limit switch H1 ~ H6 and the lower voltage limit switch N1 ~ N6, relay coil J5 energising, normally closed contact J5#1 is disconnected, and cuts off pilot lamp L4 power supply, and normally opened contact J5#2 is closed, connect pilot lamp L3, relay coil J6 energising simultaneously, normally opened contact J6#1 closure, hummer S sends sound, this moment test is interrupted, and stopped process is identical with stopped process after testing current is failed.
If described upper voltage limit switch H1 ~ H6 and lower voltage limit switch N1 ~ N6 are all not closed, be that the magnitude of voltage that described intelligent alarm type voltage table V1 ~ V6 records meets the demands, described relay coil J7 energising, pilot lamp L4 is bright, the prompting test is passed through, while normally opened contact J7#1 closure, hummer S sends sound, and normally opened contact J7#2 is also closed, relay coil J4 and timing relay coil TA4 switch on simultaneously, normally closed contact J4#3 is disconnected and makes relay coil J1 outage, and all normally opened contacts are decontroled, and normally closed contact J4#1 is disconnected, motherboard power supply to be measured disconnects, normally opened contact J4#2 is closed the realization self-locking, and timing relay coil TA4 was provided with after the time, and normally closed contact TA4#1 disconnects, relay coil J4 outage, normally closed contact J4#1 closure, described mainboard test circuit 10 is got back to original state, and whole mainboard voltage test process is finished.
Above-mentioned mainboard test circuit 10 is measured the measuring current of mainboards and is gone up the test voltage of each electronic component when mainboard on-line testing to be measured, stop test and close motherboard power supply to be measured in time in the acceptability limit that the measuring current or the test voltage of mainboard to be measured are not being preset, can measure the test voltage after the mainboard to be measured start, and avoid measuring current or voltage is excessive causes mainboard to be measured to burn.
Claims (5)
1. mainboard test circuit, comprise a current testing circuit, one circuit for testing voltage and a control circuit, described control circuit comprises that one can set reometer and at least one voltage table of setting the test voltage acceptability limit of measuring current acceptability limit, described current testing circuit starts the measuring current that described reometer is monitored mainboard to be measured, when the measuring current value of mainboard to be measured not during default acceptability limit at described reometer, described control circuit cuts out described current testing circuit, when the measuring current value of mainboard to be measured during at default acceptability limit described current testing circuit start described circuit for testing voltage, open the power supply of described mainboard to be measured simultaneously, this moment, described at least one voltage table began to monitor the test voltage of corresponding electronic component on the described mainboard to be measured, when the test voltage of electronic component on the described mainboard to be measured during not at the default acceptability limit of corresponding voltage table, described control circuit cuts out described circuit for testing voltage, closes the power supply of described mainboard to be measured simultaneously.
2. mainboard test circuit as claimed in claim 1, it is characterized in that: described current testing circuit comprises one first power switch, one first pilot lamp gauge tap, one first pilot lamp and one first relay coil in parallel with described first pilot lamp, described reometer the measuring current value during not at default acceptability limit by the closed described first pilot lamp gauge tap of its alarm relay, make described first pilot lamp luminous and start described first relay coil, described first relay coil is controlled described first power switch, makes described current testing circuit outage.
3. mainboard test circuit as claimed in claim 1, it is characterized in that: described circuit for testing voltage comprises a second source switch, one second pilot lamp gauge tap, one second pilot lamp and one second relay coil in parallel with described second pilot lamp, the voltage table of described control circuit the test voltage value during not at default acceptability limit by the closed described second pilot lamp gauge tap of its alarm relay, make described second pilot lamp luminous and start described second relay coil, described second relay coil is controlled described second source switch, makes described circuit for testing voltage outage.
4. mainboard test circuit as claimed in claim 3, it is characterized in that: described mainboard test circuit also comprises a mainboard switch, it is connected with motherboard power supply to be measured and controls its unlatching or close, after described second relay coil starts, control described mainboard switch, close described motherboard power supply to be measured.
5. mainboard test circuit as claimed in claim 1, it is characterized in that: described mainboard test circuit also comprises a hummer and two hummer gauge tap, be connected between the power end and a power supply of described hummer after the described two hummer gauge tap parallel connections, described two hummer gauge tap are respectively by described first relay coil and the control of second relay coil.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN200710200252A CN100583054C (en) | 2007-03-06 | 2007-03-06 | Mainboard test circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN200710200252A CN100583054C (en) | 2007-03-06 | 2007-03-06 | Mainboard test circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101261598A true CN101261598A (en) | 2008-09-10 |
| CN100583054C CN100583054C (en) | 2010-01-20 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN200710200252A Expired - Fee Related CN100583054C (en) | 2007-03-06 | 2007-03-06 | Mainboard test circuit |
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| Country | Link |
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| CN (1) | CN100583054C (en) |
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102455962A (en) * | 2010-10-29 | 2012-05-16 | 上海三旗通信科技股份有限公司 | Method for automatically starting program test through current detection |
| CN102520270A (en) * | 2011-11-24 | 2012-06-27 | 浪潮电子信息产业股份有限公司 | Method for testing ultimate working performance of server system accessories |
| CN101738534B (en) * | 2008-11-24 | 2013-07-31 | 名硕电脑(苏州)有限公司 | Voltage test device and voltage test method |
| CN103389405A (en) * | 2012-05-11 | 2013-11-13 | 鸿富锦精密工业(武汉)有限公司 | Discharging detection circuit |
| CN104237573A (en) * | 2014-10-09 | 2014-12-24 | 崧顺电子（深圳）有限公司 | Automatic testing equipment for cellphone chargers |
| CN105302678A (en) * | 2015-09-24 | 2016-02-03 | 浪潮电子信息产业股份有限公司 | Adjusting and optimizing method utilizing PID to achieve fluctuations of CPU and internal storage VR output voltage |
| CN105849542A (en) * | 2013-12-23 | 2016-08-10 | 生命扫描苏格兰有限公司 | Hand-held test meter with an operating range test strip simulation circuit block |
| CN105974300A (en) * | 2016-06-14 | 2016-09-28 | 浪潮电子信息产业股份有限公司 | Testing method for realizing ICT test coverage rate increase through adding relay board |
| CN107728091A (en) * | 2017-09-20 | 2018-02-23 | 国网天津市电力公司电力科学研究院 | A kind of device for being used to supervise Existing during Partial Discharge Test for Transformer quality |
| CN111982550A (en) * | 2019-05-21 | 2020-11-24 | 光环科技股份有限公司 | Burn-in test machine with monitoring device and monitoring method thereof |
-
2007
- 2007-03-06 CN CN200710200252A patent/CN100583054C/en not_active Expired - Fee Related
Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101738534B (en) * | 2008-11-24 | 2013-07-31 | 名硕电脑(苏州)有限公司 | Voltage test device and voltage test method |
| CN102455962A (en) * | 2010-10-29 | 2012-05-16 | 上海三旗通信科技股份有限公司 | Method for automatically starting program test through current detection |
| CN102520270A (en) * | 2011-11-24 | 2012-06-27 | 浪潮电子信息产业股份有限公司 | Method for testing ultimate working performance of server system accessories |
| CN103389405A (en) * | 2012-05-11 | 2013-11-13 | 鸿富锦精密工业(武汉)有限公司 | Discharging detection circuit |
| CN105849542A (en) * | 2013-12-23 | 2016-08-10 | 生命扫描苏格兰有限公司 | Hand-held test meter with an operating range test strip simulation circuit block |
| CN104237573A (en) * | 2014-10-09 | 2014-12-24 | 崧顺电子（深圳）有限公司 | Automatic testing equipment for cellphone chargers |
| CN104237573B (en) * | 2014-10-09 | 2017-07-07 | 湖南崧顺科技有限公司 | Charger for mobile phone ATE |
| CN105302678A (en) * | 2015-09-24 | 2016-02-03 | 浪潮电子信息产业股份有限公司 | Adjusting and optimizing method utilizing PID to achieve fluctuations of CPU and internal storage VR output voltage |
| CN105974300A (en) * | 2016-06-14 | 2016-09-28 | 浪潮电子信息产业股份有限公司 | Testing method for realizing ICT test coverage rate increase through adding relay board |
| CN107728091A (en) * | 2017-09-20 | 2018-02-23 | 国网天津市电力公司电力科学研究院 | A kind of device for being used to supervise Existing during Partial Discharge Test for Transformer quality |
| CN111982550A (en) * | 2019-05-21 | 2020-11-24 | 光环科技股份有限公司 | Burn-in test machine with monitoring device and monitoring method thereof |
Also Published As
| Publication number | Publication date |
|---|---|
| CN100583054C (en) | 2010-01-20 |
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