CN112825548B - Implementation method for reducing crosstalk of image sensor circuit - Google Patents
Implementation method for reducing crosstalk of image sensor circuit Download PDFInfo
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- CN112825548B CN112825548B CN201911149437.0A CN201911149437A CN112825548B CN 112825548 B CN112825548 B CN 112825548B CN 201911149437 A CN201911149437 A CN 201911149437A CN 112825548 B CN112825548 B CN 112825548B
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- 238000002347 injection Methods 0.000 claims description 9
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/60—Noise processing, e.g. detecting, correcting, reducing or removing noise
- H04N25/617—Noise processing, e.g. detecting, correcting, reducing or removing noise for reducing electromagnetic interference, e.g. clocking noise
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Abstract
The invention provides a realization method for reducing crosstalk of an image sensor circuit, wherein an analog-digital conversion circuit of the image sensor comprises a plurality of columns of comparators; after the input offset is eliminated, the non-identical charges are respectively injected into the high-resistance points of the input blocking capacitors of the comparators in different columns, so that the number of the comparators which are turned over simultaneously in the comparators in multiple columns is reduced, the crosstalk of circuits is reduced, the signal stability and the imaging quality are improved, and the performance of the image sensor is improved.
Description
Technical Field
The invention relates to an implementation method for reducing crosstalk of an image sensor circuit.
Background
With the development of semiconductor technology, the design of high-pixel image sensors is more and more complex, and the analog-digital conversion circuit of the image sensor often comprises hundreds to thousands of columns of comparators. In the working process of the image sensor, if the plurality of rows of comparators are turned over at the same time, crosstalk is formed between the comparators, so that the signal stability and the imaging quality are greatly reduced, and the performance of the image sensor is affected.
Disclosure of Invention
The invention aims to provide an implementation method for reducing crosstalk of an image sensor circuit, which improves signal stability and imaging quality and improves performance of the image sensor.
Based on the above consideration, the present invention provides a method for reducing crosstalk of an image sensor circuit, wherein an analog-to-digital conversion circuit of the image sensor comprises a plurality of columns of comparators; after the input offset is eliminated, the non-identical charges are respectively injected into the high-resistance points of the input blocking capacitors of the comparators in different columns, so that the number of the comparators which are turned over simultaneously in the comparators in multiple columns is reduced, and the crosstalk of the circuit is reduced.
Preferably, at the high resistance point of the input blocking capacitor of the different column comparators, a differential capacitance mode is adopted to realize charge injection.
Preferably, the non-identical charges of the multi-column comparator are N, and the multi-column comparator is flipped at N time points; wherein N is a natural number greater than or equal to 2.
Preferably, the high resistance point of the input blocking capacitor of the two input ends of the comparator can be used for injecting charges.
Preferably, the number of columns of the multi-column comparator is 1000 or more.
According to the realization method for reducing the crosstalk of the image sensor circuit, the non-identical charges are respectively injected into the high-resistance points of the input blocking capacitors of the comparators of different columns, so that the number of the comparators which are turned over simultaneously in the multi-column comparators is reduced, the crosstalk of the circuit is reduced, the signal stability and the imaging quality are improved, and the performance of the image sensor is improved.
Drawings
Other features, objects and advantages of the present invention will become more apparent from the detailed description of non-limiting embodiments which follows, which is read in connection with the accompanying drawings.
FIG. 1 is a schematic diagram of an M-th column comparator in an image sensor according to the present invention;
FIG. 2 is a schematic diagram of injection charge configuration of different column comparators according to a preferred embodiment of the present invention;
FIG. 3 is a schematic diagram of injection charge configuration of different column comparators according to another preferred embodiment of the present invention;
fig. 4 is a schematic diagram of injection charge configuration of different column comparators according to yet another preferred embodiment of the present invention.
In the drawings, the same or similar reference numerals denote the same or similar devices (modules) or steps throughout the different drawings.
Detailed Description
In order to solve the above-mentioned problems in the prior art, the present invention provides a method for reducing crosstalk of an image sensor circuit, wherein an analog-to-digital conversion circuit of the image sensor includes a plurality of columns of comparators; after the input offset is eliminated, the non-identical charges are respectively injected into the high-resistance points of the input blocking capacitors of the comparators in different columns, so that the number of the comparators which are turned over simultaneously in the comparators in multiple columns is reduced, the crosstalk of circuits is reduced, the signal stability and the imaging quality are improved, and the performance of the image sensor is improved.
The illustrated embodiments are not intended to be exhaustive of all embodiments according to the invention. It is to be understood that other embodiments may be utilized and structural or logical changes may be made without departing from the scope of the present invention. The following detailed description is, therefore, not to be taken in a limiting sense, and the scope of the present invention is defined by the appended claims.
The invention will be described in detail with reference to specific examples.
The invention provides a realization method for reducing crosstalk of an image sensor circuit, wherein an analog-digital conversion circuit of the image sensor comprises a plurality of columns of comparators, for example, the columns of the plurality of columns of comparators can be more than or equal to 1000. Fig. 1 shows a schematic circuit diagram of an mth column comparator COMP-M having two input terminals Vin1, vin2 corresponding to the input blocking capacitors C1, C2 and the high resistance points H1, H2, respectively, so that both input terminals Vin1, vin2 are available for charge injection at the high resistance points H1, H2 of the input blocking capacitors C1, C2.
As an example, fig. 1 shows that at the high resistance point H2 of the input blocking capacitor C2 of one of the input terminals Vin2, a differential capacitance mode is adopted to implement charge injection. Specifically, as shown in fig. 1, at least two capacitors C3, C4 are connected at the high resistance point H2 of the input blocking capacitor C2 of the mth column comparator COMP-M, the total capacitance value c=c3+c4 thereof is fixed and the value of each column is the same, wherein C3 is connected to the first external voltage Vext1 for injecting charges, C4 is connected to the second external voltage Vext2, and as a compensation capacitor, vext2 may be, for example, the ground voltage Vgnd, and the value of the capacitor C3 for injecting charges controlling each column comparator is not identical, and correspondingly, the value of the compensation capacitor C4 of each column comparator is not identical. Of course, a differential capacitance method is not used, that is, only the capacitor C3 for injecting charges is connected at the high resistance point H2 of the input blocking capacitor C2, and the compensation capacitor C4 is not connected, and the values of the capacitors C3 for injecting charges controlling each column of comparators are not exactly the same. When the value of the capacitor C3 for injecting charges of each column comparator is not exactly the same, injection of the non-identical charges Q at the high resistance point H2 of the input blocking capacitor C2 can be easily achieved regardless of whether the first external voltage Vext1 is the same or different.
In addition, as shown in fig. 1, the capacitor C3 for injecting charges may be switched between the first external voltage Vext1 and the pixel voltage Vpxda, so that when the values of the capacitors C3 for injecting charges of each column of comparators are the same, the pixel voltage Vpxda may be sampled first and then the first external voltage Vext1 may be sampled, and since the values of the pixel voltages Vpxda of each column of comparators are not identical, it is only necessary to control the values of the voltage differences between the first external voltage Vext1 and the pixel voltage Vpxda of each column of comparators to be not identical, so that the injection of the non-identical charges Q at the high resistance point H2 of the input blocking capacitor C2 may be realized.
Fig. 2, 3 and 4 are schematic diagrams showing the charge configuration of the input dc blocking capacitors of the comparators at the high resistance points after the input offset cancellation is completed according to the embodiments of the present invention. In a preferred embodiment shown in fig. 2, the injected charges Q at the high resistance points of the input blocking capacitors of the comparators of different columns are changed in a single parabolic manner, so that two comparators M11 and M12 with the same injected charges Q will flip at the same time; in another preferred embodiment shown in fig. 3, the injected charges Q at the high resistance points of the input blocking capacitors of the different column comparators are periodically parabolic, and six column comparators M21, M22, M23, M24, M25, M26 with the same injected charges Q will be flipped at the same time; in yet another preferred embodiment shown in fig. 4, the injected charges Q at the high resistance points of the input blocking capacitors of the different column comparators are randomly changed, and the four column comparators M31, M32, M33, M34 with the same injected charges Q will be flipped at the same time.
It will be appreciated by those skilled in the art that the above configuration of injecting charges is merely exemplary and not limiting, and in summary, after the input offset cancellation is completed, the non-identical charges are injected at the high resistance points of the input blocking capacitors of the different column comparators, respectively, and since the column comparators with identical injected charges are turned over simultaneously, when the non-identical charges of the multi-column comparators are N kinds, the multi-column comparators are turned over at N time points, where N is a natural number greater than or equal to 2, so that the number of the comparators turned over simultaneously in the multi-column comparators is reduced, the crosstalk of circuits is reduced, the signal stability and the imaging quality are improved, and the performance of the image sensor is improved.
In summary, the method for reducing crosstalk of an image sensor circuit of the present invention includes a plurality of rows of comparators in an analog-to-digital conversion circuit of the image sensor; after the input offset is eliminated, the non-identical charges are respectively injected into the high-resistance points of the input blocking capacitors of the comparators in different columns, so that the number of the comparators which are turned over simultaneously in the comparators in multiple columns is reduced, the crosstalk of circuits is reduced, the signal stability and the imaging quality are improved, and the performance of the image sensor is improved.
It will be evident to those skilled in the art that the invention is not limited to the details of the foregoing illustrative embodiments, and that the present invention may be embodied in other specific forms without departing from the spirit or essential characteristics thereof. Thus, the embodiments should be considered in all respects as illustrative and not restrictive. Furthermore, it is evident that the word "comprising" does not exclude other elements or steps, and that the word "a" or "an" does not exclude a plurality. The elements recited in the apparatus claims may also be embodied by one element. The terms first, second, etc. are used to denote a name, but not any particular order.
Claims (5)
1. A realization method for reducing crosstalk of an image sensor circuit is characterized in that,
the analog-digital conversion circuit of the image sensor comprises a plurality of columns of comparators;
after the input offset is eliminated, the non-identical charges are respectively injected into the high-resistance points of the input blocking capacitors of the comparators in different columns, so that the number of the comparators which are turned over simultaneously in the comparators in multiple columns is reduced, and the crosstalk of the circuit is reduced.
2. The method of claim 1, wherein the charge injection is performed by differential capacitance at high resistance points of input blocking capacitors of different column comparators.
3. The method for reducing crosstalk of an image sensor circuit according to claim 1, wherein the plurality of column comparators are not identical in charge and N kinds, and the plurality of column comparators are inverted at N time points; wherein N is a natural number greater than or equal to 2.
4. The method of claim 1, wherein the two input terminals of the comparator are both used to inject charge at a high resistance point of an input dc blocking capacitor.
5. The method according to claim 1, wherein the number of columns of the multi-column comparator is 1000 or more.
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