CN112824916A - High-temperature testing device and method for integrated chip - Google Patents
High-temperature testing device and method for integrated chip Download PDFInfo
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- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2855—Environmental, reliability or burn-in testing
- G01R31/2872—Environmental, reliability or burn-in testing related to electrical or environmental aspects, e.g. temperature, humidity, vibration, nuclear radiation
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Abstract
The invention discloses a high-temperature testing device and a high-temperature testing method for an integrated chip, wherein the testing method comprises the following steps: inputting heating current to an idle pin of a chip to be tested so as to improve the testing temperature of the chip to be tested; determining whether the test temperature of the chip to be tested reaches a target temperature; and when the testing temperature of the chip to be tested reaches the target temperature, performing parameter or performance testing on the chip to be tested by using the testing machine. The high-temperature test of the integrated chip can be realized at normal temperature on the general test board, the requirement on equipment is low, and the operation is simple.
Description
Technical Field
The invention relates to the technical field of testing, in particular to a high-temperature testing device and a high-temperature testing method for an integrated chip.
Background
With the enhancement of the functions of the integrated chips and the continuous expansion of the integrated scale, the testing of the chips becomes more and more difficult, the testing cost is often higher than the design cost, the testing cost becomes an important component of the development cost of the products, and the time of the testing directly influences the time of the products on the market and further influences the economic benefit.
The parameters and performance of the integrated chip are different under different temperature conditions, and mainly comprise a normal temperature (25 ℃) characteristic, a low temperature (lower than 25 ℃) characteristic and a high temperature (higher than 25 ℃). In the links of research and development, factory test, application development and the like of an integrated circuit, the high-temperature characteristics of an integrated chip are generally required to be inspected.
At present, there are two main methods for testing the high temperature characteristics of an integrated chip: one is to heat the integrated chip by a constant temperature heating table and then test the chip; and the other is testing after heating the integrated chip by a high-temperature constant-temperature experimental box.
When the two methods for testing the high-temperature characteristics of the integrated chip are adopted, the testing time is long, the cost is high, the efficiency is low, the testing precision is not high, the experiment operation is inconvenient, and certain dangerousness is realized.
Therefore, there is a need to provide an improved technical solution to overcome the above technical problems in the prior art.
Disclosure of Invention
In order to solve the technical problems, the invention provides a high-temperature testing device and a testing method for an integrated chip, which can realize the high-temperature testing of the integrated chip on a general testing platform at normal temperature, have low requirements on equipment and are simple to operate.
The invention provides a high-temperature test device of an integrated chip, which comprises: the test board is connected with a test pin of the chip to be tested and used for carrying out parameter and performance test on the chip to be tested; the adjustable power supply module is connected with an idle pin of the chip to be tested and used for providing heating current for the chip to be tested so that the chip to be tested is in a high-temperature test environment, the idle pin at least comprises a first pin and a second pin which are connected with an ESD protection circuit, a parasitic diode is arranged between one of the first pin and the second pin and a reference ground, and the other pin is connected with the adjustable power supply module.
Preferably, the adjustable power supply module is an adjustable constant current source.
Preferably, the adjustable power supply module is an adjustable constant voltage source, and an output end of the adjustable constant voltage source is connected with the idle pin of the chip to be tested through a resistor.
Preferably, the high-temperature testing device of the integrated chip further comprises a temperature measuring module, wherein the temperature measuring module is connected with the first pin and the second pin and is used for monitoring the temperature change of the chip to be tested in real time in the testing process.
Preferably, the adjustable power supply module outputs a path of heating current, and the path of heating current is output to an idle pin connected with a cathode of the parasitic diode in the chip to be tested.
Preferably, the adjustable power supply module outputs multiple paths of heating currents, and the multiple paths of heating currents are respectively output to a plurality of idle pins connected with the cathode of the parasitic diode in the chip to be tested.
The high-temperature test method of the integrated chip provided by the invention comprises the following steps: inputting heating current to an idle pin of a chip to be tested so as to improve the testing temperature of the chip to be tested; determining whether the test temperature of the chip to be tested reaches a target temperature; and when the testing temperature of the chip to be tested reaches the target temperature, performing parameter or performance testing on the chip to be tested by using a testing machine.
Preferably, the inputting of the heating current to the idle pin of the chip to be tested includes: inputting reference current to an idle pin of a chip to be tested; measuring the test temperature of the chip to be tested corresponding to the reference current; and increasing the heating current according to a preset step value according to the difference value between the test temperature of the chip to be tested corresponding to the reference current and the target temperature.
Preferably, the inputting of the heating current to the idle pin of the chip to be tested includes: inputting reference current to an idle pin of a chip to be tested; and adjusting the heating current input to the idle pin of the chip to be tested according to the lookup table.
Preferably, the lookup table is a relationship table between the parasitic diode temperature and current/voltage.
Preferably, the lookup table is a relationship table between a temperature difference and a current/voltage of the parasitic diode.
Preferably, the inputting of the heating current to the idle pin of the chip to be tested includes: inputting reference current to an idle pin of a chip to be tested; randomly generating a heating current regulating value by a random number generator; adjusting the heating current according to the heating current adjustment value on the basis of the reference current.
Preferably, each time the heating current is adjusted, the next adjustment is made after a period of time.
Preferably, determining whether the test temperature of the chip to be tested reaches the target temperature includes: and observing the temperature test result of the temperature measurement module to judge whether the test temperature of the chip to be tested reaches the target temperature.
Preferably, determining whether the test temperature of the chip to be tested reaches the target temperature includes: and judging whether the heating current input to the chip to be tested reaches a current value corresponding to the target temperature or not according to the temperature and current curve.
The invention has the beneficial effects that: the invention can realize the high-temperature test of the integrated chip under the normal temperature environment by heating the chip to be tested through the current, and has simple operation and low requirement on equipment during the test. Meanwhile, the output current of the adjustable power supply module is adjustable, so that the adjustable power supply module can adapt to different high-temperature test requirements and precision requirements, and the accuracy of test results is improved.
The heating current is constant current, the current fluctuation is small, and the accuracy of the test result can be further improved.
The temperature measuring device can monitor the temperature change of the chip to be measured in real time in the testing process.
The adjustable power supply module only outputs one path of heating current to the idle pin of the chip to be tested, the testing environment temperature of the chip to be tested can be improved through the simplest connection structure, and the influence on the chip testing can be avoided to the greatest extent.
The adjustable power supply module simultaneously outputs multiple paths of heating currents to the idle pins of the chip to be tested, so that the heating efficiency is improved, and the testing time is shortened.
When the heating current is input to the idle pin of the chip to be tested, the reference heating current is input firstly, and then the current value of the input heating current is gradually increased, so that the damage of directly inputting a large current value to the chip to be tested can be avoided, and the experimental error is reduced.
The process of temperature measurement can be avoided by a look-up table, simplifying the testing procedure.
When the heating current is adjusted once, the next adjustment is carried out after a period of time, so that the parasitic diode in the chip to be measured has an adaptation process, and the accuracy of temperature adjustment is further improved.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention, as claimed.
Drawings
The above and other objects, features and advantages of the present invention will become more apparent from the following description of the embodiments of the present invention with reference to the accompanying drawings.
FIG. 1 is a system block diagram of a high temperature testing apparatus for an integrated chip according to an embodiment of the present invention;
FIG. 2 is a schematic diagram illustrating an exemplary high temperature testing apparatus according to an embodiment of the present invention;
fig. 3 is a flow chart illustrating a high-temperature testing method for an integrated chip according to an embodiment of the present invention.
Detailed Description
To facilitate an understanding of the invention, the invention will now be described more fully with reference to the accompanying drawings. Preferred embodiments of the present invention are shown in the drawings. The invention may, however, be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used herein in the description of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention.
The present invention will be described in detail below with reference to the accompanying drawings.
Fig. 1 shows a system block diagram of a high temperature testing apparatus for an integrated chip according to an embodiment of the present invention.
As shown in fig. 1, in the present embodiment, the high temperature testing apparatus for an integrated chip includes a testing platform 100 and an adjustable power module 300.
The test board 100 is connected to a test pin of the chip 200 to be tested, and is used for performing parameter and performance tests on the chip 200 to be tested.
The adjustable power module 300 is connected to an idle pin of the chip 200 to be tested, and is configured to provide a heating current to the chip 200 to be tested, so that the chip 200 to be tested is in a high-temperature testing environment. The chip 200 to be tested is heated by current, so that the high-temperature test of the integrated chip can be completed in a normal-temperature environment, the operation is simple during the test, and the requirement on equipment is low. On the other hand, the output current of the adjustable power supply module 300 is adjustable, so that the adjustable power supply module can adapt to different high-temperature test requirements and precision requirements, and the accuracy of test results is improved.
The idle pin of the chip 200 to be tested indicates that when a certain parameter of the chip is tested, the level state on the pin does not affect the parameter test of the chip. In this embodiment, the idle pins of the chip 200 to be tested at least include a first pin and a second pin (i.e., ESD pins) connected to an ESD (Electro-Static discharge) protection circuit. One of the first and second pins has a parasitic diode (herein the parasitic diode is denoted as ESD diode to distinguish other parasitic diodes inside the chip) to ground, and the other is connected to the adjustable power module 300.
In a possible embodiment, the adjustable power module 300 only outputs a heating current, and the heating current is output to an idle pin of the chip 200 to be tested, which is connected to the cathode of the parasitic diode, so that the test environment temperature of the chip 200 to be tested can be raised by the simplest connection structure, and the influence on the chip test can be avoided to the greatest extent.
In another possible embodiment, the adjustable power module 300 outputs multiple heating currents, and each of the multiple heating currents is respectively output to multiple idle pins connected to the cathodes of the parasitic diodes in the chip 200 to be tested, so that the heating efficiency is improved, and the testing time is shortened. At this time, the test temperature of the chip 200 to be tested is accumulated for each heating current.
It will be appreciated that the parasitic diode described above is typically present in existing integrated chips, with the anode of the parasitic diode being grounded to provide ESD protection to the integrated chip instead of a large resistor.
In one possible embodiment, the adjustable power module 300 is an adjustable constant current source.
In another possible embodiment, the adjustable power module 300 is an adjustable constant voltage source, and a resistor is connected to an output terminal of the adjustable constant voltage source.
The adjustable constant current source or the adjustable constant voltage source provides the heating current to the chip 200 to be tested at each time, the current fluctuation is small, and the accuracy of the test result can be further improved.
In a preferred embodiment, the high temperature testing apparatus of the integrated chip further includes a temperature measuring module 400, the temperature measuring module 400 is connected to the first pin and the second pin of the chip 200 to be tested, so as to monitor the temperature change of the chip 200 to be tested in real time during the testing process, and send a regulation signal to the adjustable power module 300 when the temperature of the chip 200 to be tested is abnormal, so that the adjustable power module 300 regulates the output current, and further regulates the testing temperature of the chip 200 to be tested to meet the normal testing requirement. Or an alarm is given when the temperature of the chip 200 to be tested is abnormal, so as to remind the tester to adjust the test temperature. The temperature measurement module 400 further improves the accuracy of the test result and the controllability of the testing device.
The invention utilizes the idle pin of the chip 200 to be tested, which is useless for parameter test, to provide current for heating so that the chip 200 to be tested is in a high-temperature test environment, thereby realizing the high-temperature characteristic test of the integrated chip at normal temperature.
Meanwhile, the pins of the chip 200 to be tested are a heating pin and a temperature measuring pin (at this time, the ESD diode in the chip is in a forward conduction state) during testing, so as to realize high-temperature characteristic testing of the chip to be tested; the pin is an ESD protection pin in the normal work of the chip (at the moment, an ESD diode in the chip is in a reverse conducting state) and is used for realizing ESD protection on the chip to be tested. Therefore, the technical scheme disclosed by the invention can realize the reasonable application of one-pin multifunction of the chip, simplify the structure of the high-temperature testing device of the integrated chip, reduce the operation difficulty and complexity, improve the accuracy and precision of the testing result and enhance the resource utilization rate.
Fig. 2 is a schematic structural diagram of an exemplary high temperature testing apparatus according to an embodiment of the present invention.
Referring to fig. 1, the operation of the high temperature testing apparatus for integrated chips is illustrated in detail by taking a chip 200 to be tested having 6 pins as an example, as shown in fig. 2.
In this embodiment, the chip 200 to be tested includes pin 1, pin 2, pin 3, pin 4, pin 5, and pin 6. Assume that, when a certain parameter or performance test of the chip is performed, pin 1 and pin 2 are test pins, and pin 3, pin 4, pin 5, and pin 6 are idle pins, where there is an ESD diode D1 between pin 5 and pin 6, which corresponds to the first pin and the second pin described in fig. 1.
As described above, in one possible embodiment, when performing a high temperature characteristic test of the chip 200 to be tested, the pins 1 and 2 are respectively connected to the tester 100 as signal input and signal output pins, the pin 5 is grounded, the pins 4 and 6 are respectively connected to the adjustable power module 300, and the temperature measuring end of the temperature measuring module 400 is connected to the pins 5 and 6.
After the device is powered on, the adjustable power module 300 draws current from the ground terminal through the ESD diode D1 for a period of time, so as to raise the temperature of the ESD diode D1, and further, the chip 200 to be tested is in a high-temperature testing environment. At this temperature, the tester 100 performs a parameter or performance test on the chip 200 to be tested.
Further, the temperature measuring module 400 monitors the temperature change of the chip 200 to be tested in the processes of temperature rise and subsequent testing, and then can adjust and control the heating current in time when the temperature is abnormal so as to ensure that the high-temperature characteristic test of the chip 200 to be tested is normally performed.
It is understood that the heating current value provided by the adjustable power module 300 should be within the process protection range, and the temperature rise of the heating current to the ESD diode D1 should be within the process protection range, so as to avoid the component burning out and the component can not be tested.
Preferably, when the adjustable power module 300 controls the temperature of the ESD diode D1 to rise, the temperature of the ESD diode D1 may be gradually raised by a current increasing method, so as to provide a temperature adaptation process for the ESD diode D1, thereby avoiding damage to the ESD diode D1 and even a chip to be tested due to direct temperature rise from a low temperature to a high temperature in a large range, and further improving the accuracy of a test result.
The specific adjustment method can be described with reference to fig. 3.
It should be noted that the above 6-pin chip under test is only an exemplary illustration, and the invention can also perform high temperature characteristic tests of other integrated chips such as 8-pin, 16-pin, 32-pin, and more pins, using the same principle as above.
Fig. 3 is a flow chart illustrating a high-temperature testing method for an integrated chip according to an embodiment of the present invention.
As shown in fig. 3, in the present embodiment, the method for testing the integrated chip at a high temperature includes steps S01 to S05, which are detailed as follows with reference to fig. 1 and fig. 2:
in step S01, a heating current is input to the idle pin of the chip to be tested, so as to raise the testing temperature of the chip to be tested.
In this embodiment, as shown in fig. 1 and fig. 2, when performing a high temperature characteristic test of an integrated chip, an adjustable power module 300 is connected to an idle pin of a chip 200 to be tested, the adjustable power module 300 is configured to provide a heating current to the chip 200 to be tested, and the heating current passes through an ESD diode D1 in the chip 200 to be tested, so as to raise a temperature of an equivalent PN junction of the ESD diode D1, and further raise a test temperature of the whole chip 200 to be tested.
Further, the adjustable power module 300 is step-by-step adjustment when inputting the heating current to the idle pin of the chip 200 to be tested, so that the damage of directly inputting a large current value to the chip to be tested can be avoided, and the experimental error can be reduced.
Specifically, in a possible embodiment, the adjustable power module 300 first provides a reference current to the chip 200 to be tested, measures the test temperature of the chip to be tested corresponding to the reference current after a period of time, and gradually increases the heating current according to a preset step value according to a difference between the test temperature of the chip corresponding to the reference current and the target temperature displayed by the temperature measurement module 400 until the temperature requirement of the high-temperature characteristic test of the chip 200 to be tested is met.
In another possible embodiment, the adjustable power module 300 provides the reference current to the chip 200 to be tested, and after a period of time, the heating current output by the adjustable power module 300 is adjusted according to the lookup table.
Further, the lookup table includes a table of the relationship between the temperature and the current of the diode D1, a table of the relationship between the temperature and the voltage of the diode D1, and a table of the relationship between the temperature difference and the current/voltage of the diode D1. The current/voltage values to be adjusted for changing the same temperature difference are also different on the basis of different temperatures, as is the current value to be adjusted for the temperature difference of 10 ℃, which may be different from 10 ℃ to 20 ℃ and from 30 ℃ to 40 ℃. Therefore, the accuracy of the test environment temperature of the chip 200 to be tested can be further provided by searching the relation table between the temperature difference and the current/voltage, and the accuracy of the test result is further improved.
It can be understood that when the adjustable power module 300 is an adjustable constant current source, the relationship table between temperature and current, or the relationship table between temperature difference and current is searched; when the adjustable power module 300 is an adjustable constant voltage source, a relation table between temperature and voltage or a relation table between temperature difference and voltage is searched.
Optionally, a random value adjustment method may also be adopted to adjust the heating current and the temperature, for example, a reference current is first input to an idle pin of the chip to be tested; and then a random number generator randomly generates a heating current regulating value, and finally, the heating current is regulated according to the generated random value on the basis of the reference current. Random value adjustment can greatly reduce the chance of experiments.
Further, when the heating current is adjusted once, the next adjustment is performed after a period of time, so that the ESD diode D1 in the chip 200 under test has an adaptive process, and the accuracy of temperature adjustment is improved.
Further, the pins of the chip 200 to be tested connected to the adjustable power module 300 are a heating pin and a temperature measuring pin (at this time, the ESD diode D1 in the chip is in a forward conduction state) during testing, so as to implement a high-temperature characteristic test on the chip to be tested; the pin is an ESD protection pin in normal operation of the chip (at this time, an ESD diode D1 in the chip is in a reverse conduction state), and is used for implementing ESD protection on the chip to be tested. Therefore, the technical scheme disclosed by the invention can realize the reasonable application of one-pin multifunction of the chip, simplify the structure of the high-temperature testing device of the integrated chip, reduce the operation difficulty and complexity, improve the accuracy and precision of the testing result and enhance the resource utilization rate.
In step S02, it is determined whether the test temperature of the chip under test reaches the target temperature.
In this embodiment, the temperature test result of the temperature measurement module 400 can be directly observed, and then whether the test temperature of the chip 200 to be tested reaches the target temperature is determined, which is convenient and fast.
Optionally, whether the test temperature of the chip 200 to be tested reaches the target temperature may be determined by determining whether the output current of the adjustable power module 300 reaches the current value corresponding to the target temperature according to the temperature and current curve. The temperature measuring module 400 is not required to be arranged in the testing device, so that the testing cost is saved.
In this embodiment, as long as the test temperature or the heating current reaches the target temperature or within a certain range of the current value corresponding to the target temperature, for example, within a range of ± 0.01%, the test temperature of the chip to be tested can be approximately considered to reach the target temperature.
In step S03, when the testing temperature of the chip to be tested reaches the target temperature, the tester is used to perform a parameter or performance test on the chip to be tested.
In this embodiment, when the testing temperature of the chip to be tested reaches the target temperature, the testing machine 100 is powered on and connected to the testing pin of the chip 200 to be tested, and the parameters or performance of the chip 200 to be tested are tested according to the preset testing program.
The parameters or performance of the test chip 200 include input compensation voltage, input internal resistance, input offset voltage temperature drift, open loop gain, bandwidth gain product, output voltage swing, and the like.
In conclusion, the high-temperature test of the integrated chip can be completed in a normal-temperature environment by heating the chip to be tested through the current, the operation is simple during the test, and the requirement on equipment is low. Meanwhile, the output current of the adjustable power supply module is adjustable, so that the adjustable power supply module can adapt to different high-temperature test requirements and precision requirements, and the accuracy of test results is improved.
The technical scheme disclosed by the invention can realize the reasonable application of one chip pin with multiple functions, simplifies the structure of the high-temperature testing device of the integrated chip, reduces the operation difficulty and complexity, improves the accuracy and precision of the testing result and enhances the resource utilization rate.
It should be noted that, in this document, the contained terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
Finally, it should be noted that: it should be understood that the above examples are only for clearly illustrating the present invention and are not intended to limit the embodiments. Other variations and modifications will be apparent to persons skilled in the art in light of the above description. And are neither required nor exhaustive of all embodiments. And obvious variations or modifications of the invention may be made without departing from the scope of the invention.
Claims (15)
1. An apparatus for high temperature testing of an integrated chip, comprising:
the test board is connected with a test pin of the chip to be tested and used for carrying out parameter and performance test on the chip to be tested;
an adjustable power supply module connected with the idle pin of the chip to be tested and used for providing heating current for the chip to be tested so as to ensure that the chip to be tested is in a high-temperature testing environment,
the idle pins at least comprise a first pin and a second pin which are connected with an ESD protection circuit, a parasitic diode exists between one of the first pin and the second pin and the reference ground, and the other pin is connected with the adjustable power supply module.
2. The high temperature testing device of claim 1, wherein the adjustable power supply module is an adjustable constant current source.
3. The high temperature testing device of claim 1, wherein the adjustable power supply module is an adjustable constant voltage source, and an output end of the adjustable constant voltage source is connected to an idle pin of the chip to be tested through a resistor.
4. The high temperature testing device of claim 1, wherein the integrated chip high temperature testing device further comprises a temperature measuring module, and the temperature measuring module is connected with the first pin and the second pin and is used for monitoring the temperature change of the chip to be tested in real time during the testing process.
5. The high temperature testing device according to claim 2 or 3, wherein the adjustable power supply module outputs a heating current, and the heating current is output to a free pin of the chip to be tested, which is connected to the cathode of the parasitic diode.
6. The high temperature testing device according to claim 2 or 3, wherein the adjustable power supply module outputs multiple heating currents, and the multiple heating currents are respectively output to a plurality of idle pins connected with the cathode of the parasitic diode in the chip to be tested.
7. A high temperature test method of an integrated chip comprises the following steps:
inputting heating current to an idle pin of a chip to be tested so as to improve the testing temperature of the chip to be tested;
determining whether the test temperature of the chip to be tested reaches a target temperature;
and when the testing temperature of the chip to be tested reaches the target temperature, performing parameter or performance testing on the chip to be tested by using a testing machine.
8. The high temperature test method of claim 7, wherein inputting a heating current to the idle pin of the chip under test comprises:
inputting reference current to an idle pin of a chip to be tested;
measuring the test temperature of the chip to be tested corresponding to the reference current;
and increasing the heating current according to a preset step value according to the difference value between the test temperature of the chip to be tested corresponding to the reference current and the target temperature.
9. The high temperature test method of claim 7, wherein inputting a heating current to the idle pin of the chip under test comprises:
inputting reference current to an idle pin of a chip to be tested;
and adjusting the heating current input to the idle pin of the chip to be tested according to the lookup table.
10. The high temperature test method of claim 9, wherein the lookup table is a table of the relationship between the parasitic diode temperature and current/voltage.
11. The high temperature test method of claim 9, wherein the lookup table is a table of the relationship between the temperature difference of the parasitic diode and the current/voltage.
12. The high temperature test method of claim 7, wherein inputting a heating current to the idle pin of the chip under test comprises:
inputting reference current to an idle pin of a chip to be tested;
randomly generating a heating current regulating value by a random number generator;
adjusting the heating current according to the heating current adjustment value on the basis of the reference current.
13. The high temperature test method as set forth in any one of claims 8, 9, 10, 11 and 12, wherein each time the heating current is adjusted once, the next adjustment is made after a lapse of time.
14. The high temperature testing method of claim 7, wherein determining whether the testing temperature of the chip under test reaches a target temperature comprises:
and observing the temperature test result of the temperature measurement module to judge whether the test temperature of the chip to be tested reaches the target temperature.
15. The high temperature testing method of claim 7, wherein determining whether the testing temperature of the chip under test reaches a target temperature comprises:
and judging whether the heating current input to the chip to be tested reaches a current value corresponding to the target temperature or not according to the temperature and current curve.
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| CN201911139231.XA CN112824916A (en) | 2019-11-20 | 2019-11-20 | High-temperature testing device and method for integrated chip |
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| CN201911139231.XA Pending CN112824916A (en) | 2019-11-20 | 2019-11-20 | High-temperature testing device and method for integrated chip |
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| CN113742153A (en) * | 2021-09-15 | 2021-12-03 | 北京字节跳动网络技术有限公司 | Equipment testing method and device, readable medium and electronic equipment |
| CN118060206A (en) * | 2024-04-11 | 2024-05-24 | 蓝钛思(深圳)智造有限公司 | Chip sorting method, device, equipment and storage medium |
| CN118060206B (en) * | 2024-04-11 | 2024-10-22 | 蓝钛思(深圳)智造有限公司 | Chip sorting method, device, equipment and storage medium |
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