CN112805820A - 芯片制造方法及芯片结构 - Google Patents
芯片制造方法及芯片结构 Download PDFInfo
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- CN112805820A CN112805820A CN201880098299.5A CN201880098299A CN112805820A CN 112805820 A CN112805820 A CN 112805820A CN 201880098299 A CN201880098299 A CN 201880098299A CN 112805820 A CN112805820 A CN 112805820A
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 80
- 238000000034 method Methods 0.000 claims abstract description 46
- 230000015654 memory Effects 0.000 claims abstract description 44
- 238000003860 storage Methods 0.000 claims abstract description 9
- 238000005520 cutting process Methods 0.000 claims abstract description 6
- 239000002184 metal Substances 0.000 claims description 42
- 230000008569 process Effects 0.000 claims description 28
- 229910052710 silicon Inorganic materials 0.000 claims description 27
- 239000010703 silicon Substances 0.000 claims description 27
- 230000002093 peripheral effect Effects 0.000 claims description 13
- 230000001133 acceleration Effects 0.000 claims description 12
- 238000004364 calculation method Methods 0.000 claims description 10
- 235000012431 wafers Nutrition 0.000 description 142
- 238000004891 communication Methods 0.000 description 12
- 238000010586 diagram Methods 0.000 description 11
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 10
- 238000005516 engineering process Methods 0.000 description 6
- 230000006870 function Effects 0.000 description 5
- 238000012938 design process Methods 0.000 description 2
- 238000004806 packaging method and process Methods 0.000 description 2
- 229910000679 solder Inorganic materials 0.000 description 2
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- 230000009286 beneficial effect Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
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- 150000003376 silicon Chemical class 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Semiconductor Memories (AREA)
Abstract
本公开公开了一种芯片制造方法及芯片结构。所述方法包括：在第一晶圆上制作多个第一掩膜单元，第一掩膜单元包括处理器簇群、第一存储器、存储通道、串行通道、控制器和总线接口模块中的一种或多种；在第一晶圆上制作第一连接点；在第二晶圆上制作多个第二掩膜单元，第二掩膜单元包括第二存储器、扩展模块和总线互联模块中的一种或多种；在第二晶圆上制作第二连接点；将第一晶圆和第二晶圆通过第一连接点和第二连接点键合在一起，对晶圆进行切割，切割得到的芯片尺寸与第二掩膜单元的尺寸相同。本公开技术方案可以大大节省芯片生产时产生的一次性费用，不仅能够节省时间和人力成本，还能够降低每个单一规格或性能产品的生产风险和生产成本。
Description
PCT国内申请，说明书已公开。
Claims (22)
- PCT国内申请，权利要求书已公开。
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| PCT/CN2018/118696 WO2020107447A1 (zh) | 2018-11-30 | 2018-11-30 | 芯片制造方法及芯片结构 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN112805820A true CN112805820A (zh) | 2021-05-14 |
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ID=70852705
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201880098299.5A Pending CN112805820A (zh) | 2018-11-30 | 2018-11-30 | 芯片制造方法及芯片结构 |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN112805820A (zh) |
| WO (1) | WO2020107447A1 (zh) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113690261A (zh) * | 2021-08-23 | 2021-11-23 | 锐芯微电子股份有限公司 | Cmos图像传感器的形成方法 |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20030096492A1 (en) * | 2001-11-21 | 2003-05-22 | Matsushita Electric Industrial Co., Ltd. | Method for fabricating semiconductor integrated circuit device |
| US20050110125A1 (en) * | 2003-11-21 | 2005-05-26 | International Business Machines Corporation | Overlap stacking of center bus bonded memory chips for double density and method of manufacturing the same |
| US20100159646A1 (en) * | 2008-12-19 | 2010-06-24 | Samsung Electro-Mechanics Co., Ltd. | Method of manufacturing wafer level package |
| CN103366798A (zh) * | 2013-07-10 | 2013-10-23 | 格科微电子（上海）有限公司 | 动态随机存取存储器及制造方法、半导体封装件及封装方法 |
| CN103985648A (zh) * | 2014-05-23 | 2014-08-13 | 格科微电子（上海）有限公司 | 半导体的晶圆级封装方法和半导体封装件 |
| CN107833860A (zh) * | 2017-10-26 | 2018-03-23 | 苏州晶方半导体科技股份有限公司 | 一种芯片的封装方法 |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7579681B2 (en) * | 2002-06-11 | 2009-08-25 | Micron Technology, Inc. | Super high density module with integrated wafer level packages |
| SG143098A1 (en) * | 2006-12-04 | 2008-06-27 | Micron Technology Inc | Packaged microelectronic devices and methods for manufacturing packaged microelectronic devices |
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2018
- 2018-11-30 WO PCT/CN2018/118696 patent/WO2020107447A1/zh active Application Filing
- 2018-11-30 CN CN201880098299.5A patent/CN112805820A/zh active Pending
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20030096492A1 (en) * | 2001-11-21 | 2003-05-22 | Matsushita Electric Industrial Co., Ltd. | Method for fabricating semiconductor integrated circuit device |
| US20050110125A1 (en) * | 2003-11-21 | 2005-05-26 | International Business Machines Corporation | Overlap stacking of center bus bonded memory chips for double density and method of manufacturing the same |
| US20100159646A1 (en) * | 2008-12-19 | 2010-06-24 | Samsung Electro-Mechanics Co., Ltd. | Method of manufacturing wafer level package |
| CN103366798A (zh) * | 2013-07-10 | 2013-10-23 | 格科微电子（上海）有限公司 | 动态随机存取存储器及制造方法、半导体封装件及封装方法 |
| WO2015003553A1 (zh) * | 2013-07-10 | 2015-01-15 | 格科微电子（上海）有限公司 | 动态随机存取存储器及制造方法、半导体封装件及封装方法 |
| CN103985648A (zh) * | 2014-05-23 | 2014-08-13 | 格科微电子（上海）有限公司 | 半导体的晶圆级封装方法和半导体封装件 |
| CN107833860A (zh) * | 2017-10-26 | 2018-03-23 | 苏州晶方半导体科技股份有限公司 | 一种芯片的封装方法 |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113690261A (zh) * | 2021-08-23 | 2021-11-23 | 锐芯微电子股份有限公司 | Cmos图像传感器的形成方法 |
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| Publication number | Publication date |
|---|---|
| WO2020107447A1 (zh) | 2020-06-04 |
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