CN112803766A - Dead zone optimization configuration method for gallium nitride power switch - Google Patents

Abstract

The invention discloses a dead zone optimization configuration method for a gallium nitride power switch, which combines power devices and related parameters of a circuit to calculate dead zone time in real time, and the optimization of turn-off dead zone time is to ensure Q₂Switching tube is in v_ds1Voltage up to V_oWhen is, Q₂The channel is in a conducting state; eliminate t₁₅Time to t₁₈The working mode of the moment, considering t₁₇Time to t₁₈A time delay process of switching on at a moment; thereby obtaining Q₁Optimized dead time t before drive signal_{ddon_opt}And Q₂Optimized dead time t before drive signal_{ddoff_opt}. According to the invention, the conduction loss of the internal body diode of the GaN switch tube is reduced by optimizing the dead time configuration; the soft switching of the synchronous rectifier tube of the Boost converter is ensured, the follow current conduction process of the body diode is theoretically eliminated, the switching loss of a power device is reduced, and the Boost converter is convenient and simple to apply and high in applicability.

Description

Dead zone optimization configuration method for gallium nitride power switch

Technical Field

The invention relates to a switching tube and a synchronous rectification technology, in particular to a dead zone configuration method for a gallium nitride power switch (GaN HEMT).

Background

With the popularization of the application of the GaN switching device, some problems of the device are obvious. For example, when the drain is reversely biased to the source, the internal channel can conduct negative current without being driven by a gate voltage (because there is no PN junction body diode in the gan hemt), the function is similar to that of a body diode of a traditional silicon tube, and the forward bias voltage is larger and almost reaches twice of that of a common silicon tube. With the trend of high frequency of power electronic converters, the problem of switching loss of the power switching tube is particularly prominent. The conventional solution is to reduce the switching losses by soft switching techniques. However, from the analysis of the operating mode of the converter, the soft switching implementation method using the GaN internal "body diode" to clamp the freewheeling is large in loss, and particularly, when the output current is large, the conduction loss of the body diode affects the overall efficiency of the converter.

In order to solve the problem, a schottky diode with low forward conduction voltage drop is connected between the drain electrode and the source electrode of the GaN HEMT in an anti-parallel mode in practical application, and the free-wheeling clamping process of an internal body diode is replaced by the schottky diode. However, the schottky diode has a low reverse bias voltage and a large reverse leakage current, which may cause a risk in some applications and also increase the necessary hardware cost.

Disclosure of Invention

In order to solve the problems, the invention provides a dead zone optimal configuration method for a gallium nitride power switch, which analyzes the working mode of a Boost converter from the details of the working mechanism of a device and calculates a plurality of key time nodes related to internal parasitic parameters, thereby realizing the theoretical dead zone time optimal configuration.

The invention discloses a dead zone optimization configuration method for a gallium nitride power switch, which specifically comprises the following steps:

at Q₂T where the conduction channel has been turned off₃Time, Q₂The channel is completely cut off; from t₃Time of day switching directly to Q₁T in the on-delay state₆At time instant, i.e. Q₁The channel of the switch tube starts to be conducted and is originally switched from Q₂Freewheeling current of the body diode is introduced into Q₁In the conduction channel of (1); the optimized turn-on dead zone configuration time should be matched exactly to Q₂Off duration t₃-t₁；

At Q₁T in the OFF delayed state₁₂At that moment, the conducting channel is gradually turned off, Q₁And Q₂Output capacitor C_ossRespectively charged and discharged, Q₁Gate source voltage V of_gs1Discharge to V_th+ILmax/g_fs(ii) a Wherein I_LmaxIs the peak value of the inductor current in the whole switching period; at the next t₁₂Time to t₁₃Within a time period of time, V_gs1Continuously decreases to a threshold voltage V_th，i_ch1The temperature of the molten steel drops to 0,

at t₁₃Time of day, V_gs1Down to threshold voltage V_th，i_ch1Falls to 0, at which time Q₁The channel is in a complete off state, and the output capacitor is in an inductive current I_LmaxContinuously charging under the action of the current; at t₁₃To t₁₄In time period, V_gs1Continuing to descend; at t₁₄Voltage V of Miller platform in the course of turning off is reached at any moment_gs1p′：

At t₁₄To t₁₅Stage, v_gs1Maintained at the Miller plateau voltage V_gs1p′，Q₁Drain-source capacitance C of_ds1Continuing at I_LmaxKeeping the charging state until t₁₅At the moment, the capacitor voltage reaches the output voltage V_o；

The optimization of the turn-off dead time is realized: i.e. ensure Q₂Switching tube is in v_ds1Voltage up to V_oWhen is, Q₂The channel is in a conducting state; eliminating t from dead time₁₅Time to t₁₈The working mode of the moment, considering t₁₇Time to t₁₈Opening delay of timeIn the course of time, Q₂Is gradually switched on under the action of a driving signal and flows through Q₂The current of the body diode is gradually transferred into the conduction channel;

Q₁optimized dead time t before drive signal_{ddon_opt}Comprises the following steps:

t_{ddon_opt}＝R_gC_issln(V_GG/V_th)+t_f-2(C_issR_gln(V_GG/(V_GG-V_th)))-t_rV_th/V_GG

Q₂optimized dead time t before drive signal_{ddoff_opt}Comprises the following steps:

wherein, V_GGRepresenting the gate drive voltage, V_thDenotes the threshold voltage, R_gRepresenting the gate drive resistance, C_issDenotes the input capacitance, I_LmaxRepresenting the peak value of the inductor current, g, over the switching period_fsThe transconductance of the switching tube is shown,

for increasing the output capacitance from 0 to V_oRequired charge, t_rRepresenting the gate drive rise time, t_fRepresenting the gate drive fall time.

Compared with the traditional dead zone configuration method, the method has the advantages that:

from the angle of the working mechanism of the switching tube, the conduction loss of the internal body diode of the GaN switching tube is reduced in principle by optimizing the dead time configuration, and the conduction loss of the body diode is reduced without the help of auxiliary components;

the soft switching realization of the synchronous rectifier tube of the Boost converter is ensured, the follow current conduction process of the body diode is theoretically eliminated, the switching loss of the power device is reduced, the dead time can be calculated by combining a data manual of the GaN power device and the specific electrical parameters of the converter aiming at the specific GaN power device, the application is convenient and simple, and the applicability is strong.

Drawings

FIG. 1 is a schematic topology diagram of a synchronous rectification Boost converter using GaN devices;

FIG. 2 is a schematic diagram of a GaN device at different times;

(a) is 0 to t₁Modal graph of time, Q₂In a conducting state;

(b) and (c) are each t₁～t₂、t₂～t₃Modal graph of time, Q₂In the off delay state;

(d) is t₃～t₄Modal graph of time, Q₂The on channel has been turned off;

(e) is t₄～t₅Modal graph of time, Q₂In a conducting state;

(f) is t₅～t₆Modal graph of time, Q₁In the on delay state;

(g) t represents each of (h) and (i)₆～t₇、t₇～t₈、t₈～t₉Modal graph of time, Q₁In the on state, the current gradually changes from Q₂Is transferred to Q₁In the conduction channel of (1), Q₁And Q₂Output capacitor C_ossRespectively discharging and charging;

(j) and (k) are each t₉～t₁₀、t₁₀～t₁₁Modal graph of time, Q₁In a fully on state;

(l) Is t₁₁～t₁₂Modal graph of time, Q₁In the off delay state;

(m) (n), (o) and (p) are each t₁₂～t₁₃、t₁₃～t₁₄、t₁₄～t₁₅、t₁₅～t₁₆Time, Q₁In the off delay state, the conducting channel is gradually turned off, and Q₁And Q₂Output capacitor C_ossRespectively charged and discharged when Q is₁Output capacitor C_ossTo an output voltage V_oWhen is, Q₂The body diode of (2) is turned on;

(q) is t₁₆～t₁₇Mode diagram of (1), Q₂The body diode of (2) is in a conducting state;

(r),(s) and (t) are each t₁₇～t₁₈、t₁₈～t₁₉、t₁₉Modal graph of T, Q₂Is gradually switched on under the action of a driving signal and flows through Q₂The current of the body diode is gradually transferred into the conduction channel.

Detailed Description

The present invention will be described in further detail with reference to specific embodiments;

as shown in fig. 1, a schematic topology diagram of a synchronous rectification Boost converter using GaN devices is shown. As shown in fig. 2, the mode diagrams of the GaN device at different times in a half switching cycle are shown. At the initial moment, the synchronous rectifier Q₂The gate drive voltage has a magnitude of V_GG，Q₂In a conducting state; t is t₁Time, Q₂The gate drive voltage of 0, the input capacitance C_iss＝(C_gs+C_gd) In which C is_gsIs gate-source capacitance, C_gdFor gate-drain capacitance, driving resistor R through gate_gAnd discharging is performed.

Q₂The voltage expression between the gate and the source is:

up to t₂Time of day, V_gs2Down to V_th+IL/g_fs，V_thRepresenting the gate threshold voltage, g_fsThe transconductance of the switching tube is shown, and IL represents the inductor current. At this stage, Q₂Maintaining a fully on state, known as an off delay. t is t₂After time, V_gs2Continues to fall according to equation (1), Q₂The switch tube starts to enter an off state, and the current flowing through the channel of the switch tube starts to flow to Q₂The body diode transfer. t is t₃Time of day, V_gs2Down to its threshold voltage V_th，Q₂Complete turn off, current transfer to Q₂Freewheeling is performed by the body diode of (1). Calculating t from equation (2)₁To t₃The time difference of the moments is:

(t₃-t₁)_＝R_gC_issln(V_GG/V_th) (2)

the off-fall time of the gate drive signal also needs to be taken into account in order to make the time calculation more accurate. With the gradual maturity of gate driving technology, the fall time of high-performance gate driver is very short, and can be directly superimposed into formula (2). Thus, more accurate t₁To t₃The time difference of the moments is

(t₃-t₁)_＝R_gC_issln(V_GG/V_th)+t_f (3)

At t₃To t₄Stage, v_gs2From V_thAnd drops to 0. This phase does not affect the state of the power loop. When the turn-on dead time is longer, the freewheeling conduction time of the body diode will be prolonged, e.g., t₄To t₅The stages are shown. t is t₅Time, Q₁Gate pole applied driving voltage V_GGThrough a gate drive resistor R_gTo its input capacitance C_issCharging is carried out, Q₁The calculation expression of the gate-source voltage is as follows:

at t₆Stage before time, V_gs1Does not reach the threshold voltage V_th，Q₁Is not turned on, and is Q₁Turn-on delay time of (d). The time expression at this stage is:

(t₆-t₅)_＝C_issR_gln(V_GG/(V_GG-V_th)) (5)

taking into account the actual gate driverRise time t of_rLonger, actual turn-on delay time is expressed as:

t₆-t₅＝2(t₆-t₅)_+t_rV_th/V_GG (6)

according to the formula (4), t₆Time to t₇Within a phase of time, v_gs1From threshold voltage V_thIs raised to V_th+IL/g_fs。t₇At time, the inductor current is from Q₂Is fully transferred to Q₁To the channel. t is t₇Time to t₈Within a phase of time, V_gs1Continues to rise and flows through Q₁The current in the channel is i_ch1。Q₁And Q₂Drain-source capacitance C of_ds1、C_ds2At i_ch1-ILThe charging and discharging are respectively carried out under the action of the current with the magnitude. At t₈Constantly reaches equilibrium, Q₁Gate source voltage V of_gs1To achieve a Miller plateau voltage V_gs1p. Miller plateau voltage v_gs1pLimited by equation (7):

(V_GG-V_gs1p)/R_g(1+(C_ds1+C_ds2)/C_gd)＝V_gs1pg_fs (7)

t₈to t₉Time of day, V_gs1Are all kept at the Miller plateau voltage V_gs1p，V_gs1Due to the discharge, to an on-state value. At t₉Time to t₁₀Phase of time, gate-source voltage V_gs1From V_gs1pUp to gate drive voltage V_GG。

The above is a detailed modal analysis of a half switching cycle. According to the modal change, when t is₃Time Q₂When the channel is completely cut off, if it can be from t₃Direct switch to t₆I.e. Q₁The channel of the switch tube is turned on, so that the original Q-switch tube can be turned on₂Freewheeling current of the body diode is introduced into Q₁Thereby avoiding current flow through the body diode and eliminating conduction losses of the body diode as much as possible. Thus, optimized turn-on dead band configurationShould be matched exactly to Q₂Off duration (t)₃-t₁) While taking into account Q₁Turn-on delay time t_{ddon_opt}：

t_{ddon_opt}＝t₃-t₁-(t₆-t₅) (8)

Substituting the formulas (3), (5) and (6) into the formula (8) can obtain Q₁Optimized dead time t before drive signal_{ddon_opt}Comprises the following steps:

t_ddo_n_o_pt＝R_gC_issln(V_GG/V_th)+t_f-2(C_issR_gln(V_GG/(V_GG-V_th)))-t_rV_th/V_GG (9)

analysis Q based on a similar analysis method₁Turn off to Q₂And (5) opening process. After a turn-off delay, t₁₂Time of day, V_gs1Discharge to V_th+ILmax/g_fs. Wherein I_LmaxIs the peak inductor current value during the entire switching cycle. At t₁₂Time to t₁₃Within a time period of time, V_gs1Will continue to decline, the expression:

Q₁the current in the conduction channel is:

i_ch1＝(V_gs1-V_th)g_fs (11)

the charging current on the output capacitor is

(C_oss1+C_oss2)dV_ds1/dt＝I_Lmax-i_ch1 (12)

At t₁₃Time of day, V_gs1Down to threshold voltage V_th，i_ch1And drops to 0. At this time Q₁The channel is in a fully off state. But the output capacitance is at the inductor current I_LmaxAnd the charging is continued under the action of the electric field. At t₁₃To t₁₄In time period, V_gs1The drop continues according to equation (10). At t₁₄Voltage V of Miller platform in the course of turning off is reached at any moment_gs1p′：

V_gs1p′/R_g(1+(C_ds1+C_ds2)/C_gd)＝I_Lmax (13)

At t₁₄To t₁₅Stage, v_gs1Maintained at the Miller plateau voltage V_gs1p′，C_ds1Continuing at I_LmaxKeeping the charging state until t₁₅At the moment, the capacitor voltage reaches the output voltage V_o。

Q₁The turn-off delay time of (a) is:

t₁₂-t₁₁＝R_gC_issln(V_GG/(V_th+I_Lmax/g_fs))+t_f (14)

t₁₃-t₁₁＝R_gC_issln(V_GG/V_th)+t_f (15)

Q₁is determined by applying equation (12) at t₁₂Time to t₁₅The time segments of the moments are integrated (the integration operation can avoid handling the non-linearity of Coss),

for increasing the output capacitance from 0 to V_oThe required charge, expressed as:

can be obtained from the relevant device manual. T is obtained by solving three expressions of formula (14) to formula (16)₁₁Time to t₁₅Time of day, turn-on delay and last half cycleAre the same. Namely, it is

t₁₈-t₁₇＝t₆-t₅ (17)

The optimization of the turn-off dead time is to ensure Q₂Switching tube is in v_ds1Voltage up to V_oWhen is, Q₂The channel is in a conducting state. Therefore the dead time needs to be eliminated₁₅Time to t₁₈The working mode of the moment, considering t₁₇Time to t₁₈Turn on delay process at time.

Q₂Optimized dead time t before drive signal_{ddoff_opt}Comprises the following steps:

example verification:

the parameters associated with the model GS66516B bottom-heat-dissipation GaN power switch tube and the Si827x series gate driver chip manufactured by GaN System company are shown in Table 1.

TABLE 1

Gate drive resistor Rg	7Ω
		Input capacitance Ciss	520pF
Drive voltage VGG	5V
		Threshold voltage Vth	1.3V
Gate drive fall time tf	10ns
		Gate drive rise time tr	6ns
Peak value of inductor current ILmax	16A
		Transconductance g of switching tubefs	30S
Output charge Qoss	42nC

The optimal dead band configuration time for a Boost converter using a GaN switching tube model GS66516B under 500W rated operating conditions is shown in table 2, according to equations (9) and (18).

TABLE 2

Q1Optimized dead time t before drive signalddon_opt	11.15ns
		Q2Optimized dead time t before drive signalddoff_opt	15.74ns

The above is a calculation example combining a GaN power switching tube of GaN System company and a Si8273 driver chip, and the theoretical calculation result shows good effect in practical application. The method is also suitable for other GaN power switching tubes and driving chips, and has reference value in the field of Buck circuits and complementary conduction application of upper and lower bridge arms except Boost topology.

Claims (1)

1. A dead zone optimization configuration method for a gallium nitride power switch is based on the optimization of turn-off dead zone time of a synchronous rectification Boost converter adopting a GaN device, and is characterized by specifically comprising the following steps:

from Q₂T at complete channel cutoff₃Time of day switching directly to Q₁T in the on-delay state₆At time instant, i.e. Q₁The channel of the switch tube starts to be conducted and is originally switched from Q₂Freewheeling current of the body diode is introduced into Q₁In the conduction channel of (1);

accurately matching optimized turn-on dead zone configuration time to Q₂Off duration t₃-t₁；

At Q₁T in the OFF delayed state₁₂At that moment, the conducting channel is gradually turned off, Q₁And Q₂Output capacitor C_ossRespectively charged and discharged, Q₁Gate source voltage V of_gs1Discharge to V_th+ILmax/gfsIn which I_LmaxIs the peak value of the inductor current in the whole switching period;

at the next t₁₂Time to t₁₃Within a time period of time, V_gs1Continuously decrease until t₁₃Time V_gs1Down to threshold voltage V_th，i_ch1Falls to 0, at which time Q₁The channel is in a complete off state, and the output capacitor is in an inductive current I_LmaxContinuously charging under the action of the current;

at t₁₃To t₁₄In the time period, Q₁Gate source voltage V of_gs1Continuously decrease until t₁₄Voltage V of Miller platform in the course of turning off is reached at any moment_gs1p′；

At t₁₄To t₁₅In the time period, Q₁Of the gate-source voltage v_gs1Maintained at the Miller plateau voltage V_gs1p′，Q₁Drain-source capacitance C of_ds1Continuing at I_LmaxKeeping the charging state until t₁₅At the moment, the capacitor voltage reaches the output voltage V_o；

Solving to obtain t₁₁Time to t₁₅The time of day;

optimizing the turn-off dead time: i.e. ensure Q₂Switching tube is in v_ds1Voltage up to V_oWhen is, Q₂The channel is in a conducting state; eliminating t from dead time₁₅Time to t₁₈The working mode of the moment, considering t₁₇Time to t₁₈During the turn-on delay of the moment, Q₂Is gradually switched on under the action of a driving signal and flows through Q₂The current of the body diode is gradually transferred into the conduction channel;

Q₁optimized dead time t before drive signal_{ddon_opt}Comprises the following steps:

t_{ddon_opt}＝R_gC_issln(V_GG/V_th)+t_f-2(C_issR_gln(V_GG/(V_GG-V_th)))-t_rV_th/V_GG

Q₂optimized dead time t before drive signal_{ddoff_opt}Comprises the following steps:

wherein, V_GGRepresenting the gate drive voltage, V_thDenotes the threshold voltage, R_gRepresenting the gate drive resistance, C_issDenotes the input capacitance, I_LmaxRepresenting the peak value of the inductor current, g, over the switching period_fsThe transconductance of the switching tube is shown,

for increasing the output capacitance from 0 to V_oRequired charge, t_rRepresenting the gate drive rise time, t_fRepresenting the gate drive fall time.

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