CN112799984A - One-to-many conversion device from USB3.0 interface to CPCI interface - Google Patents
One-to-many conversion device from USB3.0 interface to CPCI interface Download PDFInfo
- Publication number
- CN112799984A CN112799984A CN202110159208.8A CN202110159208A CN112799984A CN 112799984 A CN112799984 A CN 112799984A CN 202110159208 A CN202110159208 A CN 202110159208A CN 112799984 A CN112799984 A CN 112799984A
- Authority
- CN
- China
- Prior art keywords
- interface
- usb hub
- hub chip
- cpci
- extended
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 102100029368 Cytochrome P450 2C18 Human genes 0.000 title claims abstract description 57
- 101000919360 Homo sapiens Cytochrome P450 2C18 Proteins 0.000 title claims abstract description 57
- 238000006243 chemical reaction Methods 0.000 title claims abstract description 32
- 230000005540 biological transmission Effects 0.000 claims description 42
- 238000000034 method Methods 0.000 description 7
- 238000010586 diagram Methods 0.000 description 3
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/382—Information transfer, e.g. on bus using universal interface adapter
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F2213/0024—Peripheral component interconnect [PCI]
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F2213/0042—Universal serial bus [USB]
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F2213/38—Universal adapter
- G06F2213/3852—Converter between protocols
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Information Transfer Systems (AREA)
Abstract
The invention discloses a one-to-many conversion device from a USB3.0 interface to a CPCI interface, which comprises a first USB HUB chip, a second USB HUB chip and a third USB HUB chip, wherein the input end of the first USB HUB chip is connected with the USB3.0 interface, two output ends of the first USB HUB chip are respectively connected with the input ends of the second USB HUB chip and the third USB HUB chip, four output ends of the second USB HUB chip and the third USB HUB chip are respectively used for connecting the CPCI interface, the first USB HUB chip is used for expanding data of the input ends to one or two output ends, the second USB HUB chip and the third USB HUB chip are used for expanding data of the input ends to one or more output ends, and each CPCI interface has a unique address. The invention can realize the conversion from one USB3.0 interface to at most 8 CPCI interfaces.
Description
Technical Field
The invention relates to the technical field of interface conversion, in particular to a one-to-many conversion device from a USB3.0 interface to a CPCI interface.
Background
The USB HUB refers to a device that can extend one USB interface to a plurality of USB interfaces and can use these USB interfaces simultaneously. USB HUBs are classified into USB2.0 HUBs, USB3.0 HUBs, and USB3.1 HUBs according to the USB protocol. The conversion from the USB3.0 interface to the USB3.0 interface can only be realized by using common USB HUB3.0 products on the market, but the CPCI interface is adopted by external control interfaces of a plurality of modules in industry, and the CPCI interface is difficult to be directly used.
Disclosure of Invention
The invention mainly solves the technical problem of providing a one-to-many conversion device from a USB3.0 interface to a CPCI interface, which can realize the conversion from one USB3.0 interface to at most 8 CPCI interfaces.
In order to solve the technical problems, the invention adopts a technical scheme that: a one-to-many conversion device of a USB3.0 interface to a CPCI interface is provided, which comprises a first USB HUB chip, a second USB HUB chip and a third USB HUB chip, the first USB HUB chip comprises an input end and two output ends, the second USB HUB chip and the third USB HUB chip comprise an input end and four output ends, the input end of the first USB HUB chip is used for connecting a USB3.0 interface, the two output ends of the first USB HUB chip are respectively connected with the input ends of the second USB HUB chip and the third USB HUB chip, the four output ends of the second USB HUB chip and the third USB HUB chip are respectively used for connecting a CPCI interface, the first USB HUB chip is used for expanding data of an input end to one or two output ends, the second USB HUB chip and the third USB HUB chip are used for expanding data of input ends to one or more output ends, wherein each CPCI interface has a unique address.
Preferably, the first USB HUB chip is further configured to allocate a transmission bandwidth of the USB3.0 interface to an extended output when data at an input end is extended to the extended output.
Preferably, when the extended output end is connected to the second USB HUB chip or the third USB HUB chip, the second USB HUB chip or the third USB HUB chip is further configured to allocate the transmission bandwidth of the USB3.0 interface to the extended output end when the data of the input end is extended to an output end.
Preferably, the second USB HUB chip or the third USB HUB chip is further configured to, when data at the input end is expanded to a plurality of output ends, evenly allocate the transmission bandwidth of the USB3.0 interface to the expanded plurality of output ends.
Preferably, the first USB HUB chip is further configured to, when data at the input end is expanded to two output ends, evenly allocate the transmission bandwidth of the USB3.0 interface to the two output ends.
Preferably, the second USB HUB chip is further configured to allocate half of the transmission bandwidth of the USB3.0 interface to an extended output when data at the input is extended to the extended output.
Preferably, the second USB HUB chip is further configured to, when data at the input end is expanded to the plurality of output ends, averagely allocate half of the transmission bandwidth of the USB3.0 interface to the expanded plurality of output ends.
Preferably, the third USB HUB chip is further configured to allocate half of the transmission bandwidth of the USB3.0 interface to an extended output when data at the input is extended to the extended output.
Preferably, the third USB HUB chip is further configured to, when data at the input end is expanded to a plurality of output ends, averagely allocate half of the transmission bandwidth of the USB3.0 interface to the expanded plurality of output ends.
Different from the prior art, the invention has the beneficial effects that: the conversion from the USB3.0 interface to the CPCI interface can be realized by using two cascaded USB HUB chips, two secondary USB HUB chips are provided, each USB HUB chip is provided with four output ends, so that the conversion from one USB3.0 interface to 8 CPCI interfaces at most can be realized, and the data transmission speed can also reach the standard of the USB3.0 even on the CPCI interfaces.
Drawings
Fig. 1 is a schematic diagram of a one-to-many conversion device from a USB3.0 interface to a CPCI interface according to an embodiment of the present invention.
Fig. 2 is an experimental data diagram of data transfer rate of a USB3.0 USB disk in the prior art.
Fig. 3 is a diagram of experimental data of a pair of conversion devices for converting a USB3.0 interface into a CPCI interface in the prior art.
Fig. 4 is a graph of experimental data when the one-to-many conversion apparatus converts the USB3.0 interface to the CPCI interface according to the embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Referring to fig. 1, in the embodiment of the present invention, the one-to-many conversion apparatus of the USB3.0 interface to CPCI interface includes a first USB HUB chip 10, a second USB HUB chip 20 and a third USB HUB chip 30, the first USB HUB chip 10 includes an input terminal and two output terminals, the second USB HUB chip 20 and the third USB HUB chip 30 include an input terminal and four output terminals, the input terminal of the first USB HUB chip 10 is used for connecting to the USB3.0 interface, the two output terminals are respectively connected to the input terminals of the second USB HUB chip 20 and the third USB HUB chip 30, the four output terminals of the second USB HUB chip 20 and the third USB HUB chip 30 are respectively used for connecting to the CPCI interface, the first USB HUB chip 10 is used for expanding data at the input terminal to one or two output terminals, the second USB HUB chip 20 and the third USB HUB chip 30 are used for expanding data at the input terminal to one or more output terminals, wherein each CPCI interface has a unique address.
Through the one-to-many conversion device provided by the embodiment of the invention, the upper computer connected with the USB3.0 interface can perform data transmission with one CPCI interface or simultaneously perform data transmission with a plurality of CPCI interfaces according to the address.
In this embodiment, the first USB HUB chip 10 is further configured to allocate the transmission bandwidth of the USB3.0 interface to the extended output when the data at the input is extended to one output.
When the output end of the expansion is connected to the second USB HUB chip 20 or the third USB HUB chip 30, the second USB HUB chip 20 or the third USB HUB chip 30 is also used to expand the data of the input end to an output end, and the transmission bandwidth of the USB3.0 interface is allocated to the expanded output end. That is, when a USB3.0 interface is switched to a CPCI interface, the data transmission speed of the CPCI interface can reach the USB3.0 standard.
The second USB HUB chip 20 or the third USB HUB chip 30 is further configured to, when expanding data at the input to multiple outputs, evenly allocate the transmission bandwidth of the USB3.0 interface to the multiple expanded outputs. That is, when one USB3.0 interface is switched to the CPCI interfaces connected to the second USB HUB chip 20 or the CPCI interfaces connected to the third USB HUB chip 30, the data transmission speed of each CPCI interface is reduced but kept consistent with each other. The transmission bandwidth of each CPCI interface is the transmission bandwidth of the USB3.0 interface divided by the number of the plurality of CPCI interfaces.
In another embodiment, the first USB HUB chip 10 is further configured to distribute the transmission bandwidth of the USB3.0 interface to two output ports evenly when the data at the input port is spread to the two output ports. That is, the data of the USB3.0 interface is transmitted to the second USB HUB chip 20 and the third USB HUB chip 30, respectively.
For the second USB HUB chip 20, there are two cases, the first case is that the second USB HUB chip 20 is also used to expand the data at the input to one output, and half of the transmission bandwidth of the USB3.0 interface is allocated to the expanded output. In the second case, the second USB HUB chip 20 is further configured to, when expanding the data at the input to the plurality of outputs, evenly allocate half of the transmission bandwidth of the USB3.0 interface to the expanded plurality of outputs. That is, when one USB3.0 interface is switched to a plurality of CPCI interfaces connected to the second USB HUB chip 20, the data transmission speed of each CPCI interface is reduced, but is kept consistent with each other. The transmission bandwidth of each CPCI interface is half of the transmission bandwidth of the USB3.0 interface divided by the number of the plurality of CPCI interfaces.
There are also two cases for the third USB HUB chip 30, the first case is that the third USB HUB chip 30 is also used to expand the data at the input to one output, and half of the transmission bandwidth of the USB3.0 interface is allocated to the expanded output. In the second case, the third USB HUB chip 30 is further configured to, when expanding the data at the input to the plurality of outputs, evenly allocate half of the transmission bandwidth of the USB3.0 interface to the expanded plurality of outputs. That is, when one USB3.0 interface is switched to a plurality of CPCI interfaces connected to the third USB HUB chip 30, the data transmission speed of each CPCI interface is reduced, but is kept consistent with each other. The transmission bandwidth of each CPCI interface is half of the transmission bandwidth of the USB3.0 interface divided by the number of the plurality of CPCI interfaces.
As shown in fig. 2 to 4, it can be seen from comparison of the three figures that, when the pair of multi-conversion devices according to the embodiment of the present invention converts the USB3.0 interface to one CPCI interface, the difference between the data transmission rate of the pair of multi-conversion devices according to the embodiment of the present invention and the data transmission rate of the pair of multi-conversion devices according to the prior art, which converts the USB3.0 interface to the CPCI interface, is very small, and the difference between the data transmission rate of the pair of multi-conversion devices according to the prior art and the data transmission rate of the USB3.0 USB disk according to the prior art is also very small.
Through the manner, the one-to-many conversion device for the USB3.0 interface to the CPCI interface of the embodiment of the invention can realize the conversion from one USB3.0 interface to at most 8 CPCI interfaces by cascading two stages of USB HUB chips, wherein the USB HUB chip of the first stage is connected with the USB3.0 interface, the two USB HUB chips of the second stage are connected with 8 CPCI interfaces, and the two stages of USB HUB chips are connected with each other, so that the data transmission speed can reach the standard of the USB3.0 even on the CPCI interface.
The above description is only an embodiment of the present invention, and not intended to limit the scope of the present invention, and all modifications of equivalent structures and equivalent processes performed by the present specification and drawings, or directly or indirectly applied to other related technical fields, are included in the scope of the present invention.
It is noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
Claims (9)
1. A USB3.0 interface to CPCI interface one-to-many conversion device, comprising a first USB HUB chip, a second USB HUB chip and a third USB HUB chip, wherein the first USB HUB chip comprises an input terminal and two output terminals, the second USB HUB chip and the third USB HUB chip comprise an input terminal and four output terminals, the input terminal of the first USB HUB chip is used for connecting the USB3.0 interface, the two output terminals are respectively connected with the input terminals of the second USB HUB chip and the third USB HUB chip, the four output terminals of the second USB HUB chip and the third USB HUB chip are respectively used for connecting the CPCI interface, the first USB HUB chip is used for expanding the data of the input terminal to one or two output terminals, the second USB HUB chip and the third USB HUB chip are used for expanding the data of the input terminal to one or more output terminals, wherein each of the CPCI interfaces has a unique address.
2. The one-to-many conversion device for USB3.0 interface to CPCI interface of claim 1, wherein the first USB HUB chip is further configured to allocate the transmission bandwidth of USB3.0 interface to an extended output when the data at the input is extended to the output.
3. A USB3.0 interface to CPCI interface one-to-many conversion apparatus as claimed in claim 2, wherein when the extended output is connected to the second USB HUB chip or the third USB HUB chip, the second USB HUB chip or the third USB HUB chip is further configured to allocate the transmission bandwidth of USB3.0 interface to the extended output when the data at the input is extended to an output.
4. The one-to-many conversion device for USB3.0 interface to CPCI interface of claim 3, wherein the second USB HUB chip or the third USB HUB chip is further configured to distribute the transmission bandwidth of the USB3.0 interface to the plurality of extended outputs when the data at the input end is extended to the plurality of outputs.
5. The one-to-many conversion device for USB3.0 interface to CPCI interface of claim 1, wherein the first USB HUB chip is further configured to distribute the transmission bandwidth of USB3.0 interface to two outputs equally when the data at the input is spread to two outputs.
6. The one-to-many conversion device for USB3.0 interface to CPCI interface of claim 5, wherein said second USB HUB chip is further configured to allocate half of the transmission bandwidth of USB3.0 interface to an extended output when the data at the input is extended to the output.
7. The one-to-many conversion device for USB3.0 interface to CPCI interface of claim 6, wherein said second USB HUB chip is further configured to distribute half of the transmission bandwidth of USB3.0 interface to the plurality of extended outputs when the data at the input is extended to the plurality of outputs.
8. The one-to-many conversion device for USB3.0 interface to CPCI interface of claim 5, wherein said third USB HUB chip is further configured to allocate half of the transmission bandwidth of USB3.0 interface to an extended output when the data at the input is extended to the output.
9. The one-to-many conversion device for USB3.0 interface to CPCI interface of claim 8, wherein the third USB HUB chip is further configured to distribute half of the transmission bandwidth of USB3.0 interface to the plurality of extended outputs when the data at the input is extended to the plurality of outputs.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110159208.8A CN112799984A (en) | 2021-02-05 | 2021-02-05 | One-to-many conversion device from USB3.0 interface to CPCI interface |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110159208.8A CN112799984A (en) | 2021-02-05 | 2021-02-05 | One-to-many conversion device from USB3.0 interface to CPCI interface |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN112799984A true CN112799984A (en) | 2021-05-14 |
Family
ID=75814360
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202110159208.8A Pending CN112799984A (en) | 2021-02-05 | 2021-02-05 | One-to-many conversion device from USB3.0 interface to CPCI interface |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN112799984A (en) |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102681481A (en) * | 2012-05-24 | 2012-09-19 | 山西联华伟业科技有限公司 | Programmable logic controller (PLC) communication method based on universal serial bus (USB) |
| CN203133754U (en) * | 2013-03-26 | 2013-08-14 | 浪潮电子信息产业股份有限公司 | KVM board card based on server provided with CPCI framework |
| CN209132692U (en) * | 2018-12-28 | 2019-07-19 | 无锡市同芯恒通科技有限公司 | Safe master control borad based on 421 processor of Shen prestige and Shen Wei ICH nest plate |
| CN111404589A (en) * | 2020-03-17 | 2020-07-10 | 成都科鸿凌泰自动识别技术有限公司 | Multi-operator 4G switching board based on CPCI structure |
| CN211180814U (en) * | 2020-03-17 | 2020-08-04 | 成都科鸿凌泰自动识别技术有限公司 | WIFI/GPS picture peg based on CPCI structure |
| CN112130061A (en) * | 2020-11-26 | 2020-12-25 | 北京智芯微电子科技有限公司 | Chip synchronous testing device and chip synchronous testing method |
-
2021
- 2021-02-05 CN CN202110159208.8A patent/CN112799984A/en active Pending
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102681481A (en) * | 2012-05-24 | 2012-09-19 | 山西联华伟业科技有限公司 | Programmable logic controller (PLC) communication method based on universal serial bus (USB) |
| CN203133754U (en) * | 2013-03-26 | 2013-08-14 | 浪潮电子信息产业股份有限公司 | KVM board card based on server provided with CPCI framework |
| CN209132692U (en) * | 2018-12-28 | 2019-07-19 | 无锡市同芯恒通科技有限公司 | Safe master control borad based on 421 processor of Shen prestige and Shen Wei ICH nest plate |
| CN111404589A (en) * | 2020-03-17 | 2020-07-10 | 成都科鸿凌泰自动识别技术有限公司 | Multi-operator 4G switching board based on CPCI structure |
| CN211180814U (en) * | 2020-03-17 | 2020-08-04 | 成都科鸿凌泰自动识别技术有限公司 | WIFI/GPS picture peg based on CPCI structure |
| CN112130061A (en) * | 2020-11-26 | 2020-12-25 | 北京智芯微电子科技有限公司 | Chip synchronous testing device and chip synchronous testing method |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| WO2018213232A1 (en) | Reconfigurable server and server rack with same | |
| KR101850175B1 (en) | Expansion Module for Programmable Logic Controller using USB Communication | |
| CN105138485A (en) | Serial bus address management device | |
| CN112799984A (en) | One-to-many conversion device from USB3.0 interface to CPCI interface | |
| CN209248436U (en) | A kind of expansion board clamping and server | |
| CN112131163A (en) | PCIE resource automatic splitting circuit and method | |
| CN204360266U (en) | Adapter | |
| CN102968280A (en) | Storage system, storage appliance and control appliance | |
| CN113688091B (en) | Method and system for realizing RapidIO dynamic enumeration process based on Tsi721 | |
| CN104934823A (en) | USB concentrator | |
| EP2060979A1 (en) | Parallel computer system, method for parallel processing of data | |
| CN104021108A (en) | Communication equipment based on PROFIBUS-DP protocol | |
| US20220365898A1 (en) | Multi-chip interconnection system based on pcie buses | |
| CN114218138A (en) | USB equipment simulation device and test system | |
| CN105552670B (en) | USB socket conversion method, USB socket and USB data line | |
| CN215987299U (en) | Network security device | |
| CN202533935U (en) | Peripheral component interface express (PCIe) multifunctional device and hardware acceleration algorithm integrated device | |
| CN206378879U (en) | A kind of card reading system | |
| CN104809091A (en) | Adapter device | |
| CN211653589U (en) | Embedded data processing device integrating multiple CPU core board sockets | |
| CN107315542B (en) | JBOD cascade system | |
| EP3433753B1 (en) | Concurrent communications via a connector | |
| CN217957183U (en) | Audio and video signal conversion distribution circuit and system | |
| CN221039950U (en) | Server expansion card system | |
| CN211349038U (en) | Functional development board based on 5G module |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20210514 |
|
| RJ01 | Rejection of invention patent application after publication |