CN112799020A - Multi-voltage power supply modulation chip - Google Patents
Multi-voltage power supply modulation chip Download PDFInfo
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- CN112799020A CN112799020A CN202011488129.3A CN202011488129A CN112799020A CN 112799020 A CN112799020 A CN 112799020A CN 202011488129 A CN202011488129 A CN 202011488129A CN 112799020 A CN112799020 A CN 112799020A
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- 229910002601 GaN Inorganic materials 0.000 claims abstract description 28
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 claims abstract description 22
- 229910001218 Gallium arsenide Inorganic materials 0.000 claims abstract description 22
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 claims abstract description 20
- 238000012544 monitoring process Methods 0.000 claims description 5
- 238000001514 detection method Methods 0.000 claims description 4
- 230000007613 environmental effect Effects 0.000 abstract description 3
- 230000010354 integration Effects 0.000 abstract description 3
- 230000009977 dual effect Effects 0.000 description 4
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
- G01S7/00—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00
- G01S7/02—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00 of systems according to group G01S13/00
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Computer Networks & Wireless Communication (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Radar, Positioning & Navigation (AREA)
- Remote Sensing (AREA)
- Amplifiers (AREA)
Abstract
The embodiment of the invention discloses a multi-voltage power supply modulation chip, which comprises: the first TTL signal is connected with the input end of the high-voltage module and the input end of the 5V voltage power supply module; the second TTL signal is connected with the input end of the 5V voltage module; the first grid voltage bias signal is connected with the input end of the negative pressure module; the second grid voltage bias signal is connected with the other input end of the negative pressure module; and inputting the first grid voltage bias signal and the second grid voltage bias signal into the negative voltage module through digital programming, and outputting the driving voltage of the gallium arsenide amplifier or the gallium nitride amplifier. All nodes outside the analog output port of the invention are arranged in the chip, thereby not only increasing the integration level, but also reducing the interference of environmental signals. In addition, the invention adopts a mode of controlling the grid voltage bias port by using digital programming, so that the port can output a gallium arsenide bias signal and also can output a gallium nitride bias signal.
Description
Technical Field
The invention relates to the field of power supply modulation of a radar T/R component. And more particularly, to a multi-voltage power supply modulation chip.
Background
The current TR module power control chip usually outputs a gate voltage bias signal by on-chip analog output and then by an operational amplifier. This approach typically only selectively drives the gaas or gan amplifiers and presents a risk of self-excitation due to off-chip pin introduction.
Disclosure of Invention
In view of the above, an embodiment of the present invention provides a multi-voltage power modulation chip, including:
the first TTL signal is connected with the input end of the high-voltage module and the input end of the 5V voltage power supply module;
the TTL signal is a digital signal of 0 to 5V;
the input of the high-voltage module is TTL (transistor-transistor logic) signals, and the output of the high-voltage module is 18-28V high-voltage signals;
the input of the voltage power supply module is TTL signals, and the output is 0-5V power supply signals;
the second TTL signal is connected with the input end of the 5V voltage module;
the input of the voltage power supply module is TTL signals, and the output is 0-5V power supply signals;
the first grid voltage bias signal is connected with the input end of the negative pressure module;
the second grid voltage bias signal is connected with the other input end of the negative pressure module;
and inputting the first grid voltage bias signal and the second grid voltage bias signal into the negative voltage module through digital programming, and outputting the driving voltage of the gallium arsenide amplifier or the gallium nitride amplifier.
In one particular embodiment, the high voltage module comprises: the high-voltage VDMOS control circuit comprises a high-voltage VDMOS grid power supply modulation module, a high-voltage modulation and PD end delay control module and a high-voltage VDMOS drain voltage relief module; the second TTL signal is input into the high-voltage modulation and PD end delay control module, and the output end of the second TTL signal is connected with the high-voltage VDMOS grid power supply modulation module and the high-voltage VDMOS drain voltage release module;
the output end PD end of the high-voltage VDMOS drain voltage bleeder module is used for being connected with the VDMOS drain, and when the VDMOS is turned off through high-voltage modulation, the port provides a bleeder channel from the VDMOS drain to the ground, so that charges accumulated in the GaN power amplifier are quickly discharged.
In a specific embodiment, the negative pressure module comprises:
the device comprises a first grid voltage control module, a second grid voltage control module, an in-chip negative pressure reference power supply, a first AB type rail-to-rail operational amplifier and a second AB type rail-to-rail operational amplifier; wherein,
the first gate voltage bias signal is input into the first gate voltage control module, and the first gate voltage control module controls the first AB rail-to-rail operational amplifier to output the driving voltage of a gallium arsenide amplifier or a gallium nitride amplifier;
the second gate voltage bias signal is input into the second gate voltage control module, and the second gate voltage control module controls the second AB rail-to-rail operational amplifier to output the drive voltage of a gallium arsenide amplifier or a gallium nitride amplifier;
one output end of the on-chip negative pressure reference power supply module is connected with the first grid voltage control module, and the other output end of the on-chip negative pressure reference power supply module is connected with the second grid voltage control module.
In one embodiment, the 5V voltage module includes: 5V driving and amplifying modulation and low-noise amplifying modulation; wherein,
the 5V drive-amplifier modulation input end is connected with the second TTL signal;
and the low-noise amplifier modulation input end is connected with the first TTL signal.
In a specific embodiment, the chip further comprises a negative pressure monitoring control module, which is connected with the high-voltage VDMOS grid power supply in a modulation mode, when a power failure occurs, the high-voltage modulation output is constant high, the rear-stage VDMOS is in an off state, and the power amplifier is not turned on.
In a specific embodiment, the first TTL signal is a reception timing signal of the T/R component, and when the first TTL signal is low level, the low noise amplifier normally operates, and the T/R component is in a reception state; and the second TTL signal is a transmitting time sequence signal of the T/R assembly, when the second TTL signal is at a high level, the drive amplifier and the GaN power amplifier work normally, and the T/R assembly is in a transmitting state.
In a specific embodiment, the chip further comprises an over-temperature detection module, and the chip outputs a corresponding control signal when the temperature of the chip is too high.
The invention has the following beneficial effects:
all nodes outside the analog output port of the invention are arranged in the chip, thereby not only increasing the integration level, but also reducing the interference of environmental signals. In addition, the invention adopts a mode of controlling the grid voltage bias port by using digital programming, so that the port can output a gallium arsenide bias signal and also can output a gallium nitride bias signal. May be used in a dual gallium arsenide amplifier system, a dual gallium nitride amplifier system, or a mixed gallium arsenide and gallium nitride amplifier system. The universality of the chip is increased.
Drawings
The following describes embodiments of the present invention in further detail with reference to the accompanying drawings.
Fig. 1 illustrates a multi-voltage power supply modulation chip according to an embodiment of the present invention.
Detailed Description
In order to more clearly illustrate the invention, the invention is further described below with reference to preferred embodiments and the accompanying drawings. Similar parts in the figures are denoted by the same reference numerals. It is to be understood by persons skilled in the art that the following detailed description is illustrative and not restrictive, and is not to be taken as limiting the scope of the invention.
The invention aims to place analog output on chip, and drive the bias voltage of a gallium nitride power amplifier or a gallium arsenide power amplifier by programming through multi-bit digital control outside the chip. The power supply modulation chip integrates functions of a high-voltage VDMOS driver, GaN power amplifier grid voltage modulation, GaAs driving discharge grid voltage and power supply modulation, low-noise discharge source modulation, a drain electrode bleeder circuit, over-temperature monitoring and the like, is mainly used for a power supply modulation part in a radar T/R assembly, and is a special power supply modulation circuit for the T/R assembly.
As shown in fig. 1, a multi-voltage power modulating chip includes:
the first TTL signal is connected with the input end of the high-voltage module and the input end of the 5V voltage power supply module;
the second TTL signal is connected with the input end of the 5V voltage module;
the first grid voltage bias signal is connected with the input end of the negative pressure module;
the second grid voltage bias signal is connected with the other input end of the negative pressure module;
and inputting the first grid voltage bias signal and the second grid voltage bias signal into the negative voltage module through digital programming, and outputting the driving voltage of the gallium arsenide amplifier or the gallium nitride amplifier.
The high voltage module includes: the high-voltage VDMOS control circuit comprises a high-voltage VDMOS grid power supply modulation module, a high-voltage modulation and PD end delay control module and a high-voltage VDMOS drain voltage relief module; the second TTL signal is input into the high-voltage modulation and PD end delay control module, and the output end of the second TTL signal is connected with the high-voltage VDMOS grid power supply modulation module and the high-voltage VDMOS drain voltage release module;
the output end PD end of the high-voltage VDMOS drain voltage bleeder module is used for being connected with the VDMOS drain, and when the VDMOS is turned off through high-voltage modulation, the port provides a bleeder channel from the VDMOS drain to the ground, so that charges accumulated in the GaN power amplifier are quickly discharged.
The negative pressure module includes:
the device comprises a first grid voltage control module, a second grid voltage control module, an in-chip negative pressure reference power supply, a first AB type rail-to-rail operational amplifier and a second AB type rail-to-rail operational amplifier; wherein,
the first gate voltage bias signal is input into the first gate voltage control module, and the first gate voltage control module controls the first AB rail-to-rail operational amplifier to output the driving voltage of a gallium arsenide amplifier or a gallium nitride amplifier;
the second gate voltage bias signal is input into the second gate voltage control module, and the second gate voltage control module controls the second AB rail-to-rail operational amplifier to output the drive voltage of a gallium arsenide amplifier or a gallium nitride amplifier;
one output end of the on-chip negative pressure reference power supply module is connected with the first grid voltage control module, and the other output end of the on-chip negative pressure reference power supply module is connected with the second grid voltage control module.
Two paths of grid voltage bias signals can provide grid voltage for driving gallium arsenide or gallium nitride on each path, and each path is controlled by a 1-bit ENN signal, a 1-bit NSEL grid voltage selection signal and a 4-bit B (0:3) grid voltage control signal, wherein 1 is connected with 0V, and 0 is connected with-5V. When ENN is 1, the corresponding VB port has a driving function. When NSEL is 1, GaN driving mode is selected, and the VB terminal outputs a uniform gate voltage modulation signal between-1.6 to-2.6V. When NSEL is 0, GaAs drive mode is selected, and the VB terminal outputs a uniform grid voltage modulation signal between-0.5 and-1V. Table 1 shows the correspondence between NSEL and B (0:3) and the gate voltage output at the VB terminal when ENN is 1.
TABLE 1 grid voltage control signal truth table
The 5V voltage module includes: 5V driving and amplifying modulation and low-noise amplifying modulation; wherein,
the 5V drive-amplifier modulation input end is connected with the second TTL signal;
and the low-noise amplifier modulation input end is connected with the first TTL signal.
The chip also comprises a negative pressure monitoring control module which is connected with the high-voltage VDMOS grid power supply in a modulation way, the negative pressure monitoring control module has a power failure protection function of a-5V power supply, when-5V is not completely established (the range is 0-3.5V) or power failure occurs, the output of the high-voltage modulation is constant high, the rear-stage VDMOS is in a turn-off state, and the power amplifier is not conducted.
The first TTL signal is a receiving time sequence signal of the T/R assembly, when the first TTL signal is at a low level, the low-noise amplifier normally works, and the T/R assembly is in a receiving state; and the second TTL signal is a transmitting time sequence signal of the T/R assembly, when the second TTL signal is at a high level, the drive amplifier and the GaN power amplifier work normally, and the T/R assembly is in a transmitting state. The driving amplifier and the power amplifier can be a gallium arsenide amplifier or a gallium nitride amplifier.
The chip also comprises an over-temperature detection module, and the chip outputs a corresponding control signal when the temperature is too high.
The high-voltage VDMOS drain voltage bleeder module bleeds the voltage to the ground when the power amplifier is not conducted.
The chip has 3 power supplies of +28V, +5V and-5V. wherein-5V can be disconnected if the corresponding function is not needed.
All nodes outside the analog output port of the invention are arranged in the chip, thereby not only increasing the integration level, but also reducing the interference of environmental signals. In addition, the invention adopts a mode of controlling the grid voltage bias port by using digital programming, so that the port can output a gallium arsenide bias signal and also can output a gallium nitride bias signal. May be used in a dual gallium arsenide amplifier system, a dual gallium nitride amplifier system, or a mixed gallium arsenide and gallium nitride amplifier system. The universality of the chip is increased.
It should be understood that the above-mentioned embodiments of the present invention are only examples for clearly illustrating the present invention, and are not intended to limit the embodiments of the present invention, and it will be obvious to those skilled in the art that other variations or modifications may be made on the basis of the above description, and all embodiments may not be exhaustive, and all obvious variations or modifications may be included within the scope of the present invention.
Claims (7)
1. A multi-voltage power supply modulation chip, comprising:
the first TTL signal is connected with the input end of the high-voltage module and the input end of the 5V voltage power supply module;
the second TTL signal is connected with the input end of the 5V voltage module;
the first grid voltage bias signal is connected with the input end of the negative pressure module;
the second grid voltage bias signal is connected with the other input end of the negative pressure module;
and inputting the first grid voltage bias signal and the second grid voltage bias signal into the negative voltage module through digital programming, and outputting the driving voltage of the gallium arsenide amplifier or the gallium nitride amplifier.
2. The chip of claim 1, wherein the high voltage module comprises: the high-voltage VDMOS control circuit comprises a high-voltage VDMOS grid power supply modulation module, a high-voltage modulation and PD end delay control module and a high-voltage VDMOS drain voltage relief module; the second TTL signal is input into the high-voltage modulation and PD end delay control module, and the output end of the second TTL signal is connected with the high-voltage VDMOS grid power supply modulation module and the high-voltage VDMOS drain voltage release module;
the output end PD end of the high-voltage VDMOS drain voltage bleeder module is used for being connected with the VDMOS drain, and when the VDMOS is turned off through high-voltage modulation, the port provides a bleeder channel from the VDMOS drain to the ground, so that charges accumulated in the GaN power amplifier are quickly discharged.
3. The chip of claim 1, wherein the negative pressure module comprises:
the device comprises a first grid voltage control module, a second grid voltage control module, an in-chip negative pressure reference power supply, a first AB type rail-to-rail operational amplifier and a second AB type rail-to-rail operational amplifier; wherein,
the first gate voltage bias signal is input into the first gate voltage control module, and the first gate voltage control module controls the first AB rail-to-rail operational amplifier to output the driving voltage of a gallium arsenide amplifier or a gallium nitride amplifier;
the second gate voltage bias signal is input into the second gate voltage control module, and the second gate voltage control module controls the second AB rail-to-rail operational amplifier to output the drive voltage of a gallium arsenide amplifier or a gallium nitride amplifier;
one output end of the on-chip negative pressure reference power supply module is connected with the first grid voltage control module, and the other output end of the on-chip negative pressure reference power supply module is connected with the second grid voltage control module.
4. The chip of claim 1, wherein the 5V voltage module comprises: 5V driving and amplifying modulation and low-noise amplifying modulation; wherein,
the 5V drive-amplifier modulation input end is connected with the second TTL signal;
and the low-noise amplifier modulation input end is connected with the first TTL signal.
5. The chip of claim 1, further comprising a negative voltage monitoring control module, connected to the high voltage VDMOS gate power supply, wherein when a power failure occurs, the high voltage modulation output is constantly high, the subsequent VDMOS is in an off state, and the power amplifier is not turned on.
6. The chip of claim 4, wherein the first TTL signal is a reception timing signal of a T/R component, and when the first TTL signal is at a low level, the low noise amplifier operates normally and the T/R component is in a reception state; and the second TTL signal is a transmitting time sequence signal of the T/R assembly, when the second TTL signal is at a high level, the drive amplifier and the GaN power amplifier work normally, and the T/R assembly is in a transmitting state.
7. The chip of claim 1, further comprising an over-temperature detection module, wherein the over-temperature detection module outputs a corresponding control signal when the temperature of the chip is too high.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113794452A (en) * | 2021-11-15 | 2021-12-14 | 成都瑞迪威科技有限公司 | Negative voltage protection circuit of phased array radar antenna |
| CN116449306A (en) * | 2023-06-12 | 2023-07-18 | 中科海高(成都)电子技术有限公司 | Transmit-receive circuit for realizing high-speed switching |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN113794452A (en) * | 2021-11-15 | 2021-12-14 | 成都瑞迪威科技有限公司 | Negative voltage protection circuit of phased array radar antenna |
| CN113794452B (en) * | 2021-11-15 | 2022-02-08 | 成都瑞迪威科技有限公司 | Negative voltage protection circuit of phased array radar antenna |
| CN116449306A (en) * | 2023-06-12 | 2023-07-18 | 中科海高(成都)电子技术有限公司 | Transmit-receive circuit for realizing high-speed switching |
| CN116449306B (en) * | 2023-06-12 | 2023-09-19 | 中科海高(成都)电子技术有限公司 | Transmit-receive circuit for realizing high-speed switching |
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