CN112782886A - Array substrate and touch display panel - Google Patents

Array substrate and touch display panel Download PDF

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Publication number
CN112782886A
CN112782886A CN202110061268.6A CN202110061268A CN112782886A CN 112782886 A CN112782886 A CN 112782886A CN 202110061268 A CN202110061268 A CN 202110061268A CN 112782886 A CN112782886 A CN 112782886A
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China
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column
sub
row
line
substrate
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CN202110061268.6A
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Chinese (zh)
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CN112782886B (en
Inventor
吕京
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Wuhan China Star Optoelectronics Technology Co Ltd
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Wuhan China Star Optoelectronics Technology Co Ltd
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    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/13338Input devices, e.g. touch panels
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1343Electrodes
    • G02F1/134309Electrodes characterised by their geometrical arrangement
    • G02F1/134363Electrodes characterised by their geometrical arrangement for applying an electric field parallel to the substrate, i.e. in-plane switching [IPS]
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136209Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136286Wiring, e.g. gate line, drain line

Abstract

The application provides an array substrate and a display device. The array substrate comprises a substrate, and a data line, a touch signal line and a conversion line which are arranged on the substrate. The data line includes a first data line. The touch signal line and the first data line are arranged on the same layer. The touch signal lines and the first data lines are alternately arranged along a first row and are alternately arranged along a second row which is parallel to and opposite to the first row. The first data line on the first row is opposite to the touch signal line on the second row. The touch signal line on the first row is opposite to the first data line on the second row. The switching line is located at a different layer from the first data line. The conversion line connects the touch signal line on the first column with the touch signal line on the adjacent second column through the via hole, or connects the first data line on the first column with the first data line on the adjacent second column through the via hole.

Description

Array substrate and touch display panel
Technical Field
The application relates to the technical field of touch display, in particular to an array substrate and a touch display panel.
Background
In order to avoid polarization of liquid crystal in the liquid crystal display panel, the voltage applied to the pixel electrode needs to be alternately inverted with respect to the common electrode, that is, the voltage of the pixel electrode needs to be changed back and forth between positive and negative polarities. This technique is called an inversion driving technique. When the voltage of the pixel electrode is higher than that of the common electrode, it is called positive polarity (+), and when the voltage of the pixel electrode is lower than that of the common electrode, it is called negative polarity (-). The inversion driving includes frame inversion driving (frame inversion), row inversion driving (row inversion), column inversion driving (column inversion), and dot inversion driving (dot inversion).
Currently, dot inversion driving is the best driving method for display effect. However, in the display of each frame (frame) screen, the dot inversion driving requires the voltage polarity on the data line to frequently vary between the positive (+) and negative (-) polarities, and therefore, the power consumption of the dot inversion driving is maximized. Referring to fig. 1, a conventional lcd panel with zigzag structure can achieve dot inversion by column inversion driving. In the liquid crystal display panel with the zigzag structure, a part of pixels in a pixel column between two adjacent data lines is electrically coupled to one of the two adjacent data lines, and another part of pixels adjacent to the part of pixels is electrically coupled to the other of the two adjacent data lines. Therefore, the visual effect of the same-point inversion can be obtained by adopting a power-saving column inversion mode. However, when a Fullin Cell (FIC) type touch module is integrated in a liquid crystal display panel having a zigzag structure, the touch signal lines are generally disposed in parallel with the data lines. If the touch signal lines and the data lines are made of the same metal layer, the pixels 201, 202, 203, and 204 in fig. 1 need to be electrically connected to the data lines across the touch signal lines, so that structural differences exist between the pixels 201, 202, 203, and 204 and other pixels, which results in uneven display. If the touch signal line and the data line are arranged on different layers, two light covers for manufacturing a touch signal line layer, a touch signal line and a common electrode connecting via hole layer need to be added, so that the manufacturing cost is increased, and the manufacturing procedures are increased.
Disclosure of Invention
In view of the above, the present disclosure provides an array substrate and a touch display panel capable of saving a mask and avoiding display non-uniformity.
The application provides an array substrate, it includes:
a substrate;
a data line disposed on the substrate, the data line including a first data line;
touch signal lines arranged on the same layer as the first data lines, the touch signal lines and the first data lines being alternately arranged along a first row, the touch signal lines and the first data lines being alternately arranged along a second row, the second row being parallel to and opposed to the first row, the first data lines on the first row being arranged opposite to the touch signal lines on the second row, the touch signal lines on the first row being arranged opposite to the first data lines on the second row; and
the conversion lines are arranged on the substrate and are positioned on one side of the first data lines, which is far away from the substrate or close to the substrate, the touch signal lines on the first row are connected with the touch signal lines on the adjacent second row through the through holes, or the first data lines on the first row are connected with the first data lines on the adjacent second row through the through holes.
In one embodiment, the array substrate further includes a scan line disposed on a surface of the first data line adjacent to the substrate.
In one embodiment, the switching lines are disposed in the same layer as the scan lines.
In an embodiment, the array substrate further includes a light shielding layer, the light shielding layer is located on a surface of the scan line close to the substrate, and the conversion line and the light shielding layer are disposed on the same layer.
In one embodiment, an orthographic projection of the conversion line on the plane of the substrate partially overlaps an orthographic projection of the scan line on the plane of the substrate.
In an embodiment, the array substrate further includes a common electrode, the common electrode is disposed on a surface of the first data line away from the substrate, and the conversion line and the common electrode are disposed on the same layer.
In one embodiment, the common electrode includes a plurality of unit electrodes, each of the touch signal lines is electrically connected to one of the unit electrodes, and the unit electrodes are multiplexed as touch electrodes.
In one embodiment, the array substrate further includes a plurality of sub-pixel rows and a plurality of sub-pixel columns disposed on the substrate, the plurality of sub-pixel rows extending along a first direction, the plurality of sub-pixel rows including a first sub-pixel row and a second sub-pixel row, the first sub-pixel row and the second sub-pixel row being disposed adjacent to each other, the plurality of sub-pixel columns extending along a second direction, the second direction intersecting the first direction, the plurality of sub-pixel columns including a first sub-pixel column and a second sub-pixel column, the first sub-pixel column and the second sub-pixel column being disposed adjacent to each other;
the first column, the second column, the first sub-pixel column and the second sub-pixel column are parallel to each other, the first column and the second column are located between the first sub-pixel column and the second sub-pixel column, the first column is located on one side of the second column close to the first sub-pixel column, the first data line on the first column is electrically connected with the sub-pixels of the first sub-pixel column, and the first data line on the second column is electrically connected with the sub-pixels of the second sub-pixel column.
In one embodiment, the data line further includes a second data line, the second data line is parallel to the first data line and disposed at two opposite sides of the first data line, the second data line is electrically connected to the sub-pixels, the sub-pixels in the same sub-pixel row are connected to the same side of the data line, and the sub-pixels in adjacent sub-pixel rows are connected to two opposite sides of the data line.
In one embodiment, one of the first columns and one of the second columns are disposed in every three or four adjacent sub-pixel columns.
The present application further provides a touch display panel including the array substrate as set forth in any one of the above.
The application provides a display panel and an array substrate. The array substrate comprises a substrate, and a data line, a touch signal line and a conversion line which are arranged on the substrate. The data line includes a first data line. The touch signal line and the first data line are arranged on the same layer. The touch signal lines and the first data lines are alternately arranged along a first row and are alternately arranged along a second row which is parallel to and opposite to the first row. The first data line on the first row is opposite to the touch signal line on the second row. The touch signal line on the first row is opposite to the first data line on the second row. The switching line is located at a different layer from the first data line. The conversion line connects the touch signal line on the first column with the touch signal line on the adjacent second column through the via hole, or connects the first data line on the first column with the first data line on the adjacent second column through the via hole.
Through the arrangement of the first data line and the touch signal line on the same layer, the zigzag inversion driving structure integrated with the FIC touch module can be realized, and a light shield is saved. Moreover, the touch signal line and the first data line are subjected to position interchange between the first row and the second row through the conversion line and the via hole, so that the difference between pixel structures is eliminated, and uneven display is avoided. In addition, the wiring space can be saved, and the aperture ratio can be increased.
Drawings
In order to more clearly illustrate the technical solutions in the present application, the drawings needed to be used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is an equivalent circuit diagram of a FIC touch display panel with a zigzag structure in the prior art.
Fig. 2 is a schematic structural diagram of a touch display panel according to an embodiment of the present disclosure.
Fig. 3 is a schematic top view of the array substrate of the touch display panel of fig. 2.
Fig. 4 is a partial cross-sectional view of the array substrate of fig. 3 along the line a-a.
Fig. 5 is a partially enlarged schematic view of fig. 3.
Fig. 6 is a schematic top view of a touch layer of the touch display panel of fig. 2.
Fig. 7 is a schematic view of a driving manner of the array substrate of fig. 3.
Fig. 8 is a schematic structural diagram of an array substrate according to another embodiment of the present disclosure.
Fig. 9 is a partial cross-sectional view of the array substrate of fig. 8 taken along line B-B.
Fig. 10 is a schematic structural diagram of an array substrate according to another embodiment of the present disclosure.
Fig. 11 is a partial cross-sectional view of the array substrate of fig. 10 taken along line C-C.
Fig. 12 is a schematic structural diagram of an array substrate according to another embodiment of the present disclosure.
Fig. 13 is a partial cross-sectional view of the array substrate of fig. 12 taken along line D-D.
Detailed Description
The technical solution in the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application. It should be apparent that the described embodiments are only some embodiments of the present application, and not all embodiments. All other embodiments, which can be obtained by a person skilled in the art without making any inventive step based on the embodiments in the present application, are within the scope of protection of the present application.
In this application, unless expressly stated or limited otherwise, the first feature "on" or "under" the second feature may comprise the first and second features being directly adjacent or may comprise the first and second features being not in direct contact but in contact with each other by means of further features between them. Also, the first feature being "on," "above" and "over" the second feature includes the first feature being directly on and obliquely above the second feature, or merely indicating that the first feature is at a higher level than the second feature. A first feature being "under," "below," and "beneath" a second feature includes the first feature being directly under and obliquely below the second feature, or simply meaning that the first feature is at a lesser elevation than the second feature.
Referring to fig. 2, fig. 2 is a schematic structural diagram of a touch display panel according to an embodiment of the present disclosure. The touch display panel 100 provided by the present application may be used in electronic devices having a display function, such as a mobile phone, a tablet computer, a notebook computer, a game machine, a digital camera, a car navigator, an electronic billboard, and an automatic teller machine.
The touch display panel 100 is a liquid crystal display panel. The touch display panel 100 includes an array substrate 10, an opposite substrate 20, a liquid crystal layer 30, and a touch layer 40. The array substrate 10 and the opposite substrate 20 are disposed opposite to each other. The liquid crystal layer 30 is disposed between the array substrate 10 and the opposite substrate 20. The touch layer 40 is disposed on a surface of the array substrate 10 close to the liquid crystal layer 30.
In the present embodiment, the opposite substrate 20 is a color filter substrate. In other embodiments of the present disclosure, the array substrate 10 may be a coa (color filter on array) type array substrate. At this time, the opposite substrate 20 does not include the color film layer. It is understood that the liquid crystal display panel may further include other display components not mentioned, such as a backlight module, a frame, upper and lower polarizers, etc.
In this specification, a horizontal electric field type liquid crystal display panel is described as an example. However, the present application does not limit the type of the touch display panel 100. The display type of the touch display panel 100 provided by the present application may be a horizontal electric Field type, such as Fringe Field Switching (FFS) type or In-Plane Switching (IPS) type, or a Vertical electric Field type, such as Twisted Nematic (TN) type or Multi-domain Vertical Alignment (MVA) type.
Referring to fig. 3 and 4 together, fig. 3 is a schematic top view of the array substrate of the touch display panel of fig. 2. Fig. 4 is a partial cross-sectional view of the array substrate of fig. 3 along the line a-a. For clarity of description, only a part of the structure of the array substrate 10 is shown in the drawings, and not the entire structure of the array substrate 10.
The array substrate 10 includes a substrate 11, and a plurality of scan lines GL, a plurality of data lines DL, a plurality of touch signal lines TL, a plurality of conversion lines L, and a plurality of sub-pixels PX disposed on the substrate 11.
The substrate 11 may be a glass substrate or a plastic substrate.
The plurality of scanning lines GL are provided on one surface of the substrate 11. The plurality of scanning lines GL extend in the first direction D1. The plurality of scanning lines GL are arranged in the second direction D2. The second direction D2 intersects the first direction D1. In one embodiment, the second direction D2 may be perpendicular to the first direction D1.
The plurality of data lines DL are disposed on the substrate 11 and located on a side of the scan lines GL away from the substrate 11. The data line DL is electrically connected to the subpixel PX for supplying a signal to the subpixel PX. The plurality of data lines DL extend in the second direction D2. The plurality of data lines DL are arranged in the first direction D1. The data lines DL include a plurality of first data lines DL1 and a plurality of second data lines DL 2. The second data line DL2 is parallel to the first data line DL 1. The second data line DL2 is disposed at two opposite sides of the first data line DL 1.
The touch signal lines TL and the data lines DL are disposed in the same layer. The touch signal line TL is used to transmit a signal to the touch layer 40. The touch signal lines TL and the first data lines DL1 are alternately arranged along the first column L1. The touch signal lines TL and the first data lines DL1 are alternately arranged along the second column L2. The second column L2 is parallel to and opposite the first column L1. The first and second columns L1 and L2 each extend in the second direction D2. The first data line DL1 in the first row L1 is disposed opposite to the touch signal line TL in the second row L2, and the touch signal line TL in the first row L1 is disposed opposite to the first data line DL1 in the second row L2. That is, the positions of the touch signal line TL and the first data line DL1 are interchanged between the first column L1 and the second column L2. Although only one first column L1 and one second column L2 are shown in the drawing, it is understood that the first data lines DL1 are arranged with the touch signal lines TL on the substrate 11 to form a plurality of first columns L1 and second columns L2.
The plurality of switching lines L are disposed on the substrate 11 at a different layer from the first data line DL 1. Specifically, the plurality of switching lines L are located at a side of the first data line DL1 away from the substrate 11 or close to the substrate 11. Specifically, the plurality of switching lines L are located in a conductive layer of the first data line DL1 far from the substrate 11 or close to the substrate 11. The switching line L connects the touch signal line TL in the first column L1 with the touch signal line TL in the adjacent second column L2 through a via hole. Alternatively, the switching line L connects the first data line DL1 on the first column L1 with the first data line DL1 on the adjacent second column L2 through a via hole. Here, "adjacent" means adjacent in the second direction D2. That is, the switching line L is connected to the touch signal lines TL respectively positioned on the first and second columns L1 and L2 and positioned adjacent to each other in the second direction D2, or the first data line DL 1. Thus, the plurality of switching lines L electrically connect the first data lines DL1 or the touch signal lines TL in sequence on the first and second columns L1 and L2.
The present application does not limit the position of the switching line L. In the present embodiment, the switching line L is disposed in the same layer as the scanning line GL.
In the present embodiment, the touch signal line TL in the first column L1 and the touch signal line TL in the adjacent second column L2 are connected by the switching line L through the via hole. In other words, the switching line L electrically connects the touch signal line TL opposite to the touch signal line TL connected to the sub-pixels PX of different pixel rows R. One end of each conversion line L is connected to the touch signal line TL in the first row L1 through a first via CT1, and the other end is connected to the touch signal line TL in the second row L2 through a second via CT 2.
It can be understood that an insulating layer is disposed between the touch signal line TL and the switching line L. The first and second vias CT1 and CT2 penetrate the insulating layer. The touch signal line TL extends into the first via CT1 and the second via CT2 and is connected to two ends of the switching line L.
Specifically, the switching line L and the scanning line GL are located on one side of the substrate 11. The gate insulating layer GI covers the transition line L and the scanning line GL. An active layer (not shown) is disposed on the gate insulating layer GI. The interlayer insulating layer IL covers the active layer and the gate insulating layer GI. The first data line DL1, the touch signal line TL, and a source/drain (not shown) are located on the interlayer insulating layer IL. The first via CT1 and the second via CT2 penetrate through the interlayer insulating layer IL and the gate insulating layer GI. The touch signal line TL extends into the first via CT1 and the second via CT2 and is connected to two ends of the switching line L. It is to be understood that although the above embodiments have exemplified a top gate type thin film transistor, the present application is not limited to the type of the thin film transistor, and the thin film transistor may be a top gate type thin film transistor, a bottom gate type thin film transistor, or a dual gate type thin film transistor.
The present application does not limit the positions of the first via CT1 and the second via CT 2. The first via CT1 and the second via CT2 may be located in the same pixel row R, for example, both in the first pixel row R1 or the second pixel row R2. In other embodiments, the first via CT1 and the second via CT2 may be located in different pixel rows R, for example, the first via CT1 is located in the first pixel row R1, but the second via CT2 is located in the second pixel row R2. In addition, the first and second vias CT1 and CT2 may be located at an upper portion, a middle portion, or a lower portion of the sub-pixel PX.
As described above, the array substrate 10 further includes a plurality of sub-pixels PX disposed on the substrate 11. The plurality of sub-pixels PX form a plurality of sub-pixel rows R and a plurality of sub-pixel columns C.
The plurality of subpixel rows R extend in the first direction D1. The plurality of subpixel rows R are arranged in a second direction D2. A scanning line GL is disposed between two adjacent sub-pixel rows R.
In one embodiment, each of the sub-pixel rows R includes a plurality of sub-pixel groups PG arranged along the first direction D1. Each subpixel group PG includes three subpixels PX of red, green, and blue. In other embodiments of the present application, each sub-pixel group PG may also include four sub-pixels PX, such as red, green, blue and yellow sub-pixels or red, green, blue and white sub-pixels. In one embodiment, one touch signal line TL and one first data line DL1 are disposed in each sub-pixel group PG. Specifically, in the present embodiment, the touch signal line TL and the first data line DL1 are located between the red sub-pixel and the green sub-pixel in the sub-pixel group PG. In other embodiments of the present disclosure, the touch signal line TL may also be located between the green sub-pixel and the blue sub-pixel. This is not to be taken as an example. Of course, the touch signal line TL and the first data line DL1 may also be located between the two sub-pixel groups PG. It is to be understood that the present application does not limit the positions and the numbers of the touch signal lines TL and the first data lines DL 1. It can also be said that one first column L1 and one second column L2 are provided in every three or four adjacent sub-pixel columns C.
The plurality of subpixel rows R includes a first subpixel row R1 and a second subpixel row R2. The first subpixel row R1 and the second subpixel row R2 are adjacently disposed.
The plurality of sub-pixel columns C extend in the second direction D2. The plurality of sub-pixel columns C are arranged in a first direction D1. The plurality of sub-pixel columns C and the plurality of sub-pixel rows R intersect with each other. A data line DL is disposed between two adjacent sub-pixel columns C. A first data line DL1 is disposed between some adjacent two sub-pixel columns C. A second data line DL2 is disposed between the other two adjacent sub-pixel columns C.
The plurality of sub-pixel columns C includes a first sub-pixel column C1 and a second sub-pixel column C2. The first sub-pixel column C1 and the second sub-pixel column C2 are adjacently disposed. It is understood that the color of the sub-pixels PX in each sub-pixel column C is the same. In this embodiment, the first sub-pixel column C1 may be a red sub-pixel, and the second sub-pixel column C2 may be a green sub-pixel.
The first column L1, the second column L2, the first sub-pixel column C1, and the second sub-pixel column C2 are parallel to each other. The first and second columns L1 and L2 are located between the first and second sub-pixel columns C1 and C2. The first column L1 is located on the side of the second column L2 near the first sub-pixel column C1. The first data line DL1 in the first column L1 is electrically connected to the sub-pixels PX in the first sub-pixel column C1. The first data line DL1 in the second column L2 is electrically connected to the sub-pixels PX in the second sub-pixel column C2.
In addition, the sub-pixels PX in the same sub-pixel row R are connected to the same side of the data line DL (including the first data line DL1 and the second data line DL 2). The sub-pixels PX in the adjacent sub-pixel row R are connected to different sides of the data line DL (including the first data line DL1 and the second data line DL 2). For example, the sub-pixels PX in the first sub-pixel row R1 are connected to the left side of the data line DL. The sub-pixels PX in the second sub-pixel row R2 are connected to the right side of the data line DL, and so on. In other words, a part of the sub-pixels PX in the sub-pixel column C between two adjacent data lines DL is electrically coupled to one of the two adjacent data lines DL, and another part of the sub-pixels PX in the sub-pixel column C adjacent to the part of the sub-pixels PX is electrically coupled to the other of the two adjacent data lines DL.
Each of the subpixels PX includes a pixel electrode PE and a thin film transistor T. The thin film transistor T is electrically connected to the pixel electrode PE to supply power to the pixel electrode PE for display. The scan line GL intersects the data line DL to form a sub-pixel region in which the pixel electrode PE and the thin film transistor T are located. Each tft T is located at a position where one scan line GL crosses one data line DL. The thin film transistor T as described above includes an active layer, a source electrode, a drain electrode, and a gate electrode. Specifically, the drain electrode of the thin film transistor T is electrically connected to the pixel electrode PE. The source electrode of the thin film transistor T is electrically connected to the data line DL.
The thin film transistors T in the same sub-pixel row R are located on the same side of the sub-pixel PX. The thin film transistors T in the adjacent sub-pixel rows R are located at different sides of the sub-pixels PX. As shown in fig. 3, the thin film transistor T in the first sub-pixel row R1 is positioned at the right side of the sub-pixel PX in the first sub-pixel row R1. The thin film transistor T in the second sub-pixel row R2 is positioned at the left side of the sub-pixels PX in the second sub-pixel row R2.
Referring to fig. 5, fig. 5 is a partially enlarged view of fig. 3. Specifically, fig. 5 shows an enlarged structure of the O portion of fig. 3. In this embodiment, the first data line DL1 located in the first column L1 is electrically connected to the adjacent first data line DL1 located in the second column L2 through the connection segment LL. The connection segment LL is disposed on the same layer as the data line DL. The connection segment LL extends in a first direction D1. The first data line DL may be interchanged in position on the first column L1 and the second column L2 by the connection segment LL.
In one embodiment, the conversion line L includes a first portion La and a second portion Lb connected to the first portion La. The first portion La extends in the second direction D2, and an orthographic projection of the first portion La on a plane on which the first data line DL1 is located overlaps the first data line DL 1. The second portion extends in a first direction D1.
By setting the shape of the conversion line L to the "L" shape, the first portion La overlaps the first data line DL1, and the aperture ratio can be improved.
In addition, referring to fig. 3 and fig. 6, the array substrate 10 further includes a common electrode COM disposed on a surface of the data line DL away from the substrate 11. The common electrode COM is a transparent electrode. The material of the common electrode COM is Indium Tin Oxide (ITO). The common electrode COM is multiplexed as the touch layer 40 of the touch display panel 100. The common electrode COM includes a plurality of cell electrodes COM 1. The plurality of cell electrodes COM1 are independent of each other. Each touch signal line TL is electrically connected to a cell electrode COM1, and the cell electrode COM1 is reused as a touch electrode, or referred to as a touch pad (pad). Thus, the FIC structure is realized. In this embodiment mode, one unit electrode COM1 corresponds to one pixel group PG.
Referring to fig. 7, fig. 7 is a schematic view illustrating a driving method of the array substrate of fig. 3. Fig. 7 shows 4 subpixel rows R and 6 subpixel columns C, but the number of subpixel rows R and subpixel columns C in the present application is not limited thereto. As can be seen from fig. 7, when the dot inversion driving is performed using the column inversion structure, voltages of opposite polarities are supplied to the adjacent sub-pixels PX in the same sub-pixel row R, while voltages of opposite polarities are supplied to the adjacent sub-pixels PX in the same sub-pixel column C.
The first data line DL and the touch signal line TL accomplish the position exchange between the first column L1 and the second column L2 by connecting the segment LL and the switching line L. Therefore, the data lines DL and the touch signal lines TL can be arranged on the same layer, and the number of photomasks used in manufacturing is reduced. In addition, in the same subpixel row R, for the subpixel PX having the touch signal line TL, the first data line DL1 is always located on the side of the touch signal line TL close to the subpixel PX connected to the first data line DL, so that the thin film transistor T of the subpixel PX does not need to be connected to the first data line DL1 across the touch signal line TL, thereby eliminating the structural difference between the subpixels 201, 202, 203, and 204 and other subpixels PX, and preventing display unevenness. In addition, the first data lines DL and the touch signal lines TL are arranged along the first and second rows L1 and L2, so that the wiring area of the first data lines DL and the touch signal lines TL can be reduced, and the aperture ratio can be increased.
Referring to fig. 8 to 9, fig. 8 is a schematic structural diagram of an array substrate according to another embodiment of the present disclosure. Fig. 9 is a partial cross-sectional view of the array substrate of fig. 8 taken along line B-B. This embodiment is substantially the same as the above embodiment except that: the switching line L connects the first data line DL1 on the first column L1 with the first data line DL1 on the adjacent second column L2 through a via hole. In other words, the switching line L electrically connects the first data lines DL connected to the sub-pixels PX of different pixel rows R. Specifically, one end of each of the conversion lines L is connected to the first data line DL1 positioned on the first column L1 through the third via CT3, and the other end is connected to the first data line DL1 positioned on the second column L2 through the fourth via CT 4.
The switching line L is disposed in the same layer as the scanning line GL. Specifically, the switching line L and the scanning line GL are located on one side of the substrate 11. The gate insulating layer GI covers the transition line L and the scanning line GL. An active layer (not shown) is disposed on the gate insulating layer GI. The interlayer insulating layer IL covers the active layer and the gate insulating layer GI. The first data line DL1, the touch signal line TL, and a source/drain (not shown) are located on the interlayer insulating layer IL. The first via CT1 and the second via CT2 penetrate through the interlayer insulating layer IL and the gate insulating layer GI. The first data line DL1 extends into the first and second vias CT1 and CT2 to be connected to both ends of the switching line L.
Similarly, in the present embodiment, the touch signal line TL in the first column L1 is electrically connected to the adjacent touch signal line TL in the second column L2 through the connection segment LL. The connection section and the data line DL are arranged on the same layer. The connection segment LL extends in a first direction D1. The touch signal lines TL can be interchanged between the first column L1 and the second column L2 through the connection segments LL.
Referring to fig. 10 and 11, fig. 10 is a schematic structural diagram of an array substrate according to another embodiment of the present disclosure. Fig. 11 is a partial cross-sectional view of the array substrate of fig. 10 along the line C-C. This embodiment is substantially the same as the above embodiment except that: the array substrate 10 further includes a light-shielding layer LS. The light-shielding layer LS is located on one surface of the scanning line GL near the substrate 11. The light-shielding layer LS serves to shield light from the thin film transistor T on the array substrate 10. The light-shielding layer LS is disposed corresponding to the gate electrode GE of the thin film transistor T. The material of the light-shielding layer LS may be a metal having a light-shielding effect, such as silver or aluminum.
The conversion line L is disposed in the same layer as the light-shielding layer LS. The switching line L connects the touch signal line TL in the first column L1 with the touch signal line TL in the adjacent second column L2 through a via hole. One end of each conversion line L is connected to the touch signal line TL in the first row L1 through a first via CT1, and the other end is connected to the touch signal line TL in the second row L2 through a second via CT 2.
It can be understood that an insulating layer is disposed between the touch signal line TL and the switching line L. The first and second vias CT1 and CT2 penetrate the insulating layer. The touch signal line TL extends into the first via CT1 and the second via CT2 and is connected to two ends of the switching line L.
Specifically, the switching line L is located on one side of the substrate 11. The buffer layer BL covers the conversion line L and the substrate 11. The gate electrode GE and the scan line GL are disposed on the buffer layer BL. The gate insulating layer GI covers the gate electrode GE and the scan line GL. An active layer (not shown) is disposed on the gate insulating layer GI. The interlayer insulating layer IL covers the active layer and the gate insulating layer GI. The first data line DL1, the touch signal line TL, and a source/drain (not shown) are located on the interlayer insulating layer IL. The first via CT1 and the second via CT2 penetrate through the interlayer insulating layer IL, the gate insulating layer GI, and the buffer layer BL. The touch signal line TL extends into the first via CT1 and the second via CT2 and is connected to two ends of the switching line L.
Further, an orthogonal projection of the conversion line L on the plane of the substrate 11 may partially overlap an orthogonal projection of the scanning line GL on the plane of the substrate 11. Specifically, the conversion line L includes a first portion La and a second portion Lb connected to the first portion La. The first portion La extends in the second direction D2, and an orthographic projection of the first portion La on the plane of the substrate 11 overlaps with an orthographic projection of the scanning line GL on the plane of the substrate 11. The second portion Lb extends in the first direction D1. Thereby increasing the aperture ratio.
Referring to fig. 12 and 13, fig. 12 is a schematic structural diagram of an array substrate according to another embodiment of the present disclosure. Fig. 13 is a partial cross-sectional view of the array substrate of fig. 12 along the line D-D. In one embodiment, the switching line L is disposed in the same layer as the common electrode COM. The switching line L is insulated from the cell electrode COM1 of the common electrode COM.
The common electrode COM is disposed on a surface of the data line DL away from the substrate 11. The common electrode COM is a transparent electrode. The material of the common electrode COM is indium tin oxide. The common electrode COM is multiplexed as the touch layer 40 of the touch display panel 100. The common electrode COM includes a plurality of cell electrodes COM 1. The plurality of cell electrodes COM1 are independent of each other. Each touch signal line TL is electrically connected to a cell electrode COM1, and the cell electrode COM1 is reused as a touch electrode, or referred to as a touch pad. Thus, the FIC structure is realized. In this embodiment mode, one unit electrode COM1 corresponds to one pixel group PG.
The switching line L connects the touch signal line TL in the first column L1 with the touch signal line TL in the adjacent second column L2 through a via hole. In other words, the switching line L electrically connects the touch signal line TL opposite to the touch signal line TL connected to the sub-pixels PX of different pixel rows R. One end of each conversion line L is connected to the touch signal line TL in the first row L1 through a first via CT1, and the other end is connected to the touch signal line TL in the second row L2 through a second via CT 2. It can be understood that an insulating layer is disposed between the touch signal line TL and the switching line L. The first and second vias CT1 and CT2 penetrate the insulating layer. The touch signal line TL extends into the first via CT1 and the second via CT2 and is connected to two ends of the switching line L.
Specifically, the data line DL is located on one side of the substrate 11. The planarization layer PLN covers the data line DL and the substrate 11. The common electrode COM is located on the planarization layer PLN. The first via CT1 and the second via CT2 are opened in the planarization layer PLN. The touch signal line TL extends into the first via CT1 and the second via CT2 and is connected to two ends of the switching line L. Therefore, the aperture ratio can be improved by using the transparent common electrode COM material to manufacture the conversion line L.
The application provides a touch display panel and an array substrate. The array substrate comprises a substrate, and a data line, a touch signal line and a conversion line which are arranged on the substrate. The data line includes a first data line. The touch signal line and the first data line are arranged on the same layer. The touch signal lines and the first data lines are alternately arranged along a first row and are alternately arranged along a second row which is parallel to and opposite to the first row. The first data line on the first row is opposite to the touch signal line on the second row. The touch signal line on the first row is opposite to the first data line on the second row. The switching line is located at a different layer from the first data line. The conversion line connects the touch signal line on the first column with the touch signal line on the adjacent second column through the via hole, or connects the first data line on the first column with the first data line on the adjacent second column through the via hole.
Through the arrangement of the first data line and the touch signal line on the same layer, the zigzag inversion driving structure integrated with the FIC touch module can be realized, and a light shield is saved. Moreover, the touch signal line and the first data line are subjected to position interchange between the first row and the second row through the conversion line and the via hole, so that the difference between pixel structures is eliminated, and uneven display is avoided. In addition, the wiring space can be saved, and the aperture ratio can be increased.
The foregoing provides a detailed description of embodiments of the present application, and the principles and embodiments of the present application have been described herein using specific examples, which are presented solely to aid in the understanding of the present application. Meanwhile, for those skilled in the art, according to the idea of the present application, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present application.

Claims (11)

1. An array substrate, comprising:
a substrate;
a data line disposed on the substrate, the data line including a first data line;
touch signal lines arranged on the same layer as the first data lines, the touch signal lines and the first data lines being alternately arranged along a first row, the touch signal lines and the first data lines being alternately arranged along a second row, the second row being parallel to and opposed to the first row, the first data lines on the first row being arranged opposite to the touch signal lines on the second row, the touch signal lines on the first row being arranged opposite to the first data lines on the second row; and
the conversion lines are arranged on the substrate and are positioned on one side of the first data lines, which is far away from the substrate or close to the substrate, the touch signal lines on the first row are connected with the touch signal lines on the adjacent second row through the through holes, or the first data lines on the first row are connected with the first data lines on the adjacent second row through the through holes.
2. The array substrate of claim 1, wherein the array substrate further comprises a scan line disposed on a surface of the first data line adjacent to the substrate.
3. The array substrate of claim 2, wherein the switching lines are disposed in a same layer as the scan lines.
4. The array substrate of claim 2, further comprising a light shielding layer on a side of the scan line adjacent to the substrate, wherein the conversion line is disposed on the same layer as the light shielding layer.
5. The array substrate of claim 4, wherein an orthographic projection of the conversion line on the plane of the substrate partially overlaps an orthographic projection of the scan line on the plane of the substrate.
6. The array substrate of claim 1, further comprising a common electrode disposed on a side of the first data line away from the substrate, wherein the switching line and the common electrode are disposed on a same layer.
7. The array substrate of claim 6, wherein the common electrode comprises a plurality of unit electrodes, each of the touch signal lines is electrically connected to one of the unit electrodes, and the unit electrodes are multiplexed as touch electrodes.
8. The array substrate of claim 1, wherein the array substrate further comprises a plurality of rows of subpixels and a plurality of columns of subpixels disposed on the substrate, the plurality of rows of subpixels extending along a first direction, the plurality of rows of subpixels comprising a first row of subpixels and a second row of subpixels, the first row of subpixels and the second row of subpixels disposed adjacent to each other, the plurality of columns of subpixels extending along a second direction, the second direction intersecting the first direction, the plurality of columns of subpixels comprising a first column of subpixels and a second column of subpixels, the first column of subpixels and the second column of subpixels disposed adjacent to each other;
the first column, the second column, the first sub-pixel column and the second sub-pixel column are parallel to each other, the first column and the second column are located between the first sub-pixel column and the second sub-pixel column, the first column is located on one side of the second column close to the first sub-pixel column, the first data line on the first column is electrically connected with the sub-pixels of the first sub-pixel column, and the first data line on the second column is electrically connected with the sub-pixels of the second sub-pixel column.
9. The array substrate of claim 8, wherein the data lines further comprise second data lines parallel to the first data lines and disposed on opposite sides of the first data lines, the second data lines are electrically connected to the sub-pixels, the sub-pixels in the same sub-pixel row are connected to the same side of the data lines, and the sub-pixels in adjacent sub-pixel rows are connected to opposite sides of the data lines.
10. The array substrate of claim 8, wherein one of the first column and one of the second column are disposed in every three or four adjacent sub-pixel columns.
11. A touch display panel comprising the array substrate according to any one of claims 1 to 10.
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