CN112767892A - Liquid crystal panel TCON module based on FPGA - Google Patents
Liquid crystal panel TCON module based on FPGA Download PDFInfo
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- 239000004973 liquid crystal related substance Substances 0.000 title claims abstract description 75
- 238000006243 chemical reaction Methods 0.000 claims abstract description 6
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- 238000005215 recombination Methods 0.000 claims description 3
- BTCSSZJGUNDROE-UHFFFAOYSA-N gamma-aminobutyric acid Chemical compound NCCCC(O)=O BTCSSZJGUNDROE-UHFFFAOYSA-N 0.000 description 8
- 229940084388 gammar Drugs 0.000 description 8
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3674—Details of drivers for scan electrodes
- G09G3/3677—Details of drivers for scan electrodes suitable for active matrices only
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Abstract
The invention discloses a liquid crystal panel TCON module based on an FPGA (field programmable gate array), which comprises the FPGA, a GAMMA voltage generator and a power module, wherein the FPGA converts a parallel digital video signal input from the outside into an M i n i-LVDS serial digital video signal according to configuration parameters, generates a time sequence control signal of a gate driving circuit and a time sequence control signal of a source driving circuit according to the time sequence of the parallel digital video signal, and outputs the M i n i-LVDS serial digital video signal, the time sequence control signal of the gate driving circuit and the time sequence control signal of the source driving circuit to a liquid crystal panel; the GAMMA voltage generator outputs a Vcom voltage, a VTT voltage, and a GAMMA voltage according to the configuration command. The front blanking area, the rear blanking area and the row-column pixel number of the video signal can be configured and adjusted according to the resolution of the liquid crystal panel, and the image conversion requirements of liquid crystal panels with different sizes and different resolutions are met.
Description
Technical Field
The invention relates to the field of liquid crystal panel driving, in particular to a liquid crystal panel TCON module based on an FPGA.
Background
With the continuous improvement of industrial technology strength in China, the liquid crystal display system for man-machine interaction is more and more widely applied to the production and life of people. Increasingly, application scenes such as vehicle-mounted display, intelligent wearing, industrial instruments and the like need small-size liquid crystal display systems. The core device of the liquid crystal display system is a display, and the input video signal of the display is generally a universal video signal such as VGA, DVI, HDMI, SDI, DP, etc. The display is generally composed of an image processing board and a liquid crystal panel. The image input signal of the liquid crystal panel is usually RGB TTL, LVDS, eDP, vby one, etc. signal output by the image processing board. The liquid crystal screen is composed of a TCON (timing controller) module and a liquid crystal panel. The TCON module converts RGB TTL, LVDS, eDP, V by one and other signals into RSDS or mini-LVDS signals, and drives liquid crystal molecules of the liquid crystal panel by matching with gate drive and source drive signals, Vcom, GAMMA and other voltages, so that the liquid crystal panel can clearly and accurately display image information. TCON timing control is the most basic and most core function of a liquid crystal display system. The TCON drive design of the liquid crystal panel is a key link in the signal control and conversion process of the liquid crystal panel.
At present, due to the reasons of small size or small shipment quantity and the like, a matched TCON module card is not provided by a liquid crystal panel original factory of a small-size TFT-LCD liquid crystal panel in the market. Since the timing control logic and voltage required by different models of liquid crystal panels are different, the TCON module designed by display equipment manufacturers usually uses ASIC to perform specific timing control, and uses a resistor tone circuit to solidify the Vcom and GAMMAR voltage values. Once the design is completed, it is often only possible to match a specific type of liquid crystal panel.
Disclosure of Invention
The present invention is directed to solving at least one of the problems of the prior art. Therefore, the invention provides the liquid crystal panel TCON module based on the FPGA, which can be adapted to liquid crystal panels of different models.
According to the embodiment of the invention, the liquid crystal panel TCON module based on the FPGA comprises: the FPGA is used for converting externally input parallel digital video signals into Mini-LVDS serial digital video signals according to parameters of the liquid crystal panel, generating a time sequence control signal of the gate driving circuit and a time sequence control signal of the source driving circuit according to a time sequence of the parallel digital video signals, and then outputting the Mini-LVDS serial digital video signals, the time sequence control signal of the gate driving circuit and the time sequence control signal of the source driving circuit to the liquid crystal panel; the GAMMA voltage generator is connected with the FPGA and used for receiving a configuration command of the FPGA and outputting Vcom voltage, VTT voltage and GAMMA voltage to the liquid crystal panel according to the configuration command; and the power supply module is used for providing a low-voltage working power supply.
The liquid crystal panel TCON module based on the FPGA of the embodiment of the invention at least has the following technical effects:
1. according to the embodiment of the invention, the FPGA is used for replacing an ASIC (application specific integrated circuit), and the characteristics and the programmable characteristics of a semi-customized circuit of the FPGA can flexibly design time sequence logic and configure a control signal time sequence according to different resolution requirements of a liquid crystal panel. The problem that one TCON module can only be matched with one liquid crystal panel is solved, and the product universality is greatly improved.
2. In the embodiment of the invention, the FPGA sets the scanning direction signals of the gate drive and the source drive through configuration parameters, can flexibly set the display direction of the liquid crystal panel and realizes the left-right turning and the up-down turning of the display image. And meanwhile, the matching difficulty of the liquid crystal panel and the structural member is reduced.
3. In the embodiment of the invention, the FPGA dynamically generates appropriate Vcom and GAMMA voltage by configuring the GAMMA voltage generator, thereby conveniently adjusting the liquid crystal molecule torsion angle of the liquid crystal panel. The best display effect of the liquid crystal panel is achieved, and meanwhile debugging time and trial and error cost are greatly reduced.
4. The embodiment of the invention has wide application range, can be used for realizing products by display manufacturers, quickly realizing image display and delivering display equipment, and can also be used for adjusting the display performance of a new product panel and testing the display performance of a panel with an inherent model by an upstream liquid crystal panel manufacturer.
According to some embodiments of the invention, a Data _ Convert module, a MiniLVGen module and a TimeCon module are arranged in the FPGA, and the Data _ Convert module is used for completing Data extraction and recombination from parallel digital signals to serial signals; the Data _ Convert module is connected with the MiniLVGen module to output differential Data, and the MiniLVGen module is used for converting the differential Data output by the Data _ Convert module into a Mini-LVDS serial digital video signal and outputting the Mini-LVDS serial digital video signal; the TimeCon module is used for generating and outputting time sequence control signals of the gate driving circuit and the source driving circuit according to the Data of the Data _ Convert module.
According to some embodiments of the present invention, the FPGA is further provided with a MAX _ VGA module, and the MAX _ VGA module is connected to the Data _ Convert module to detect validity of the externally input parallel digital video signal.
According to some embodiments of the present invention, a Syn _ fifo module is further disposed between the MAX _ VGA module and the Data _ Convert module, and the Syn _ fifo module is configured to implement cross-time domain transmission of an input signal and an output signal.
According to some embodiments of the invention, the Data _ Convert module comprises a MAX _ Data sub-module, a BitAdj sub-module, a DataRom sub-module, and a DataFIFO sub-module; the Data _ Convert module comprises a MAX _ Data submodule, a BitAdj submodule, a DataRom submodule and a DataFIFO submodule; the MAX _ Data sub-module is used for realizing alignment of output signals RGB and HS, VS signals by adjusting time sequence beat, and the BitAdj sub-module is used for adjusting Bit of parallel video signals and realizing conversion from 6Bit3 pixels to 6Bit4 pixels; the DataRom submodule and the DataFIFO submodule are used for extracting effective image information in the input signal and realizing that the image information enters and exits the FIFO buffer in the sequence of the complete frame.
According to some embodiments of the invention, the GAMMAR voltage generator is connected to the FPGA through an I2C bus.
According to some embodiments of the invention, the FPGA is of a model number EP2C8F 256.
According to some embodiments of the invention, the GAMMA voltage generator is model number BUF 16820.
Additional aspects and advantages of the invention will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the invention.
Drawings
The above and/or additional aspects and advantages of the present invention will become apparent and readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings of which:
fig. 1 is a hardware block diagram of a TCON module of a liquid crystal panel based on an FPGA in an embodiment of the present invention;
FIG. 2 is a logic data flow diagram of an FPGA in an embodiment of the present invention;
FIG. 3 is a diagram of a video data reformatting in an embodiment of the present invention;
FIG. 4 is a timing diagram of gate driving signals according to an embodiment of the present invention;
FIG. 5 is a timing diagram of gate driving signals according to an embodiment of the present invention;
FIG. 6 is a graph of GAMMA voltage regulation according to an embodiment of the present invention;
fig. 7 is a schematic circuit diagram of a GAMMAR voltage generator in an embodiment of the present invention.
Reference numerals
FPGA100, GAMMA voltage generator 200, and power supply module 300.
Detailed Description
Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the accompanying drawings are illustrative only for the purpose of explaining the present invention, and are not to be construed as limiting the present invention.
In the description of the present invention, unless otherwise explicitly limited, terms such as arrangement, installation, connection and the like should be understood in a broad sense, and those skilled in the art can reasonably determine the specific meanings of the above terms in the present invention in combination with the specific contents of the technical solutions.
Referring to fig. 1, a liquid crystal panel TCON module based on an FPGA includes: the adaptive liquid crystal panel in the embodiment adopts a TFT-LCD liquid crystal panel HV050V01-100 of Jing-east company, the input end of the FPGA100 is connected with 18Bit RGB parallel digital video signals, the externally input 18Bit RGB parallel digital video signals are converted into Mini-LVDS serial digital video signals required by a liquid crystal panel source driving circuit, and liquid crystal panel time sequence control signals required by a liquid crystal panel gate driving circuit and a source driving circuit are generated according to the time sequence of the video signals, such as XLR, DIR, TP, EIO1, EIO2, DIO1, DIO2, GSC, DIS and POL.
Referring to fig. 2, in the present embodiment, the FPGA100 selects EP2C8F 256. The FPGA100 is internally provided with a MAX _ VGA module, a Syn _ fifo module, a Data _ Convert module, a MiniLVGen module and a TimeCon module which are connected with the Data _ Convert module in sequence, wherein the MAX _ VGA module is used for detecting the effectiveness of parallel digital video signals input from the outside. The specific working steps of the MAX _ VGA module are as follows: s1, performing phase locking according to the output clock signal to generate an internal clock; s2, sampling the line field signal, and judging the positive and negative polarities of the line field signal; s3, judging the effectiveness and resolution of the RGB parallel digital video signal according to the line field signal; and S4, when the input signal is valid, sending the signal to the next-stage module, and when the input signal is invalid, sending the test picture pre-stored in the FLASH to the next-stage module.
The Syn _ fifo module is used for realizing the cross-time domain transmission of external input RGB parallel digital video signals and output video signals. Preferably, in this embodiment, the Syn _ FIFO module uses a dual-port FIFO, an input port of the FIFO uses an external video signal clock for sampling, and an output port of the FIFO uses an internal clock for sampling.
The Data _ Convert module comprises a MAX _ Data sub-module, a BitAj sub-module, a DataRom sub-module, a DataFIFO sub-module, and the like. The function of the device is to complete the data extraction and recombination from the RGB parallel digital video signal to the serial signal. The final data format is shown in fig. 3, which takes the form of 6Bit4 pairs of differential data signals according to the video signal timing requirements of the liquid crystal panels HV050V 01-100. The RGB data needs to be cyclically allocated to 4 pairs of differential lines in sequence. The MAX _ Data sub-module realizes the alignment of output signals RGB and HS, VS signals by adjusting time sequence beat, and the BitAdj sub-module adjusts the Bit of the parallel video signal to realize the conversion from 6Bit3 pixel to 6Bit4 pixel; the DataRom submodule and the DataFIFO submodule act together to extract effective image information in the input signal, and the image information enters and exits the FIFO buffer in the sequence of the complete frame.
The MiniLVGen module is used for calling an IP core inside the FPGA, converting differential Data output by the Data _ Convert module of the previous-stage module into standard Mini-LVDS serial digital video signals and outputting the standard Mini-LVDS serial digital video signals to the liquid crystal panel.
The TimeCon module generates LCD panel timing control signals such as XLR, DIR, TP, EIO1, EIO2, DIO1, DIO2, GSC, DIS, POL according to the CLK clock, HsVs line field, DE enable signal output by the Data _ Convert module of the previous stage. XLR, DIR, EIO1, EIO2, DIO1 and DIO2 are arranged according to the actual assembly direction of the liquid crystal panel, and an appropriate display scanning direction is selected. Meanwhile, corresponding time sequence control signals are generated according to the signal requirements of the gate driving circuit X-driver IC and the source driving circuit Y-driver IC on the liquid crystal panel. Wherein the gate driving signals are shown in fig. 4 and the gate driving signals are shown in fig. 5.
Referring to fig. 7, the GAMMAR voltage generator 200 is connected to the FPGA100 through an I2C bus, and the GAMMAR voltage generator 200 has a feature of on-chip real-time programmable (OTP). Configuration commands of the FPGA100 are received through an I2C bus, and Vcom and multi-path GAMMA voltages required by the liquid crystal panel are set. In the embodiment, the GAMMA voltage generator 200 selects BUF16820 of TI company, and the BUF16820 has output capability of 14-path adjustable GAMMA gray scale voltage and 2-path adjustable Vcom voltage. The GAMMA voltage and the Vcom voltage support the equal division of the REFH high voltage and the REFL low voltage 1024. The precision of the output voltage can reach 0.02V, and the precision requirement of the liquid crystal panel on the gray scale voltage is met. The display panel achieves the best display effect by adjusting the GAMMA voltage value. The GAMMA voltage regulation curve is shown in FIG. 6.
The output voltage value of BUF16820 is configured by a CONTROL unit in the logic of FPGA 100. When the FPGA100 is powered on, the CONTROL unit calls relevant IP modules such as I2C _ master and the like to initialize the BUF 16820.
The FPGA100 configures the GAMMAR voltage generator 200 online via the I2C signals SCL, SDA. Compared with a common resistance step circuit, the circuit has the advantages that the welding and dismounting times of the circuit can be reduced, and the debugging flexibility and reliability are greatly improved.
The power module 300 is a conventional DC-DC power module, and includes circuits for converting 12V into 5V, 3.3V, 2.5V, 1.2V, and the like. In this embodiment, the power module 300 selects a multi-output power chip TPS65100Q1 of IT company to generate low-voltage operating power sources VGH, VGL, and VDD required by the liquid crystal panel. By adjusting the adjustable resistor, the value of three-way feedback voltage FB (feed Back) of the power supply chip TPS65100Q1 is set, so that the VGH outputs +26.3V voltage, the VGL outputs-8.25V voltage, and the VDD outputs +9.23V voltage. The normal operation of the liquid crystal panel is ensured by providing proper basic voltage.
In summary, the embodiment of the invention uses the FPGA100 to replace an ASIC, which breaks through the problem that one TCON module can only be adapted to one liquid crystal panel, and greatly improves the product versatility. The front blanking area, the rear blanking area and the row-column pixel number of the video signal can be configured and adjusted according to the resolution of the liquid crystal panel, and the image conversion requirements of liquid crystal panels with different sizes and different resolutions are met. By setting scanning direction signals of the gate drive and the source drive, the display direction of the liquid crystal panel can be flexibly set, and the left and right overturning and the up and down overturning of the display image are realized. And meanwhile, the matching difficulty of the liquid crystal panel and the structural member is reduced. The FPGA100 configures the GAMMAR voltage generator through I2C to dynamically generate appropriate Vcom and GAMMAR voltage, which facilitates adjusting the liquid crystal molecule twist angle of the liquid crystal panel. The best display effect of the liquid crystal panel is achieved, and meanwhile debugging time and trial and error cost are greatly reduced. The embodiment of the invention has wide application range, can be used for realizing products by display manufacturers, quickly realizing image display and delivering display equipment, and can also be used for adjusting the display performance of a new product panel and testing the display performance of a panel with an inherent model by an upstream liquid crystal panel manufacturer.
The embodiments of the present invention have been described in detail with reference to the accompanying drawings, but the present invention is not limited to the above embodiments, and various changes can be made within the knowledge of those skilled in the art without departing from the gist of the present invention.
Claims (8)
1. The utility model provides a liquid crystal display panel TCON module based on FPGA which characterized in that includes:
the FPGA (100) is used for converting a parallel digital video signal input from the outside into a Mini-LVDS serial digital video signal according to the parameter of the liquid crystal panel, generating a time sequence control signal of a gate driving circuit and a time sequence control signal of a source driving circuit according to the time sequence of the parallel digital video signal, and then outputting the Mini-LVDS serial digital video signal, the time sequence control signal of the gate driving circuit and the time sequence control signal of the source driving circuit to the liquid crystal panel;
the GAMMA voltage generator (200) is connected with the FPGA (100) and used for receiving a configuration command of the FPGA (100) and outputting a Vcom voltage, a VTT voltage and the GAMMA voltage to the liquid crystal panel according to the configuration command;
a power module (300), the power module (300) being configured to provide a low voltage operating power.
2. The FPGA-based liquid crystal panel TCON module of claim 1, wherein: a Data _ Convert module, a MiniLVGen module and a TimeCon module are arranged in the FPGA (100), and the Data _ Convert module is used for finishing Data extraction and recombination from parallel digital signals to serial signals; the Data _ Convert module is connected with the MiniLVGen module to output differential Data, and the MiniLVGen module is used for converting the differential Data output by the Data _ Convert module into a Mini-LVDS serial digital video signal and outputting the Mini-LVDS serial digital video signal; the TimeCon module is used for generating and outputting time sequence control signals of the gate driving circuit and the source driving circuit according to the Data of the Data _ Convert module.
3. The FPGA-based liquid crystal panel TCON module of claim 2, wherein: the FPGA (100) is also internally provided with a MAX _ VGA module, and the MAX _ VGA module is connected with the Data _ Convert module and used for detecting the effectiveness of parallel digital video signals input from the outside.
4. The FPGA-based liquid crystal panel TCON module of claim 3, wherein: and a Syn _ fifo module is also arranged between the MAX _ VGA module and the Data _ Convert module and is used for realizing the cross-time domain transmission of input signals and output signals.
5. The FPGA-based liquid crystal panel TCON module of claim 2, wherein: the Data _ Convert module comprises a MAX _ Data submodule, a BitAdj submodule, a DataRom submodule and a DataFIFO submodule; the MAX _ Data sub-module is used for realizing alignment of output signals RGB and HS, VS signals by adjusting time sequence beat, and the BitAdj sub-module is used for adjusting Bit of parallel video signals and realizing conversion from 6Bit3 pixels to 6Bit4 pixels; the DataRom submodule and the DataFIFO submodule are used for extracting effective image information in the input signal and realizing that the image information enters and exits the FIFO buffer in the sequence of the complete frame.
6. The FPGA-based liquid crystal panel TCON module of claim 1, wherein: the GAMMA voltage generator (200) is connected to the FPGA (100) via an I2C bus.
7. The FPGA-based liquid crystal panel TCON module of claim 1, wherein: the FPGA (100) is in the model of EP2C8F 256.
8. The FPGA-based liquid crystal panel TCON module of claim 1, wherein: the GAMMA voltage generator (200) is BUF 16820.
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| CN116312393A (en) * | 2022-12-22 | 2023-06-23 | 深圳市大我云读写科技有限公司 | Method, device, equipment and storage medium for driving color ink screen |
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Application publication date: 20210507 |