CN102855856B - A kind of driving method and liquid crystal display thereof eliminating liquid crystal display Mura - Google Patents
A kind of driving method and liquid crystal display thereof eliminating liquid crystal display Mura Download PDFInfo
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- CN102855856B CN102855856B CN201210314274.9A CN201210314274A CN102855856B CN 102855856 B CN102855856 B CN 102855856B CN 201210314274 A CN201210314274 A CN 201210314274A CN 102855856 B CN102855856 B CN 102855856B
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Abstract
The invention provides a kind of driving method and the liquid crystal display thereof of eliminating liquid crystal display Mura, liquid crystal display, comprise: LCD assembly, the data driver being connected to liquid crystal panel assembly and gate drivers, time schedule controller for control gate driver and data driver, described liquid crystal display is provided with control signal and voltage selector, be provided with D/A in described data driver and turn dress parallel operation, described control signal can differentiate normal pixel and Mura pixel.When the present invention is not by changing view data DATA, reach the effect compensating Mura, improve liquid crystal corresponding speed, and the present invention not can only adjust for white picture, be black picture 00h (00000000) or darker rank and brighter rank or any other GTG for view data, also same methods eliminates Mura.
Description
Technical field
The present invention relates to driving method and the liquid crystal display thereof of a kind of elimination Mura newly.
Background technology
Figure 1 shows that the drives schematic diagram of available liquid crystal display, liquid crystal display comprises: liquid crystal panel assembly 100, data driver 200 and the gate drivers 300 being connected to liquid crystal panel assembly 100, be connected to the gray voltage generator (Gammavoltagegenerator) 400 of data driver 200, for the time schedule controller (Timingcontroller) 500 of control gate driver 300 and data driver 200, and the DC/DC DC-DC power supply change-over circuit 700 of operating voltage needed for responsible liquid crystal display, this DC/DC DC-DC power supply change-over circuit 700 makes liquid crystal display be able to normal work.
The liquid crystal that liquid crystal panel assembly 100 comprises mutually corresponding lower display panel and upper display panel and is folded between display panel and lower display panel.
Assuming that liquid crystal display horizontal direction has m bar sweep trace, vertical direction has n bar data line, is combined into the liquid crystal display of a n*m pixel, and sweep trace and data line intersect and limit multiple film crystal pipe unit PX.Multiple film crystal pipe unit PX is matrix arrangement, film crystal pipe unit PX is connected with display signal line, display signal line is disposed on lower display panel, and comprises transmission multi-strip scanning line G1 to the Gm of signal and a plurality of data lines D1 to the Dn of transmission of data signals.Sweep trace G1 to Gm extends in the horizontal direction and is parallel to each other, and data line D1 to Dn extends in vertical direction and is parallel to each other.
Each pixel PX comprises switchgear, liquid crystal capacitance and memory capacitance, and switchgear is connected to one in sweep trace G1 to Gm one and data line D1 to Dn, and liquid crystal capacitance is connected to switchgear, and memory capacitance is connected to switchgear abreast.
Gate drivers 300 is connected to sweep trace G1 to Gm, and the signal that the gate-on voltage Von applied by external circuit and grid cut-off voltage Voff forms is applied to sweep trace G1 to Gm.Data driver 200 is positioned at the side of liquid crystal panel assembly 100, and is connected to all gate lines G 1 to Gm line.
Gray voltage generator 400 generates the grayscale voltage relevant to the transparency of pixel PX, and grayscale voltage is provided to each pixel PX, and grayscale voltage comprises positive polarity voltage relative to common electric voltage Vcom and reverse voltage.
Be provided with DAC(D/A in data driver 200 and turn dress parallel operation) 201, DAC(D/As turn dress parallel operation) 201 are a kind of devices digital signal being converted to simulating signal.Data driver 200 is connected to data line D1 to the Dn of liquid crystal panel assembly 100, and the gray-scale voltage produced by grayscale voltage generator 400 is applied to pixel PX as data voltage.
Gray voltage generator (Gammavoltagegenerator) 400 produces circuit and is responsible for producing the reference voltage (V1 ~ Vn) needed for source drive IC.
Time schedule controller 500 control gate driver 300 and data driver 200, time schedule controller 500 receives received image signal (R, G, B) and input control signal, with the display of control inputs picture signal, such as, can make signal DE from vertical synchronizing signal Vsync, the horizontal-drive signal Hsync of external graphics controller (not shown), clock control signal DCLK and data, picture signal (R, G, B) and input control signal are referred to as input data 600.Time schedule controller 500 is according to the operating conditions of liquid crystal panel assembly 100, suitably process received image signal and input control signal, produce grid control signal CONT1 and data controlling signal CONT2, grid control signal CONT1 is sent to gate drivers 200, and the picture signal DATA of data controlling signal CONT2 and process is sent to data driver 300, data driver 300 is that the data controlling signal CONT2 that exported by time schedule controller 500 and view data DATA turns dress parallel operation by DAC(D/A) 201 be converted to voltage after output to liquid crystal panel assembly 100, gate drivers 200 is responsible for the film crystal pipe unit opened or closed in liquid crystal panel assembly 100, liquid crystal panel assembly 100 pixel PX is charged.
Grid control signal CONT1 comprises scanning initialize signal STV and when exports gate-on voltage Von with initialization scan and at least one clock signal with control.Grid control signal CONT1 can also comprise output enable signal OE to define the duration (duration) of gate-on signal Von.
Data controlling signal CONT2 comprises beginning that horizontal-drive signal STH transmits for the data of one group of pixel with notification data driver 500, be loaded into signal LOAD is applied to D1 to Dm and data clock signal HCLK with designation data driver 500 by data voltage.Data controlling signal CONT2 can also comprise reverse signal RSV with the polarity relative to common electric voltage Vcom reversal data voltage.
The Mura(that available liquid crystal panel assembly 100 occurs is uneven) removing method is that the mode compensated by view data DATA is carried out, when there is Mura in liquid crystal panel assembly, the pixel data revising Mura position is removed by time schedule controller, as shown in Figure 2, when liquid crystal panel assembly 100 occurs Mura101,102 time (as Fig. 2 a), done the compensation of digitisation by time schedule controller to eliminate Mura101,102(as Fig. 2 b).
The Mura occurred in Fig. 2 a, its removing method is, the view data DATA exported by changing time schedule controller has come, as Fig. 3, suppose to have the pixel of Mura to be pixel 2(PX2) and pixel n-1(PXn-1), by change correspond to pixel 2(PX2) and pixel n-1(PXn-1) picture signal DATA eliminate Mura, reach the panel without Mura as shown in Figure 2 b.
As Fig. 4 a and Fig. 4 b, available liquid crystal panel assembly 100 complete black picture (GL0) (as Fig. 4 a), or there is Mura101 in complete white picture (GL255) (as Fig. 4 b), 102 is to compensate, due to black, white picture has arrived the limit of digital date, for example: data is for 8bits, " black " digital date is 00000000, " in vain " digital date is 11111111, appear at black, Mura under white picture, cannot go to revise through digital date again, so Mura existing under partially black or partially white picture, traditional mode cannot be utilized eliminate.
Summary of the invention
The object of the present invention is to provide a kind of when not changing view data DATA, Cell can be reduced scrap ratio, improve driving method and the liquid crystal display thereof of the elimination liquid crystal display Mura of yields.
The invention provides a kind of driving method eliminating liquid crystal display Mura, liquid crystal display comprises: LCD assembly, the data driver being connected to liquid crystal panel assembly and gate drivers, time schedule controller for control gate driver and data driver, described liquid crystal display is provided with control signal and voltage selector, be provided with D/A in described data driver and turn dress parallel operation, described control signal can differentiate normal pixel and Mura pixel, and this method comprises the steps:
The first step: export control signal to voltage selector;
Second step: the voltage after voltage selector Drazin inverse to Mura pixel and normal voltage to normal pixel.
3rd step: the voltage exported through voltage selector turns dress parallel operation to D/A, D/A turns the view data that dress parallel operation receives time schedule controller output simultaneously.
The present invention discloses again a kind of liquid crystal display, comprise: LCD assembly, the data driver being connected to liquid crystal panel assembly and gate drivers, time schedule controller for control gate driver and data driver, described liquid crystal display is provided with control signal and voltage selector, be provided with D/A in described data driver and turn dress parallel operation, described control signal can differentiate normal pixel and Mura pixel.
When the present invention is not by changing view data DATA, reach the effect compensating Mura, improve liquid crystal corresponding speed, and the present invention not can only adjust for white picture, be black picture 00h (00000000) or darker rank and brighter rank or any other GTG for view data, also same methods eliminates Mura.
Accompanying drawing explanation
Fig. 1 is the drives schematic diagram of available liquid crystal display;
Fig. 2 a is the schematic diagram before Mura appears in available liquid crystal display;
Fig. 2 b is the schematic diagram after eliminating the Mura in Fig. 2 a;
Fig. 3 eliminates the Mura mode schematic diagram in Fig. 2 a;
Fig. 4 a is the schematic diagram that Mura appears in existing full black liquor crystal display;
Fig. 4 b is the schematic diagram that Mura appears in existing full white LCD;
Fig. 5 is the drives schematic diagram of liquid crystal display of the present invention;
Fig. 6 is the procedure chart that the present invention eliminates Mura;
Fig. 7 is the schematic diagram eliminating Mura method described in Fig. 6;
Fig. 8 is the schematic diagram that the present invention eliminates the front and back of the first embodiment after Mura;
Fig. 9 is the schematic diagram that the present invention eliminates the front and back of the second embodiment after Mura.
Embodiment
Below in conjunction with the drawings and specific embodiments, illustrate the present invention further, these embodiments should be understood only be not used in for illustration of the present invention and limit the scope of the invention, after having read the present invention, the amendment of those skilled in the art to the various equivalent form of value of the present invention has all fallen within the application's claims limited range.
The present invention discloses a kind of driving method eliminating liquid crystal display Mura, liquid crystal display comprises: LCD assembly, the data driver being connected to liquid crystal panel assembly and gate drivers, time schedule controller for control gate driver and data driver, described liquid crystal display is provided with control signal and voltage selector, be provided with D/A in described data driver and turn dress parallel operation, described control signal can differentiate normal pixel and Mura pixel, and this method comprises the steps:
The first step: export control signal to voltage selector; this control signal signal can be used to differentiate normal pixel and Mura pixel; control signal can pass through time schedule controller; certain control signal also not necessarily will pass through time schedule controller, and it exports from other elements of liquid crystal display and also belongs to protection category of the present invention.And the voltage that selection one is suitable from voltage selecting circuit exports next stage to.
Second step: the voltage after voltage selector Drazin inverse to Mura pixel and normal voltage to normal pixel, voltage selector is preferably located in data driver, can certainly be located in other elements of liquid crystal display, as long as the identical of voltage selector is also protection category of the present invention, the input voltage of voltage selector has multiple, each pixel has two voltages, when being normal pixel, voltage selector input normal voltage, when being Mura pixel, voltage selector inputs another voltage, which voltage of each pixel selection is determined by control signal.
3rd step: the voltage exported through voltage selector turns dress parallel operation to D/A, D/A turn dress parallel operation receive simultaneously time schedule controller export view data, then data driver then by time schedule controller export data controlling signal CONT2 and picture signal DATA by DAC(D/A turn dress parallel operation) be converted to voltage after output to liquid crystal panel assembly.
Following to above-mentioned specific descriptions.
The present invention discloses a kind of just to the driving method of the inequality of the elimination liquid crystal display of black/white picture, Fig. 5 is the structural representation of liquid crystal display of the present invention, liquid crystal display comprises: liquid crystal panel assembly 10, data driver 20 and the gate drivers 30 being connected to liquid crystal panel assembly 100, be connected to the gray voltage generator (Gammavoltagegenerator) 400 of data driver 20, for the time schedule controller (Timingcontroller) 50 of control gate driver 300 and data driver 200, and the DC/DC DC-DC power supply change-over circuit 70 of operating voltage needed for responsible liquid crystal display, this DC/DC DC-DC power supply change-over circuit 700 makes liquid crystal display be able to normal work.
Assuming that liquid crystal display horizontal direction has m bar sweep trace, vertical direction has n bar data line, is combined into the liquid crystal display of a n*m pixel, and sweep trace and data line intersect and limit multiple film crystal pipe unit PX.
Each pixel PX comprises switchgear, liquid crystal capacitance and memory capacitance, and switchgear is connected to one in sweep trace G1 to Gm one and data line D1 to Dn, and liquid crystal capacitance is connected to switchgear, and memory capacitance is connected to switchgear abreast.
Gate drivers 30 is connected to sweep trace G1 to Gm, and the signal that the gate-on voltage Von applied by external circuit and grid cut-off voltage Voff forms is applied to sweep trace G1 to Gm.Data driver 200 is positioned at the side of liquid crystal panel assembly 10, and is connected to all gate lines G 1 to Gm line.
Gray voltage generator 40 generates the grayscale voltage relevant to the transparency of pixel PX, and grayscale voltage is provided to each pixel PX, and grayscale voltage comprises positive polarity voltage relative to common electric voltage Vcom and reverse voltage.
Data driver 20 is connected to data line D1 to the Dn of liquid crystal panel assembly 10, and the gray-scale voltage produced by grayscale voltage generator 40 is applied to pixel PX as data voltage.Also be provided with a voltage selector (VoltageSelector) 21 and DAC(D/A in described data driver 20 and turn dress parallel operation) 22.
Gray voltage generator (Gammavoltagegenerator) 400 produces circuit and is responsible for producing the reference voltage (V1 ~ Vn) needed for source drive IC.
Time schedule controller 50 increases by an output control signal (controlsignal) 51.Time schedule controller 50 control gate driver 30 and data driver 20, time schedule controller 50 receives received image signal (R, G, B) and input control signal, with the display of control inputs picture signal, such as, can make signal DE from vertical synchronizing signal Vsync, the horizontal-drive signal Hsync of external graphics controller (not shown), clock control signal DCLK and data, picture signal (R, G, B) and input control signal are referred to as input data 60.Time schedule controller 50 is according to the operating conditions of liquid crystal panel assembly 10, suitably process received image signal and input control signal, produce grid control signal CONT1 and data controlling signal CONT2, grid control signal CONT1 is sent to gate drivers 20, gate drivers 20 is responsible for the film crystal pipe unit opened or closed in liquid crystal panel assembly 10, and liquid crystal panel assembly 10 pixel PX is charged.
The picture signal DATA of control signal CONT2, process and control signal (controlsignal) 51 are sent to data driver 30 by time schedule controller 50, the data controlling signal CONT2 that time schedule controller 50 exports by data driver 30 and picture signal DATA turns dress parallel operation by DAC(D/A) 22 be converted to voltage after output to liquid crystal panel assembly 100, and the voltage selector of data driver 30 (VoltageSelector) 21 selects control signal (controlsignal) 51 according to the performance of liquid crystal panel assembly 100.
As Fig. 6, the view data DATA that time schedule controller exports and control signal (controlsignal) 51 to data driver 20, the input voltage of the voltage selector 21 of data driver 20 have V1, V1 ', V2, V2 ' ... Vn, Vn ', each pixel has two voltage V and V ', when show be normal pixel time, voltage selector 21 inputs normal voltage V, when show be Mura pixel time, voltage selector 21 inputs another voltage V ', and which voltage of each pixel selection is determined by control signal 21.
Voltage selector 21 is allowed to correspond to different voltage by control signal (controlsignal) 51, for example: the picture element not having Mura, control signal is L, voltage selector 21 selects V1 ~ Vn as the reference voltage, otherwise there iing the pixel of Mura, control signal is H, and voltage selector 21 selects V1 ' ~ Vn ' as the reference voltage.
The voltage exported through voltage selector 21 turns dress parallel operation to DAC(D/A) 22, DAC(D/A turn dress parallel operation) 22 simultaneously receive time schedule controller export view data DATA, then data driver then by time schedule controller export data controlling signal CONT2 and picture signal DATA by DAC(D/A turn dress parallel operation) be converted to voltage after output to liquid crystal panel assembly.
As shown in Figure 7, when there is Mura in entirely black or entirely white LCD assembly, the pixel supposing to occur Mura is pixel 2(PX2) and pixel n-1(PXn-1), the present invention do not need change pixel 2(PX2) and pixel n-1(PXn-1) view data DATA, when the present invention exports data by time schedule controller 50, by exporting control signal (controlsignal) 51, set High (H) for having the picture element signal of Mura, the signal that Low (L) is normal pixel.At pixel 2(PX2) and pixel n-1(PXn-1) corresponding position, control signal (controlsignal) 51 is allowed to export as High (H), there is no the pixel of Mura, do not needing to eliminate location of pixels and be then set to Low (L).
Reference voltage is different, and the voltage of pixel charging is just different, and the briliancy of generation is just different, does not need to change view data DATA, but can change briliancy, under effectively solving traditional approach, cannot eliminate the problem of the Mura under black, white picture by method of the present invention.
Eliminate Mura by method of the present invention, draw following two kinds of effects.
The first is that the voltage changing Mura pixel makes the briliancy of its briliancy and normal pixel close.
Figure 8 shows that the schematic diagram of the V-Tcurve (voltage-penetrance curve) of normal pixel and Mura pixel, can be drawn by Fig. 8, normal pixel is different from the V-Tcurve (voltage-penetrance curve) of Mura pixel, when view data DATA is FFh (assuming that FFh is 11111111), a luminance difference is there is between normal pixel and Mura pixel, this luminance difference is △ T1, and luminance difference △ T1 is the luminance difference before eliminating Mura.By method proposed by the invention, when not changing view data DATA, change the briliancy of Mura pixel, make Mura briliancy close to the briliancy of normal pixel, through method of the present invention, luminance difference is △ T2, when △ T2 is far smaller than △ T1, representative eliminates Mura phenomenon.
The second is that the voltage of fine setting Mura pixel makes its briliancy equal with the voltage of normal pixel.
Figure 9 shows that the schematic diagram of the V-Tcurve (voltage-penetrance curve) of normal pixel and Mura pixel, can be drawn by Fig. 9, normal pixel is not identical with the V-T curve (voltage-penetrance curve) of Mura pixel, when view data DATA is FFh (assuming that FFh is 11111111), it is △ T1 that normal pixel and Mura pixel exist this luminance difference of luminance difference △ T1, and luminance difference △ T1 is the luminance difference before eliminating Mura.By method proposed by the invention, when not changing view data DATA, change the briliancy of Mura pixel and normal pixel, luminance difference △ T2 between two pixels is made to be 0, that is: there is not luminance difference between two pixels, as △ T2=0, representative eliminates Mura phenomenon.
When the present invention is not by changing view data DATA, reach the effect compensating Mura, improve liquid crystal corresponding speed, and the present invention not can only adjust for white picture, black picture 00h (00000000) or darker rank and brighter rank or any other GTG for view data, also same methods eliminates Mura, and the present invention can reduce Cell and scrap ratio, improves yields.
Claims (1)
1. eliminate the driving method of liquid crystal display Mura for one kind, liquid crystal display comprises: LCD assembly, be connected to data driver and the gate drivers of liquid crystal panel assembly, for the time schedule controller of control gate driver and data driver, it is characterized in that, liquid crystal display horizontal direction has m bar sweep trace, vertical direction has n bar data line, be combined into the liquid crystal display of a n*m pixel, sweep trace and data line intersect and limit multiple film crystal pipe unit, gate drivers is connected to sweep trace, data driver is connected to data line, described liquid crystal display is provided with control signal and voltage selector, D/A is provided with in described data driver, described control signal can differentiate normal pixel and Mura pixel, this method comprises the steps:
The first step: export control signal to voltage selector, this control signal can be used to differentiate normal pixel and Mura pixel, and control signal is by time schedule controller, and the voltage that selection one is suitable from voltage selector exports next stage to;
Second step: the voltage after voltage selector Drazin inverse to Mura pixel and normal voltage to normal pixel, voltage selector is located in data driver, the input voltage of voltage selector has multiple, each pixel has two voltages, when being normal pixel, voltage selector input normal voltage, when being Mura pixel, voltage selector inputs another voltage, which voltage of each pixel selection is determined by control signal, a luminance difference is there is between normal pixel and Mura pixel, luminance difference is the luminance difference before eliminating Mura, by changing the briliancy of Mura pixel, make Mura pixel briliancy close to the briliancy of normal pixel, through the briliancy of the voltage of the Mura pixel of voltage selector and the briliancy of normal pixel close,
3rd step: through voltage selector export voltage to D/A, D/A receive simultaneously time schedule controller export view data.
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CN103198801B (en) * | 2013-03-11 | 2015-02-04 | 深圳市华星光电技术有限公司 | Compensation method for flat display panel large-viewing-angle Mura area |
US9142190B2 (en) | 2013-03-11 | 2015-09-22 | Shenzhen China Star Optoelectronics Technology Co., Ltd | Method for compensating large view angle mura area of flat display panel |
CN103943077B (en) * | 2013-12-03 | 2017-01-04 | 厦门天马微电子有限公司 | The control method of a kind of display device driving voltage and display device |
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CN104575423B (en) * | 2014-12-31 | 2017-07-28 | 深圳市华星光电技术有限公司 | The driving method of liquid crystal panel |
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US10475371B2 (en) * | 2016-11-14 | 2019-11-12 | Int Tech Co., Ltd. | Pixel circuit in an electroluminescent display |
CN107024955B (en) * | 2017-05-31 | 2019-12-24 | 北京集创北方科技股份有限公司 | Voltage generating circuit and power supply device |
CN107742503A (en) * | 2017-10-20 | 2018-02-27 | 宏祐图像科技(上海)有限公司 | Demura method and system based on slr camera |
CN108109573A (en) | 2017-12-06 | 2018-06-01 | 深圳市华星光电半导体显示技术有限公司 | The update method of the Mura offset datas of display panel |
CN108538264B (en) * | 2018-04-04 | 2020-06-30 | 深圳市华星光电技术有限公司 | Mura compensation method and device of display panel |
CN108847170B (en) * | 2018-05-29 | 2021-06-25 | 信利(惠州)智能显示有限公司 | Display screen product detection method and detection device |
CN109686343B (en) * | 2019-01-21 | 2020-05-26 | 武汉精立电子技术有限公司 | Color Mura eliminating method |
CN110473506A (en) * | 2019-08-01 | 2019-11-19 | 深圳市华星光电技术有限公司 | Source electrode drive circuit, display panel, drive circuit and display |
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