CN103293810B - A kind of pixel configuration method of liquid crystal display - Google Patents
A kind of pixel configuration method of liquid crystal display Download PDFInfo
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- CN103293810B CN103293810B CN201310205600.7A CN201310205600A CN103293810B CN 103293810 B CN103293810 B CN 103293810B CN 201310205600 A CN201310205600 A CN 201310205600A CN 103293810 B CN103293810 B CN 103293810B
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Abstract
The invention provides a kind of pixel configuration method of liquid crystal display, the n+1 bar sweep trace that liquid crystal display comprises m+1 bar data line, intersect with corresponding data line and intersect the some pixel cells limited by this m+1 bar data line and n+1 bar sweep trace, each pixel cell comprises some sub-pixel unit, each sub-pixel unit is equipped with a TFT switchgear, the quantity of described sub-pixel unit is m*n, wherein, m and n is the natural number being greater than 1; First sub-pixel unit and second sub-pixel unit are one group; From the 3rd sub-pixel unit, it is one group with every four sub-pixel unit.The present invention is by the lower pixel arrangement used of row reversion setting, after display data being beforehand with storage and rearranging through drive circuit, make data driver can set reversion in column to go to drive pixel arrangement, because data line and TFT switchgear reconfigure, spacing color mixed extremely excellent Display panel effect can be reached.
Description
Technical field
The present invention relates to a kind of pixel configuration method of liquid crystal display.
Background technology
Fig. 1 and Figure 2 shows that the drives schematic diagram of available liquid crystal display, liquid crystal display comprises: liquid crystal panel assembly (PANEL) 10, the data driver (DataDriveIC) 20 being connected to liquid crystal panel assembly 10 and gate drivers (ScanDriveIC) 30, be connected to data driver 20 gray voltage generator (GammaVoltageGenerator) 40, for the time schedule controller (TCON) 50 of control gate driver 30 and data driver 20 and provide the DC-DC power supply (DC/DC) 60 of power supply for liquid crystal display.The liquid crystal that liquid crystal panel assembly 10 comprises mutually corresponding lower display panel and upper display panel and is folded between display panel and lower display panel.
Assuming that liquid crystal display has m bar data line 101 in the vertical direction, horizontal direction has n bar sweep trace 102, be combined into the liquid crystal display of a m*n pixel, sweep trace 102 intersects with data line 101 and limits multiple pixel cell, and each pixel cell includes three sub-pixel unit PX.Each sub-pixel unit PX comprises a TFT switchgear 103, liquid crystal capacitance and memory capacitance, TFT switchgear 103 comprises the grid (Gate) formed together with sweep trace 102, the source electrode (Source) be connected with data line 102 and the drain electrode (Drain) be connected with pixel electrode, and memory capacitance is connected to switchgear abreast.
Gate drivers 30 is connected to sweep trace G1 to Gn, and the signal that the gate-on voltage Von applied by external circuit and grid cut-off voltage Voff forms is applied to sweep trace G1 to Gn.Data driver 400 is positioned at the side of liquid crystal panel assembly 10, and is connected to all data line S0 to Sm lines.
Gray voltage generator 40 generates the grayscale voltage relevant to the transparency of pixel PX, and grayscale voltage is provided to each pixel PX, and grayscale voltage comprises positive polarity voltage relative to common electric voltage Vcom and reverse voltage.
Data driver 20 is connected to data line S0 to the Sm of liquid crystal panel assembly 10, and the gray-scale voltage produced by grayscale voltage generator 800 is applied to pixel PX as data voltage.
Time schedule controller 50 control gate driver 30 and data driver 20, time schedule controller 50 receives received image signal (R, G, B) and input control signal, with the display of control inputs picture signal, such as, signal DE can be made from vertical synchronizing signal Vsync, the horizontal-drive signal Hsync of external graphics controller (not shown), clock control signal DCLK and data.Time schedule controller 50 is according to the operating conditions of liquid crystal panel assembly 10, suitably process received image signal and input control signal, produce grid control signal CONT1 and data controlling signal CONT2, grid control signal CONT1 is sent to gate drivers 30, and the picture signal DAT of data controlling signal CONT2 and process is sent to data driver 20.
Grid control signal CONT1 comprises scanning initialize signal STV and when exports gate-on voltage Von with initialization scan and at least one clock signal with control.Grid control signal CONT1 can also comprise output enable signal OE to define the duration (duration) of gate-on signal Von.
Data controlling signal CONT2 comprises beginning that horizontal-drive signal STH transmits for the data of one group of pixel with notification data driver 20, be loaded into signal LOAD is applied to S1 to Sn and data clock signal HCLK with designation data driver 20 by data voltage.Data controlling signal CONT2 can also comprise reverse signal RSV with the polarity relative to common electric voltage Vcom reversal data voltage.
Liquid crystal display described by Fig. 1, by received image signal (R, G, B) and input timing control signal, with the display of control inputs picture signal.
Figure 2 shows that an interchange type of drive for reversion, each sub-pixel unit includes a TFT switchgear 203, define each sub-pixel unit there is upper left, sit down, upper right, optional position, four, bottom right, being row along the direction that sweep trace 202 extends, is row along the direction that data line 201 extends.
Each TFT switchgear 103 is connected to the position that each data line 101 intersects with each sweep trace 102, that is: each TFT switchgear 103 is positioned at the lower left of corresponding sub-pixel unit, the interchange type of drive of some reversion is meant under same frame picture, each point (sub-pixel) up and down four points (sub-pixel) adjacent with oneself keep contrary polarity, under an ensuing frame picture, the polarity of voltage of all sub-pixels reverses simultaneously, and adjacent subpixels continues to keep contrary polarity.Dotted line 104 in Fig. 2 is reference voltage Vcom of liquid crystal deflecting element, and positive polarity represents driving voltage and is greater than this reference voltage Vcom104, and negative polarity represents driving voltage and is less than this reference voltage Vcom104.
Fig. 2 is that available data driver adopts the driving of some inversion mode to reach preferably spacing color mixed, but some inversion mode drives its shortcoming to be that power problems causes data driver working temperature to rise.Figure 3 shows that the equivalence of whole piece data line 101 equivalent circuit diagram becomes resistance and electric capacity connecting circuit, the source electrode driver signal output waveform of some inversion mode is 105 in Fig. 3, the equivalent resistance of each TFT switchgear 103 is Rx, the electric capacity of the reference voltage Vcom of liquid crystal analysis deflection is Cx, the gate off voltage of switchgear 103 is Vgl, the electric capacity that grid connects is Ck, the power that data line 101 consumes is P is 1/2*V^2*C*f, and wherein f is data driver output voltage fluctuation frequency; V is data driver output voltage fluctuation amount; C is Cxt//Ckt.
Another shortcoming of point inversion mode type of drive is the distortion of data driver output waveform and delay and TFT switchgear effective duration of charging is shortened, data driver output waveform postpones relevant with Rx (Total) & C, RC is larger, and delay is larger, RC size configure with data line or processing procedure relevant.
Each data driver output waveform of some inversion mode all really will could drive pixel by TFT, so each data driver output waveform all can affect by this waveform delay after this waveform delay.TFT drives the valid pixel time certainly also just to shorten, if under high frequency figure frame drives, this data driver output waveform delay can cause very serious undercharge problem.
Although existing row inversion driving mode can improve above-mentioned some inversion driving mode institute produced problem, Figure 4 shows that the schematic diagram of existing row inversion driving mode, row inversion driving mode is that unit positive-negative polarity reverses by sub-pixel corresponding on adjacent data line with row, but the problem that row inversion driving mode type of drive produces is vertical bar sense problem, vertical bar sense reason is that vertical whole piece data line is all identical polar, adjacent data line whole piece is also all identical polar and different from adjacent polarity, generally, the positive and negative driving voltage of lower panel has narrow difference, positive and negative driving voltage difference can produce the bright dark existing picture of liquid crystal panel (that is: easily causing longitudinal line flicker), vertical bar sense is produced because positive and negative driving voltage difference configures with vertical whole piece identical polar.
Therefore, need to propose a kind of new liquid crystal drive mode.
Summary of the invention
The present invention proposes to arrange the lower pixel configuration method used of reversion setting, by drive circuit display data are beforehand with store with rearrange after, data line can be set pixel configuration method that the liquid crystal display of driving pixel arrangement is gone in reversion in column.
The invention provides a kind of pixel configuration method of liquid crystal display, the n+1 bar sweep trace that liquid crystal display comprises m+1 bar data line, intersect with corresponding data line and intersect the some pixel cells limited by this m+1 bar data line and n+1 bar sweep trace, each pixel cell comprises some sub-pixel unit, each sub-pixel unit is equipped with a TFT switchgear, the quantity of described sub-pixel unit is m*n, wherein, m and n is the natural number being greater than 1.
Wherein, the direction defined along data line is defined as upper downward-extension and column direction extension, m+1 bar data line from left to right be sequentially numbered Y0, Y1, Y2, ┄ Ym, direction along sweep trace be defined as left and right extend and line direction extension, n+1 bar sweep trace from top to bottom be sequentially numbered G0, G1, G2, ┄ Gn; For the sub-pixel unit of odd-numbered line, first sub-pixel unit and second sub-pixel unit are one group, the TFT switchgear of first sub-pixel unit is positioned at the upper left side of this sub-pixel unit, and the TFT switchgear of the second sub-pixel unit is positioned at the upper right side of this sub-pixel unit; From the 3rd sub-pixel unit, it is one group with every four sub-pixel unit, wherein, first, the 3rd, the 4th the sub-pixel unit TFT switchgear separately of these four sub-pixel unit is all positioned at the top of corresponding sub-pixel unit, and the TFT switchgear of second sub-pixel unit of these four sub-pixel unit is positioned at the below of this sub-pixel unit; For the sub-pixel unit of even number line, first sub-pixel unit and second sub-pixel unit are one group, the TFT switchgear of first sub-pixel unit is positioned at the lower right of this sub-pixel unit, and the TFT switchgear of the second sub-pixel unit is positioned at the upper left side of this sub-pixel unit; From the 3rd sub-pixel unit, it is one group with every four sub-pixel unit, wherein, first, second, third sub-pixel unit TFT switchgear separately of these four sub-pixel unit is all positioned at the top of corresponding sub-pixel unit, and the TFT switchgear of the 4th sub-pixel unit of these four sub-pixel unit is positioned at the below of this sub-pixel unit.
The present invention is by the lower pixel arrangement used of row reversion setting, after display data being beforehand with storage and rearranging through drive circuit, make data driver can set reversion in column to go to drive pixel arrangement, because data line and TFT switchgear reconfigure, spacing color mixed extremely excellent Display panel effect can be reached.
Accompanying drawing explanation
Fig. 1 is the drives schematic diagram of available liquid crystal display;
Fig. 2 is the driving schematic diagram of existing some inversion driving mode;
Fig. 3 is the equivalent electrical circuit of the data line under the some inversion driving mode shown in Fig. 2;
Fig. 4 is the driving schematic diagram of existing row inversion driving mode;
Fig. 5 is the configuration schematic diagram of the TFT switchgear of liquid crystal display of the present invention;
Another schematic diagram of configuration that Fig. 6 is the switchgear of TFT shown in Fig. 5;
The another schematic diagram of configuration that Fig. 7 is the switchgear of TFT shown in Fig. 5;
Fig. 8 is the data pre-storage of liquid crystal display of the present invention and the schematic diagram rearranged.
Embodiment
Below in conjunction with the drawings and specific embodiments, illustrate the present invention further, these embodiments should be understood only be not used in for illustration of the present invention and limit the scope of the invention, after having read the present invention, the amendment of those skilled in the art to the various equivalent form of value of the present invention has all fallen within the application's claims limited range.
Be the configuration schematic diagram of the TFT switchgear of liquid crystal display of the present invention as shown in Figure 5 and Figure 6, the present invention discloses a kind of m*n matrix type liquid crystal display panel 200, it comprises: (m+1) bar data line 201, (n+1) bar sweep trace 202, and intersect by this (m+1) bar data line 201 and (n+1) bar sweep trace 202 several pixel cells limited, described each pixel cell includes some sub-pixel unit, in the present embodiment, pixel cell includes three sub-pixel unit P, be respectively R sub-pixel unit, G sub-pixel unit, B sub-pixel unit, wherein, the number of sub-pixel unit is m*n, wherein, m and n is the natural number being greater than 1, that is: (m+1) bar data line 201 and (n+1) bar sweep trace 202 intersection define m*n sub-pixel unit P, namely also this display panels 200 is compared with the existing, many a data line and sweep trace.
As shown in Figure 1, each data line 201 connection data driver, each sweep trace 202 connects gate drivers.
(m+1) bar data line 201 is sequentially numbered Y0, Y1, Y2, ┄ Ym in Figure 5, (n+1) bar sweep trace 202 is sequentially numbered G0, G1, G2, ┄ Gn in fig. 5 and fig., in the present embodiment, defining the direction extended along sweep trace 202 is row, is row along the direction that data line 201 extends.
In the present invention, the position of sub-pixel unit P is defined: the vertical direction extended along data line 201 is defined as up and down, the horizontal direction extended along sweep trace 202 is defined as left and right, so has upper left for arbitrary sub-pixel unit P, sits down, upper right, four, bottom right position relationship.
Each sub-pixel unit includes a TFT switchgear 203, in the present invention, TFT switchgear 203 can be positioned at sub-pixel unit P upper left, sit down, upper right, optional position, four, bottom right, often go sub-pixel unit be one group with three sub-pixel unit: be respectively R sub-pixel unit, G sub-pixel unit, B sub-pixel unit repeated arrangement.
As Fig. 5 to Fig. 7, in the present invention, in the row direction, positive-negative polarity reversion in units of two sub-pixel unit; In a column direction, adjacent two row sub-pixel unit up and down are also direction positive-negative polarity reversion with row.
TFT switchgear 203 is described below at the position relationship of the sub-pixel unit P of correspondence: for the sub-pixel unit of odd-numbered line, first sub-pixel unit and second sub-pixel unit are one group, the TFT switchgear of first sub-pixel unit is positioned at the upper left side of this sub-pixel unit, and the TFT switchgear of the second sub-pixel unit is positioned at the upper right side of this sub-pixel unit, from the 3rd sub-pixel unit, because the respective position relationship of TFT switchgear in corresponding sub-pixel unit of every four sub-pixel unit is identical, therefore be one group with every four sub-pixel unit, wherein, first of these four sub-pixel unit, 3rd, 4th sub-pixel unit TFT switchgear separately is all positioned at the top of corresponding sub-pixel unit, the TFT switchgear of second sub-pixel unit of these four sub-pixel unit is positioned at the below of this sub-pixel unit, particular location is: the TFT switchgear of first sub-pixel unit of these four sub-pixel unit is positioned at the upper right side of this sub-pixel unit, the TFT switchgear of second sub-pixel unit of these four sub-pixel unit is positioned at the upper left side of this sub-pixel unit, the TFT switchgear of the 3rd sub-pixel unit of these four sub-pixel unit is positioned at the upper left side of this sub-pixel unit, the TFT switchgear of the 4th sub-pixel unit of these four sub-pixel unit is positioned at the upper right side of this sub-pixel unit.
For the sub-pixel unit of even number line, first sub-pixel unit and second sub-pixel unit are one group, the TFT switchgear of first sub-pixel unit is positioned at the lower right of this sub-pixel unit, and the TFT switchgear of the second sub-pixel unit is positioned at the upper left side of this sub-pixel unit, from the 3rd sub-pixel unit, it is one group with every four sub-pixel unit, wherein, first of these four sub-pixel unit, second, 3rd sub-pixel unit TFT switchgear separately is all positioned at the top of corresponding sub-pixel unit, the TFT switchgear of the 4th sub-pixel unit of these four sub-pixel unit is positioned at the below of this sub-pixel unit, particular location is: the TFT switchgear of first of these four sub-pixel unit and second sub-pixel unit is all positioned at the upper left side of respective sub-pixel unit, the TFT switchgear of the 3rd sub-pixel unit of these four sub-pixel unit is positioned at the upper right side of this sub-pixel unit, the TFT switchgear of the 4th sub-pixel unit of these four sub-pixel unit is positioned at the lower left of this sub-pixel unit.
According to the above position relationship of TFT switchgear in respective sub-pixel unit P described, be arranged in the schematic diagram shown in Fig. 5 and Fig. 6.
For odd-numbered line, to intersect m the sub-pixel unit limited between Article 1 sweep trace G0 and Article 2 sweep trace G1, a TFT switchgear 203 is provided with in each sub-pixel unit, first sub-pixel unit and the second sub-pixel unit are one group, from the 3rd sub-pixel unit, it is one group with every four sub-pixel unit, the position that described TFT switchgear 203 is arranged is: first TFT switchgear is arranged at Y0 data line and G0 sweep trace infall, second TFT switchgear is arranged at Y2 data line and G0 sweep trace infall, 3rd TFT switchgear is arranged at Y3 data line and G0 sweep trace infall, 4th TFT switchgear is arranged at Y3 data line and G1 sweep trace infall, 5th TFT switchgear is arranged at Y4 data line and G0 sweep trace infall, 6th TFT switchgear is arranged at Y6 data line and G0 sweep trace infall, four TFT switchgears between from the 3rd TFT switchgear to the 6th TFT switchgear are one group, sequentially analogize later, as the 7th to the tenth TFT switchgear, the ten one to ten four TFT switchgears, etc. be all the infall being arranged at data line and sweep trace according to mode described above.
For even number line, to intersect m the sub-pixel unit limited between Article 2 sweep trace G1 and Article 3 sweep trace G2, a TFT switchgear 203 is provided with in each sub-pixel unit, first sub-pixel unit and the second sub-pixel unit are one group, from the 3rd sub-pixel unit, it is one group with every four sub-pixel unit, the position that described TFT switchgear 203 is arranged is: first TFT switchgear is arranged at Y1 data line and G2 sweep trace infall, second TFT switchgear is arranged at Y1 data line and G1 sweep trace infall, 3rd TFT switchgear is arranged at Y2 data line and G1 sweep trace infall, 4th TFT switchgear is arranged at Y4 data line and G1 sweep trace infall, 5th TFT switchgear is arranged at Y5 data line and G1 sweep trace infall, 6th TFT switchgear is arranged at Y5 data line and G2 sweep trace infall, four TFT switchgears between from the 3rd TFT switchgear to the 6th TFT switchgear are one group, sequentially analogize later, as the 7th to the tenth TFT switchgear, the ten one to ten four TFT switchgears, etc. be all the infall being arranged at data line and sweep trace according to mode described above.
Data line is connected to data driver, under some figure frame times, data driver output cathode voltage drives the vertical sub-pixel unit of whole piece, and next figure frame time, data driver output negative pole voltage drives the vertical sub-pixel unit of whole piece, otherwise or data driver output polarity, the rest may be inferred.Dotted line 204 in Fig. 5 is reference voltage Vcom of liquid crystal deflecting element, and positive polarity represents driving voltage and is greater than this reference voltage Vcom204, and negative polarity represents driving voltage and is less than this reference voltage Vcom204.
As shown in Figure 5 and Figure 6, the Article 2 data line Y2201 of m*n matrix type liquid crystal display panel 200 of the present invention is under certain figure frame, its data driver output signal voltage 205 is greater than reference voltage Vcom204, and that is the equal output cathode voltage of data driver drive Article 2 data line Y2201 goes to drive pixel liquid crystal; And its adjacent Article 3 data line Y3201 is under same figure frame, its output signal voltage is all less than reference voltage Vcom204, and that is the equal output negative pole voltage of data driver drive Article 3 data line Y3201 goes to drive pixel liquid crystal.
According to above-mentioned explanation, TFT switchgear 203 is configured in intersect between data line 201 and corresponding sweep trace 202 and limits, number from the sub-pixel unit between the 0th article of sweep trace G0 and Article 1 sweep trace G1 and be sequentially: R11, G11, B11, R21, G21, B21, R31, G31, B31 ┄ Rx1, Gx1, Bx1(x represent which pixel cell of line direction, and 1 represents the first row); So the sub-pixel unit numbering of the second row is sequentially which pixel cell that R12, G12, B12, R22, G22, B22, R32, G32, B32 ┄ Rx2, Gx2, Bx2(x represent line direction, and 2 represent the second row); The xth pixel cell that ┄, y are capable be numbered Rxy, Gxy, Bxy.
Illustrate and between the sweep trace 202 that Article 2 data line Y2201 and its intersect, to intersect TFT switchgear 203 allocation position limited: Article 2 data line Y2 and the 0th article of sweep trace G0 intersect the local TFT switchgear configured in G sub-pixel unit G11; Article 2 data line Y2 and Article 1 sweep trace G1 intersect the local TFT switchgear configured in B sub-pixel unit B12; Article 2 data line Y2 and Article 2 sweep trace G2 intersect the local TFT switchgear configured in G sub-pixel unit G13; Article 2 data line Y2 and Article 3 sweep trace G3 intersect the local TFT switchgear configured in B sub-pixel unit B14, and this analogizes.So Article 2 data line Y2 all driving liquid crystal pixel voltage 205 under a certain figure frame is positive voltage, the driving setting of this Article 2 data line Y2 is exactly so-called row inversion driving mode, if display frame is complete white picture, Article 2 data line Y2 drives whole piece vertical pixel G11B12G13B14 ┄ G1yB1(y+1) pixel such as (wherein, y represents the capable pixel cell of y) is all identical voltage in same figure frame.
Due to the present invention many a data line and sweep trace, therefore display data prestore and rearrange by time schedule controller, the front and back comparison diagram that Figure 8 shows that data pre-storage and rearrange, upper end 10 represents available data and prestores, and lower end 200 represents data pre-storage of the present invention.
Existing representated by upper end 10 have Y1 to Ym bar data line and G1 to Gn bar sweep trace, time schedule controller is shown data and is prestored and film making, between the data line Y1 to Ym that Article 1 sweep trace G1 intersects with it, signal data is arranged as: R11G11B11R21G21B21 ... Rx1Gx1Bx1(x represents which pixel cell of line direction, 1 represents the first row), this display data input timing controller prestores and rearranges; Between the data line Y1 to Ym that Article 2 sweep trace G2 intersects with it, signal data is arranged as: R12, G12, B12, R22, G22, B22 ..., Rx2, Gx2, Bx2(x represent which pixel cell of line direction, 2 represent the second row), this display data input timing controller prestores and rearranges; Between the data line Y1 to Ym that y article of sweep trace Gy intersects with it, signal data is arranged as: R1y, G1y, B1y, R2y, G2y, B2y ..., Rxy, Gxy, Bxy(x represent which pixel cell of line direction, it is capable that y represents y), this display data input timing controller prestores and rearranges.
Lower end 200 represents data pre-storage of the present invention, time schedule controller exports after display data permutation, according to description above, for the sub-pixel unit of every a line, first sub-pixel unit and second sub-pixel unit are one group, from the 3rd sub-pixel unit, it is one group with every four sub-pixel unit.Between the data line Y0 to Ym that the 0th article of sweep trace G0 intersects with it, signal data is arranged as: R11, sky, G11, B11, G21, sky, B21, R31, B31, sky, R41, G41, R51, sky ... that is: except the first two data, other the 4th signal data after three signal data are empty, also namely: the signal data between sweep trace G0 and data line Y0 is R11, the signal data between sweep trace G0 and data line Y1 is empty; From sweep trace G0 and data line Y2 to Y5, be one group with four data lines, the 4th the signal data between data line and sweep trace G0 is empty.
Between the data line Y0 to Ym that Article 1 sweep trace G1 intersects with it, signal data is arranged as: sky, G12, B12, R21, R22, G22, R32, G31, G32, B32, G42, B41 ..., also namely: the signal data between the sweep trace of even number and data line Y0 is empty.
Between the data line Y0 to Ym that Article 2 sweep trace G2 intersects with it, signal data is arranged as: R13, R12, G13, B13, G23, B22, B23, R33, B33, R42, R43, G43, R53 ... also namely: except sweep trace G0, signal data is all had between other odd-numbered scan lines and data line line Y0 to Ym.
Cause pixel to show bright dark problem due to the positive and negative driving voltage otherness between pixel, new pixel arrangement makes positive and negative driving picture element do the mixed configuration in space, the bright dark mixed function of reachable tree, human eye cannot be discovered positive and negative driving otherness and cause picture element to show bright dark problem.
The present invention is by the lower pixel arrangement used of row reversion setting, after display data being beforehand with storage and rearranging through drive circuit, make data driver can set reversion in column to go to drive pixel arrangement, because data line and TFT switchgear reconfigure, spacing color mixed extremely excellent Display panel effect can be reached.
By the present invention, tool has the following advantages:
1, liquid crystal display-driving power consumption is compared a reversion and is saved maximum about 30%;
2, to compare a reversion low about 30 degree for data line actuation temperature;
3, the lower vertical Crosstalk of row reversion can improve;
4, in liquid crystal display, the particular arrangement of TFT switchgear improves the vertical bar sense arranging and reverse and bring;
5, row reversion drives the charging problems of lower TFT switchgear to improve.
Claims (7)
1. the pixel configuration method of a liquid crystal display, liquid crystal display comprises m+1 bar data line, the n+1 bar sweep trace intersected with corresponding data line, and intersect by this m+1 bar data line and n+1 bar sweep trace the some pixel cells limited, each pixel cell comprises some sub-pixel unit, each sub-pixel unit is equipped with a TFT switchgear, it is characterized in that: the quantity of described sub-pixel unit is m*n, wherein, m and n is the natural number being greater than 1, the direction defined along data line is defined as upper downward-extension and column direction extension, m+1 bar data line from left to right be sequentially numbered Y0, Y1, Y2, Ym, direction along sweep trace is defined as left and right and extends and line direction extension, n+1 bar sweep trace from top to bottom be sequentially numbered G0, G1, G2, Gn, for the sub-pixel unit of odd-numbered line, first sub-pixel unit and second sub-pixel unit are one group, the TFT switchgear of first sub-pixel unit is positioned at the upper left side of this sub-pixel unit, and the TFT switchgear of the second sub-pixel unit is positioned at the upper right side of this sub-pixel unit, from the 3rd sub-pixel unit, it is one group with every four sub-pixel unit, wherein, first, the 3rd, the 4th the sub-pixel unit TFT switchgear separately of these four sub-pixel unit is all positioned at the top of corresponding sub-pixel unit, and the TFT switchgear of second sub-pixel unit of these four sub-pixel unit is positioned at the below of this sub-pixel unit, for the sub-pixel unit of even number line, first sub-pixel unit and second sub-pixel unit are one group, the TFT switchgear of first sub-pixel unit is positioned at the lower right of this sub-pixel unit, and the TFT switchgear of the second sub-pixel unit is positioned at the upper left side of this sub-pixel unit, from the 3rd sub-pixel unit, it is one group with every four sub-pixel unit, wherein, first, second, third sub-pixel unit TFT switchgear separately of these four sub-pixel unit is all positioned at the top of corresponding sub-pixel unit, and the TFT switchgear of the 4th sub-pixel unit of these four sub-pixel unit is positioned at the below of this sub-pixel unit.
2. the pixel configuration method of liquid crystal display according to claim 1, it is characterized in that: described odd-numbered line is from the 3rd sub-pixel unit, it is one group with every four sub-pixel unit, the position of the respective TFT switchgear of these four sub-pixel unit is: the TFT switchgear of first sub-pixel unit of these four sub-pixel unit is positioned at the upper right side of this sub-pixel unit, the TFT switchgear of second sub-pixel unit of these four sub-pixel unit is positioned at the upper left side of this sub-pixel unit, the TFT switchgear of the 3rd sub-pixel unit of these four sub-pixel unit is positioned at the upper left side of this sub-pixel unit, the TFT switchgear of the 4th sub-pixel unit of these four sub-pixel unit is positioned at the upper right side of this sub-pixel unit, described even number line is from the 3rd sub-pixel unit, it is one group with every four sub-pixel unit, the position of the respective TFT switchgear of these four sub-pixel unit is: the TFT switchgear of first of these four sub-pixel unit and second sub-pixel unit is all positioned at the upper left side of respective sub-pixel unit, the TFT switchgear of the 3rd sub-pixel unit of these four sub-pixel unit is positioned at the upper right side of this sub-pixel unit, and the TFT switchgear of the 4th sub-pixel unit of these four sub-pixel unit is positioned at the lower left of this sub-pixel unit.
3. the pixel configuration method of liquid crystal display according to claim 2, it is characterized in that: intersect between sweep trace G0 and sweep trace G1 limit m sub-pixel unit, the position that TFT switchgear between sweep trace G0 and sweep trace G1 is arranged is: first TFT switchgear is arranged at Y0 data line and G0 sweep trace infall, second TFT switchgear is arranged at Y2 data line and G0 sweep trace infall, 3rd TFT switchgear is arranged at Y3 data line and G0 sweep trace infall, 4th TFT switchgear is arranged at Y3 data line and G1 sweep trace infall, 5th TFT switchgear is arranged at Y4 data line and G0 sweep trace infall, 6th TFT switchgear is arranged at Y6 data line and G0 sweep trace infall, four TFT switchgears between from the 3rd TFT switchgear to the 6th TFT switchgear are one group, sequentially analogize later, also intersect between sweep trace G1 and sweep trace G2 limit m sub-pixel unit, the position that TFT switchgear between sweep trace G1 and sweep trace G2 is arranged is: first TFT switchgear is arranged at Y1 data line and G2 sweep trace infall, second TFT switchgear is arranged at Y1 data line and G1 sweep trace infall, 3rd TFT switchgear is arranged at Y2 data line and G1 sweep trace infall, 4th TFT switchgear is arranged at Y4 data line and G1 sweep trace infall, 5th TFT switchgear is arranged at Y5 data line and G1 sweep trace infall, 6th TFT switchgear is arranged at Y5 data line and G2 sweep trace infall, four TFT switchgears between from the 3rd TFT switchgear to the 6th TFT switchgear are one group, sequentially analogize later.
4. the pixel configuration method of liquid crystal display arbitrary according to claim 1-3, is characterized in that: in the row direction, positive-negative polarity reversion in units of two sub-pixel unit; In a column direction, adjacent two row sub-pixel unit up and down are also direction positive-negative polarity reversion with row.
5. the pixel configuration method of liquid crystal display arbitrary according to claim 1-3, it is characterized in that: described data line is connected to data driver, under some figure frame times, data driver output cathode voltage drives the vertical sub-pixel unit of whole piece, and next figure frame time, data driver output negative pole voltage drives the vertical sub-pixel unit of whole piece, otherwise or data driver output polarity, the rest may be inferred.
6. the pixel configuration method of liquid crystal display arbitrary according to claim 1-3, it is characterized in that: after time schedule controller will show data permutation, Output rusults is as follows: have signal data R11 between sweep trace G0 and data line Y0, the signal data between sweep trace G0 and data line Y1 is empty; From sweep trace G0 and data line Y2 to Y5, be one group with four data lines, the 4th the signal data between data line and sweep trace G0 is empty; Signal data between the sweep trace of even number and data line Y0 is empty; Except sweep trace G0, between other odd-numbered scan lines and data line line Y0 to Ym, all there is signal data.
7. the pixel configuration method of liquid crystal display according to claim 6, it is characterized in that: TFT switchgear is configured in and intersects restriction between data line and corresponding sweep trace, each pixel cell comprises three sub-pixel unit P, respectively: be R sub-pixel unit, G sub-pixel unit, B sub-pixel unit; The xth pixel cell that y is capable be numbered Rxy, Gxy, Bxy.
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| CN105185326B (en) | 2015-08-12 | 2017-10-17 | 深圳市华星光电技术有限公司 | A kind of liquid crystal display panel and its drive circuit |
| CN111312181B (en) * | 2018-12-12 | 2022-01-04 | 咸阳彩虹光电科技有限公司 | Pixel matrix driving device, liquid crystal display and pixel matrix driving method |
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