CN111312181B - Pixel matrix driving device, liquid crystal display and pixel matrix driving method - Google Patents
Pixel matrix driving device, liquid crystal display and pixel matrix driving method Download PDFInfo
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- CN111312181B CN111312181B CN201811521101.8A CN201811521101A CN111312181B CN 111312181 B CN111312181 B CN 111312181B CN 201811521101 A CN201811521101 A CN 201811521101A CN 111312181 B CN111312181 B CN 111312181B
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3614—Control of polarity reversal in general
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3685—Details of drivers for data electrodes
Abstract
The invention discloses a pixel matrix driving device, comprising: the time schedule controller is used for receiving the first polarity digital signal and rearranging the position of the polarity position corresponding to the first polarity digital signal to obtain a second polarity digital signal; and the source electrode driving circuit is used for carrying out polarity conversion and position recovery on the second polarity digital signal to obtain a first polarity conversion signal. According to the pixel matrix driving device, the position rearrangement of the first polarity digital signals is realized through the time sequence controller to obtain the second polarity digital signals, the polarity conversion and the position recovery are carried out on the second polarity digital signals after the position rearrangement through the source electrode driving circuit, the output first polarity conversion signals are output to the corresponding positions of the display panel, the pixel matrix driving device is suitable for a traditional polarity inversion mode and an interlaced polarity inversion mode, the phenomenon of horizontal equidistant transverse striations of the display panel is reduced, and the working temperature of a driving chip can be reduced.
Description
Technical Field
The invention belongs to the field of display, and particularly relates to a pixel matrix driving device, a liquid crystal display and a pixel matrix driving method.
Background
With the development of Display technology, Liquid Crystal Displays (LCDs) have advantages of light weight, thinness, and low radiation, and are gradually replacing Cathode Ray Tube (CRT) Display devices, and becoming the most common Display devices in information terminals such as computers, smart phones, mobile phones, car navigation devices, and electronic books.
In the liquid crystal panel display driving signal, usually, in order to prevent the characteristic solidification of the liquid crystal molecules, an alternating current driving method is adopted for driving, and a dot inversion driving method, a column inversion driving method, a row inversion driving method and a 1+2line inversion driving method are commonly used, wherein the 1+2line inversion driving method has better display quality and slightly lower power consumption than the dot inversion driving method, and is the most commonly used inversion driving method at present. However, in the case of the 1+2line inversion driving method, the operating temperature of the driving chip can reach 120 ℃ or even exceed 120 ℃, so that the operating temperature of the driving chip has to be reduced by a step of attaching a heat sink, which increases the production cost of the entire panel. Therefore, at present, an N line inversion driving method is increasingly used, and the temperature reduction of the driving chip during operation is more remarkable as the value of N is larger.
However, the output of the N Line inversion driving method in one frame of image is a reversed polarity of a timing cycle, and a problem of insufficient pixel charging occurs due to an RC (Resistance Capacitance) delay effect, thereby causing a phenomenon of horizontal equidistant stripes on the liquid crystal panel, and the phenomenon of the horizontal equidistant stripes becomes more obvious as the N value is larger.
Disclosure of Invention
In order to solve the above problems in the prior art, the present invention provides a pixel matrix driving apparatus, a liquid crystal display, and a pixel matrix driving method. The technical problem to be solved by the invention is realized by the following technical scheme:
an embodiment of the present invention provides a pixel matrix driving apparatus, including:
the time schedule controller is used for receiving a first polarity digital signal and rearranging the position of a polarity position corresponding to the first polarity digital signal to obtain a second polarity digital signal;
and the source electrode driving circuit is used for carrying out polarity conversion and position recovery on the second polarity digital signal to obtain a first polarity conversion signal.
In one embodiment, the timing controller includes a plurality of storage units, each of the storage units includes N storages, the first polarity digital signal includes a plurality of sub-polarity digital signals, and each of the storages is configured to receive 1 sub-polarity digital signal according to a preset rule.
In one embodiment, the source driving circuit includes:
the polarity conversion unit is used for carrying out polarity conversion on the second polarity digital signal to obtain a second polarity conversion signal;
and the switch recovery unit is used for carrying out position recovery on the second polarity conversion signal according to the position of the first polarity digital signal to obtain a first polarity conversion signal.
In a specific embodiment, the polarity conversion unit includes N polarity conversion modules, and the polarity conversion module includes a positive polarity conversion module and a negative polarity conversion module; when the X-th stage polarity conversion module is a positive polarity conversion module, the X + 1-th stage polarity conversion module is a negative polarity conversion module, wherein N, X are positive integers, and X is greater than or equal to 1 and less than or equal to N.
In a specific embodiment, the switch recovery unit includes N switch recovery modules, the second polarity-converted signal includes a plurality of sub-polarity-converted signals, and the switch recovery module is configured to perform position recovery on the sub-polarity-converted signals according to a position of the first polarity-converted digital signal.
In a specific embodiment, the switch recovery module of the xth stage includes a plurality of switches, an input terminal of each switch is connected to the polarity conversion module of the xth stage, and an output terminal of each switch is used for controlling the polarity of different digital signals of the first polarity.
In a specific embodiment, the source driving circuit further includes a data latch unit and a level shift unit, the data latch unit includes N data latches, the level shift unit includes N level shifters, and the xth stage data latch and the xth stage level shifter are sequentially connected between the xth stage storage and the xth stage polarity shift module.
In a specific embodiment, the source driving circuit further includes an output buffer unit, where the output buffer unit includes N output buffers, and the output buffer of the X-th stage is connected between the polarity conversion module of the X-th stage and the switch recovery module of the X-th stage.
The invention also provides a pixel matrix driving method, which comprises the following steps:
receiving a first polarity digital signal, and rearranging the position of a polarity position corresponding to the first polarity digital signal to obtain a second polarity digital signal;
and performing polarity conversion and position recovery on the second polarity digital signal to obtain a first polarity conversion signal.
The invention also provides a liquid crystal display which comprises the pixel matrix driving device.
Compared with the prior art, the invention has the beneficial effects that:
the pixel matrix driving device realizes the position rearrangement of the first polarity digital signal through the time schedule controller to obtain a second polarity digital signal, and carries out polarity conversion and position recovery on the second polarity digital signal after the position rearrangement through the source electrode driving circuit to obtain a first polarity conversion signal, so that the output first polarity conversion signal is output to the corresponding position of the display panel, and the pixel matrix driving device is not only suitable for the traditional polarity inversion mode, but also suitable for the staggered polarity inversion mode, thereby reducing the phenomenon of horizontal equidistant cross striations of the display panel and reducing the working temperature of the driving chip.
Drawings
Fig. 1 is a schematic structural diagram of a pixel matrix driving device according to an embodiment of the invention;
fig. 2 is a schematic structural diagram of a pixel unit according to an embodiment of the present invention;
FIG. 3 is a diagram illustrating a driving signal output result according to an embodiment of the present invention;
fig. 4 is a schematic structural diagram of a timing controller according to an embodiment of the present invention;
fig. 5 is a schematic diagram of a source driving circuit according to an embodiment of the invention.
Detailed Description
The present invention will be described in further detail with reference to specific examples, but the embodiments of the present invention are not limited thereto.
It will be understood that when an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present. The terms "vertical," "horizontal," "left," "right," and the like as used herein are for illustrative purposes only and do not represent the only embodiments.
Example one
Referring to fig. 1, fig. 1 is a schematic structural diagram of a pixel matrix driving device according to an embodiment of the invention. The pixel matrix driving device of the present embodiment includes:
the time schedule controller is used for receiving a first polarity digital signal and rearranging the position of a polarity position corresponding to the first polarity digital signal to obtain a second polarity digital signal;
and the source electrode driving circuit is used for carrying out polarity conversion and position recovery on the second polarity digital signal to obtain a first polarity conversion signal.
According to the pixel matrix driving device, the position rearrangement of the first polarity digital signal is realized through the time sequence controller to obtain the second polarity digital signal, the polarity conversion and the position recovery are carried out on the second polarity digital signal subjected to the position rearrangement through the source electrode driving circuit to obtain the first polarity conversion signal, and the output first polarity conversion signal is output to the corresponding position of the display panel, so that the pixel matrix driving device is suitable for a traditional polarity inversion mode and an interlaced polarity inversion mode, the phenomenon of horizontal equidistant cross striations of the display panel is reduced, and the working temperature of a driving chip can be reduced.
The pixel matrix driving device of the embodiment of the invention is not only suitable for a dot inversion driving mode, a column inversion driving mode, a row inversion driving mode, a 1+2Line inversion driving mode and an N Line inversion driving mode, but also suitable for an interlaced polarity inversion mode, wherein the interlaced polarity inversion mode means that different polarity inversion positions are arranged between the sub-pixel of the i-th column and the sub-pixel of the i + 1-th column of a pixel matrix, concretely, the liquid crystal display panel comprises a plurality of columns of parallel data lines and a plurality of rows of parallel scanning lines, the plurality of columns of data lines and the plurality of rows of scanning lines are mutually and vertically crossed, the plurality of columns of data lines and the plurality of rows of scanning lines are crossed to form an x-row and y-column pixel matrix arranged in a matrix mode, x and y are positive integers, wherein, different polarity inversion positions are arranged between the sub-pixel of the i-th column and the sub-1-th column of the pixel, wherein 0< i < x.
Specifically, the polarity inversion position refers to a position where the polarity changes in any column of sub-pixels, for example, if the 1 st sub-pixel to the a th sub-pixel of the i-th column of sub-pixels are all positive, and the a +1 th sub-pixel is negative, the a +1 th sub-pixel is the position where the polarity changes. Each column of sub-pixels is correspondingly connected with one data line, and each row of sub-pixels is correspondingly connected with one scanning line. The data lines are used for providing data signals for a corresponding column of sub-pixels, and the scanning lines are used for providing scanning signals for a corresponding row of sub-pixels.
For example, referring to fig. 2, the pixel matrix includes 16 rows and 16 columns of sub-pixels, wherein the polarity inversion position of the sub-pixel D1 in column 1 occurs at the pixel position of the sub-pixel G9 in row 9, the polarity inversion position of the sub-pixel D2 in column 2 occurs at the pixel position of the sub-pixel G5 in row 5 and the pixel position of the sub-pixel G15 in row 13, the polarity inversion position of the sub-pixel D3 in column 3 occurs at the sub-pixel G9 in row 9, and so on.
The staggered polarity inversion mode can reduce the horizontal equidistant striation phenomenon by distributing the polarity conversion position to different pixel positions, improve the display quality of the liquid crystal display panel, simultaneously reduce the power consumption and temperature generated by driving, improve the display quality of the liquid crystal display panel and prolong the service life of the liquid crystal display panel.
Referring to fig. 3, the implementation requirement of the staggered polarity inversion scheme with polarity inversion performed every 8 rows can output the driving signals shown in fig. 3, i.e., the driving signals can output the combination a (the polarity arrangement of the sub-pixels is + + - -), the combination B (the polarity arrangement of the sub-pixels is- ++), the combination C (the polarity arrangement of the sub-pixels is- + -), the combination D (the polarity arrangement of the sub-pixels is- + -), the combination E (the polarity arrangement of the sub-pixels is + -), the combination F (the polarity arrangement of the sub-pixels is- + -), and the driving circuit currently used for source driving can only realize four polarity output combinations from the combination C to the combination F, but cannot realize two polarity output combinations of the combination a and the combination B, therefore, the current driving device is not suitable for the staggered polarity inversion method.
In one embodiment, the timing controller is configured to receive a first polarity digital signal, and rearrange a position of a polarity position corresponding to the first polarity digital signal to obtain a second polarity digital signal;
in a specific embodiment, the first switch unit is configured to receive a first polarity digital signal, and perform position rearrangement on each polarity position in the first polarity digital signal according to the polarity of each polarity position in the first polarity digital signal, so as to obtain a second polarity digital signal.
Specifically, the timing controller includes a plurality of storage units, each of the storage units includes N storages, the first polarity digital signal includes a plurality of sub-polarity digital signals, and each of the storages is configured to receive 1 sub-polarity digital signal according to a preset rule. The polarity of each sub-pixel corresponding to the first polarity digital signal represents 1 sub-polarity digital signal, that is, the sub-polarity digital signal reflects the polarity of its corresponding sub-pixel.
Furthermore, when the timing controller receives the first polarity digital signal, each sub-polarity digital signal is correspondingly transmitted to 1 memory according to a preset rule, that is, when the timing controller receives the first polarity digital signal, the same number of sub-polarity digital signals are correspondingly transmitted to each memory unit according to the number of the memories in each memory unit and the sequence of the first polarity digital signal in the pixel matrix, and each memory receives 1 sub-polarity digital signal according to the preset rule, wherein, when each memory unit comprises m memories, the memory unit correspondingly receives m memories according to the sequence of the first polarity digital signal in the pixel matrix, the preset rule means that when a certain m sub-polarity digital signal is transmitted to a certain memory unit, the sub-polarity digital signal is transmitted to a certain memory unit corresponding to the polarity of the memory unit according to the polarity of the sub-polarity digital signal, that is, if the polarity of the sub-polarity digital signal is positive, a certain polarity conversion module corresponding to a certain memory transmitted by the sub-polarity digital signal is also a positive polarity conversion module, if the polarity of the sub-polarity digital signal is negative, a certain polarity conversion module corresponding to a certain memory transmitted by the sub-polarity digital signal is also a negative polarity conversion module, and when a certain sub-polarity digital signal is transmitted to a certain memory of a certain storage unit, the rest sub-polarity digital signals transmitted to the storage unit cannot be transmitted to the memory again, and the sub-polarity digital signal subjected to position rearrangement according to the preset rule is a second polarity digital signal.
Furthermore, each storage of each storage unit correspondingly transmits the received sub-polarity digital signal to the polarity conversion module, and the number of the storages in each storage unit is equal to that of the polarity conversion modules in the source driving circuit, that is, if the number of the polarity conversion modules is N, the number of the storages in each storage unit is also N, and the storages in each storage unit sequentially transmit the sub-polarity digital signal to the polarity conversion module, that is, the mth storage in the storage unit transmits the received sub-polarity digital signal to the mth polarity conversion module (the mth level is the mth level).
In a specific embodiment, the source driving circuit includes a polarity converting unit and a switch restoring unit, and the source driving circuit includes N stages of source drivers, that is, the source driving circuit includes N source drivers, each of which includes 1 polarity converting module and 1 switch restoring module, wherein each of the source drivers receives a number of rows of second polarity digital signals transmitted by a TCON (timing controller).
The polarity conversion unit is used for performing polarity conversion on the second polarity digital signal to obtain a second polarity conversion signal;
specifically, the polarity conversion unit is configured to perform polarity conversion on the sub-polarity digital signals subjected to position rearrangement by the time schedule controller, and transmit the sub-polarity digital signals received by the storage unit to the switch recovery module, where if the polarity conversion module corresponding to the switch recovery module is a negative polarity conversion module, the polarity of the analog signal output by the sub-polarity digital signal through the polarity conversion module is negative polarity, if the polarity conversion module corresponding to the switch recovery module is a positive polarity conversion module, the polarity of the analog signal output by the sub-polarity digital signal through the polarity conversion module is positive polarity, all the sub-polarity digital signals subjected to polarity conversion are second polarity conversion signals, and the second polarity conversion signals are analog signals.
Further, the polarity conversion unit includes N polarity conversion modules, and the polarity conversion module includes a positive polarity conversion module and a negative polarity conversion module; when the X-th stage polarity conversion module is a positive polarity conversion module, the X + 1-th stage polarity conversion module is a negative polarity conversion module, wherein N, X are positive integers, and X is greater than or equal to 1 and less than or equal to N.
For example, referring to fig. 5, the level 1 polarity conversion module is a positive polarity conversion module, the level 2 polarity conversion module is a negative polarity conversion module, the level 3 polarity conversion module is a positive polarity conversion module, and the level 4 polarity conversion module is a negative polarity conversion module.
And the switch recovery unit is used for carrying out position recovery on the second polarity conversion signal according to the position of the first polarity digital signal to obtain a first polarity conversion signal.
Specifically, the switch recovery unit includes N switch recovery modules, the second polarity conversion signal includes a plurality of sub-polarity conversion signals, and the switch recovery module is configured to perform position recovery on the sub-polarity conversion signals according to the position of the first polarity digital signal.
Furthermore, the switch recovery module of the xth stage includes a plurality of switches, input ends of the switches are connected to the polarity conversion module of the xth stage, and output ends of the switches are used to control polarities of different first polarity digital signals, that is, the switches recover the obtained sub-polarity conversion signal to a position in the pixel matrix where the corresponding sub-polarity digital signal is located.
The first polarity converting signal is to perform position recovery on the second polarity converting signal after position rearrangement by the timing controller through the switch recovering unit, for example, the sub-polarity digital signal received by the level 1 memory of the level 1 memory unit is transmitted to the level 2 polarity converting module, and then the sub-polarity converting signal corresponding to the sub-polarity digital signal needs to be recovered to the original pixel position through the level 2 switch recovering unit, that is, the sub-polarity converting signal is communicated with the switch for controlling the position polarity of the sub-polarity digital signal in the level 2 switch recovering unit, so that the level 2 switch recovering unit block can correctly control the polarity of the corresponding pixel position.
Further, the X-th stage switch recovery module includes p switches, wherein the output end of 1 switch is connected to the polarity of the pixel matrix position where the sub-polarity digital signal controlled by the source driver of the present stage is located, and the output ends of the other switches may be respectively connected to the source drivers other than the source driver of the present stage.
Preferably, each switch recovery module includes 3 switches, and in the 1 st-level switch recovery module, the output terminals of 1 of the switches are connected to the polarity of the pixel matrix position where the sub-polarity digital signal controlled by the source driver of the current level is located, the output terminals of the other 1 switches are connected to the polarity of the pixel matrix position where the sub-polarity digital signal controlled by the source driver of the next level is located, and the 3 rd switch is connected to the polarity of the pixel matrix position where the sub-polarity digital signal controlled by the source driver of the next level is located; in the Y-stage switch recovery module, the output ends of 1 switch are connected with the polarity of the pixel matrix position of the sub-polarity digital signal controlled by the source driver of the current stage, the output ends of the other 1 switches are connected with the polarity of the pixel matrix position of the sub-polarity digital signal controlled by the source driver of the previous stage, the output end of the 3 rd switch is connected with the polarity of the pixel matrix position of the sub-polarity digital signal controlled by the source driver of the next stage, in the N-stage switch recovery module, the output ends of the 1 switch are connected with the polarity of the pixel matrix position of the sub-polarity digital signal controlled by the source driver of the current stage, the output ends of the other 1 switch are connected with the polarity of the pixel matrix position of the sub-polarity digital signal controlled by the source driver of the previous stage, the 3 rd switch is connected with the polarity of the pixel matrix position of the sub-polarity digital signal controlled by the source driver of the second stage, the design can save chip area and improve operation speed, wherein Y is more than 1 and less than N.
The number of switches of each switch recovery module of the embodiments of the present invention may be other, for example, the switch recovery module may be transformed according to the polarity setting characteristics of each pixel matrix to implement the position rearrangement and position recovery of the sub-polarity digital signal, and it is obvious to those skilled in the art that various modifications can be easily made to these embodiments and the general principles described herein can be applied to other embodiments without creative efforts. Therefore, the present invention is not limited to the above embodiments, and those skilled in the art should make improvements and modifications within the scope of the present invention based on the disclosure of the present invention.
For example, referring to fig. 5, fig. 5 shows a specific source driving circuit, where each switch recovery module includes 3 switches, the 1 st level polarity conversion module (positive polarity conversion module) is correspondingly connected to the 1 st level storage in each level of storage unit, the output terminal of the 1 st level polarity conversion module is connected to 3 switches in the 1 st level switch recovery module, the output terminal of the 1 st switch SW1 is connected to the polarity of the pixel matrix position where the sub-polarity digital signal controlled by the 1 st level source driver is located, the output terminal of the 2 nd switch SW2 is connected to the polarity of the pixel matrix position where the sub-polarity digital signal controlled by the 2 nd level source driver is located, and the output terminal of the 3 rd switch SW3 is connected to the polarity of the pixel matrix position where the sub-polarity digital signal controlled by the 3 rd level source driver is located; the 2 nd level polarity conversion module (negative polarity conversion module) is correspondingly connected with the 2 nd level storage in each level of storage unit, the output end of the 2 nd level polarity conversion module is connected with 3 switches in the 2 nd level switch recovery module, the output end of the 1 st switch SW4 is connected with the polarity of the pixel matrix position where the sub-polarity digital signal controlled by the 1 st level source driver is located, the output end of the 2 nd switch SW5 is connected with the polarity of the pixel matrix position where the sub-polarity digital signal controlled by the 2 nd level source driver is located, and the output end of the 3 rd switch SW6 is connected with the polarity of the pixel matrix position where the sub-polarity digital signal controlled by the 3 rd level source driver is located; the 3 rd level polarity conversion module (positive polarity conversion module) is correspondingly connected with the 3 rd level storage in each level of storage unit, the output end of the 3 rd level polarity conversion module is connected with 3 switches in the 3 rd level switch recovery module, the output end of the 1 st switch SW7 is connected with the polarity of the pixel matrix position where the sub-polarity digital signal controlled by the 2 nd level source driver is located, the output end of the 2 nd switch SW8 is connected with the polarity of the pixel matrix position where the sub-polarity digital signal controlled by the 3 rd level source driver is located, and the output end of the 3 rd switch SW9 is connected with the polarity of the pixel matrix position where the sub-polarity digital signal controlled by the 4 th level source driver is located; the 4 th-level polarity conversion module (negative polarity conversion module) is correspondingly connected with the 4 th-level storage in each level of storage unit, the output end of the 4 th-level polarity conversion module is connected with 3 switches in the 4 th-level switch recovery module, the output end of the 1 st switch SW10 is connected with the polarity of the pixel matrix position where the sub-polarity digital signal controlled by the 2 nd-level source driver is located, the output end of the 2 nd switch SW11 is connected with the polarity of the pixel matrix position where the sub-polarity digital signal controlled by the 3 rd-level source driver is located, and the output end of the 3 rd switch SW12 is connected with the polarity of the pixel matrix position where the sub-polarity digital signal controlled by the 4 th-level source driver is located.
In a specific embodiment, the source driving circuit further includes a data latch unit configured to store the second polarity digital signal, and a level shift unit configured to perform level shift on the second polarity digital signal, where the data latch unit includes N data latches, the level shift unit includes N level shifters, and the xth stage data latch and the xth stage level shifter are sequentially connected between the xth stage storage and the xth stage polarity shift module.
In a specific embodiment, the source driving circuit further includes an output buffer unit, where the output buffer unit is configured to buffer the first polarity conversion signal, and the output buffer unit includes N output buffers, and the xth-level output buffer is connected between the xth-level polarity conversion module and the xth-level switch recovery module.
For better understanding of the pixel matrix driving apparatus of the present invention, this embodiment will be described with 1 specific embodiment. Referring to fig. 2, fig. 4 and fig. 5, as shown in fig. 3, the polarities of the first polarity digital signals corresponding to the first row of sub-pixels of the pixel matrix are + - ++ - ++++ - +, respectively, and the number of the storages in each storage unit is set to 4, so that the source driving circuit includes 4 source drivers; as shown in fig. 4, the TX rows correspond to first polarity digital signals transmitted to the timing controller, and the RX rows correspond to second polarity digital signals subjected to position rearrangement. Each storage unit comprises 4 storages, each first-polarity digital signal comprises 16 sub-polarity digital signals, namely, the storage 1, the storage 2, the storage 3 and the storage 4 form a 1 st-level storage unit, the storage 5, the storage 6, the storage 7 and the storage 8 form a 2 nd-level storage unit, the storage 9, the storage 10, the storage 11 and the storage 12 form a 3 rd-level storage unit, and the storage 13, the storage 14, the storage 15 and the storage 16 form a 4 th-level storage unit, wherein the storage 1, the storage 5, the storage 9 and the storage 13 correspondingly transmit the sub-polarity digital signals received by the storage to the 1 st-level polarity conversion module, the storage 2, the storage 6, the storage 10 and the storage 14 correspondingly transmit the sub-polarity digital signals received by the storage to the 2 nd-level polarity conversion module, and the storage 3, the storage 7, the storage 8, The storage 11 and the storage 15 correspondingly transmit the sub-polarity digital signals received by the storage 11 and the storage 15 to the 3 rd-level polarity conversion module, and the storage 4, the storage 8, the storage 12 and the storage 16 correspondingly transmit the sub-polarity digital signals received by the storage 4 and the storage 8 to the 4 th-level polarity conversion module; each storage unit correspondingly receives 4 sub-polarity digital signals, and the 1 st to 4 th sub-polarity digital signals are correspondingly transmitted to the 1 st level storage unit (the polarities of the 1 st to 4 th sub-polarity digital signals are + - +), the 5 th to 8 th sub-polarity digital signals are correspondingly transmitted to the 2 nd level storage unit (the polarities of the 5 th to 8 th sub-polarity digital signals are + - +), the 9 th to 12 th sub-polarity digital signals are correspondingly transmitted to the 3 rd level storage unit (the polarities of the 9 th to 12 th sub-polarity digital signals are + - +), and the 13 th to 16 th sub-polarity digital signals are correspondingly transmitted to the 4 th level storage unit (the polarities of the 13 th to 16 th sub-polarity digital signals are + - +), respectively The polarities of the signals are + - +), the polarity of the 1 st sub-polarity digital signal is +, the 1 st sub-polarity digital signal can be transmitted to the storage 1, the polarity of the 2 nd sub-polarity digital signal is-, the 2 nd sub-polarity digital signal can be transmitted to the storage 4, the polarity of the 3 rd sub-polarity digital signal is-, the 3 rd sub-polarity digital signal can be transmitted to the storage 2, the polarity of the 4 th sub-polarity digital signal is +, the 4 th sub-polarity digital signal can be transmitted to the storage 3, the polarity of the 5 th sub-polarity digital signal is +, the 5 th sub-polarity digital signal can be transmitted to the storage 5, the polarity of the 6 th sub-polarity digital signal is-, the 6 th sub-polarity digital signal can be transmitted to the storage 6, the polarity of the 7 th sub-polarity digital signal is-, the 7 th sub-polarity digital signal may be transmitted to the storage 8, the 8 th sub-polarity digital signal may be transmitted to the storage 7, the 9 th sub-polarity digital signal may be transmitted to the storage 9 if the 8 th sub-polarity digital signal has a polarity of +, the 10 th sub-polarity digital signal may be transmitted to the storage 12 if the 10 th sub-polarity digital signal has a polarity of-, the 11 th sub-polarity digital signal may be transmitted to the storage 10 if the 11 th sub-polarity digital signal has a polarity of +, the 12 th sub-polarity digital signal may be transmitted to the storage 11 if the 12 th sub-polarity digital signal has a polarity of +, the 13 th sub-polarity digital signal may be transmitted to the storage 13 if the 13 th sub-polarity digital signal has a polarity, the 14 th sub-polarity digital signal has a polarity of-, the 14 th sub-polarity digital signal may be transmitted to the storage 14, the 15 th sub-polarity digital signal may be transmitted to the storage 16, the 16 th sub-polarity digital signal may be transmitted to the storage 15, the 1 st to 4 th sub-polarity digital signals may be transmitted to the source driving circuit while the polarity of the SW1, the switch SW6, the switch SW9, the switch SW11, the switch SW2, the switch SW3, the switch SW4, the switch SW5, the switch SW7, the switch SW8, the switch SW10, the switch SW12, the switch SW13 are turned on, the switch SW1, the switch SW5 and the source driving circuit are turned on, and the 5 th to 8 th sub-polarity digital signals may be transmitted to the source driving circuit while the polarity of the 15 th sub-polarity digital signal may be transmitted to the storage 16 and the polarity of the 16 th sub-polarity digital signal may be transmitted to the storage 15 When the 9 th to 12 th sub-polarity digital signals are transmitted to the source driver circuit, the switch SW3 is turned on, the switch SW3 is turned off, the switch SW3 is turned on, the switch SW3 is turned off, the switch SW3 is turned on, the switch SW3 is turned off, the switch SW3 is turned on, the switch SW3 is turned off, the switch SW3 is turned off, Switch SW7 off, switch SW8 off, switch SW10 off, switch SW11 off, switch SW13 off. Similarly, please refer to the fifth row of sub-pixels of the pixel matrix that the polarities of the first polarity digital signal are +++++++ - + - - - - - -, respectively, so that the 1 st sub-polarity digital signal can be transmitted to the storage 1, the 2 nd sub-polarity digital signal can be transmitted to the storage 3, the 3 rd sub-polarity digital signal has a polarity-, the 3 rd sub-polarity digital signal can be transmitted to the storage 2, the 4 th sub-polarity digital signal can be transmitted to the storage 4, and the 5 th sub-polarity digital signal has a polarity +, the 5 th sub-polarity digital signal can be transmitted to the storage 5, the 6 th sub-polarity digital signal has a polarity of + and then the 6 th sub-polarity digital signal can be transmitted to the storage 7, the 7 th sub-polarity digital signal has a polarity of-and then the 7 th sub-polarity digital signal can be transmitted to the storage 6, the 8 th sub-polarity digital signal has a polarity of-and then the 8 th sub-polarity digital signal can be transmitted to the storage 8, the 9 th sub-polarity digital signal can be transmitted to the storage 9, the 10 th sub-polarity digital signal has a polarity of + and then the 10 th sub-polarity digital signal can be transmitted to the storage 11, the 11 th sub-polarity digital signal has a polarity of-and then the 11 th sub-polarity digital signal can be transmitted to the storage 10, the 12 th sub-polarity digital signal has a polarity of-and then the 12 th sub-polarity digital signal can be transmitted to the storage 12, the 13 th sub-polarity digital signal has a polarity of + and transmits the 13 th sub-polarity digital signal to the storage 13, the 14 th sub-polarity digital signal has a polarity of + and transmits the 14 th sub-polarity digital signal to the storage 15, the 15 th sub-polarity digital signal has a polarity of-and transmits the 15 th sub-polarity digital signal to the storage 14, the 16 th sub-polarity digital signal has a polarity of-and transmits the 16 th sub-polarity digital signal to the storage 16, and when the 1 st to 4 th sub-polarity digital signals are transmitted to the source driver, the switch SW1 is turned on, the switch SW6 is turned on, the switch SW8 is turned on, the switch SW13 is turned off, the switch SW2 is turned off, the switch SW3 is turned off, the switch SW4 is turned off, the switch SW5 is turned off, the switch SW7 is turned off, the switch SW9 is turned off, the switch SW10 is turned off, and the switch SW10 is turned off, The switch SW11 is turned off, the switch SW12 is turned off, when the 5 th to 8 th sub-polarity digital signals are transmitted to the source driving circuit, the switch SW1 is turned on, the switch SW6 is turned on, the switch SW7 is turned on, the switch SW13 is turned on, the switch SW2 is turned off, the switch SW3 is turned off, the switch SW4 is turned off, the switch SW5 is turned off, the switch SW8 is turned off, the switch SW9 is turned off, the switch SW10 is turned off, the switch SW11 is turned off, the switch SW12 is turned off, when the 9 th sub-polarity digital signal to the 12 th sub-polarity digital signal is transmitted to the source driving circuit, the switch SW1 is turned on, the switch SW6 is turned on, the switch SW8 is turned on, the switch SW13 is turned on, the switch SW2 is turned off, the switch SW3 is turned off, the switch SW4 is turned off, the switch SW5 is turned off, the switch SW7 is turned off, the switch SW9 is turned off, the switch SW10 is turned off, the switch SW11 is turned off, the switch SW12 is turned off, the switch SW 68513 th sub-polarity digital signal is transmitted to the source driving circuit, switch SW1 is turned on, switch SW6 is turned on, switch SW7 is turned on, switch SW13 is turned on, switch SW2 is turned off, switch SW3 is turned off, switch SW4 is turned off, switch SW5 is turned off, switch SW8 is turned off, switch SW9 is turned off, switch SW10 is turned off, switch SW11 is turned off, and switch SW12 is turned off. By analogy, the pixel matrix driving device of the embodiment can realize + + -, - - + + + -, - - (plus-) - + -, - + plus- + -, + - + - + -, plus- + - + -, and- + - + - + -, so that the pixel matrix driving device of the embodiment is not only suitable for the traditional polarity inversion mode, but also suitable for the staggered polarity inversion mode, thereby reducing the horizontal equidistant cross striations of the display panel and reducing the temperature of the driving chip during operation.
In the embodiment of the invention, by increasing the number of the storages and the number of the source drivers in each storage unit, + + + … - … and-, - - … + + + … can be realized, for example, the number of the storages and the source drivers is 6, and the polarities of the pixel units can realize the arrangement of + + -, - - +++++, so that the pixel matrix driving device of the embodiment is not only suitable for the conventional polarity inversion mode, but also suitable for the staggered polarity inversion mode, thereby reducing the horizontal equidistant stripes of the display panel and reducing the temperature of the driving chip during operation.
The pixel matrix driving device realizes the position rearrangement of the first polarity digital signal through the time schedule controller to obtain a second polarity digital signal, and carries out polarity conversion and position recovery on the second polarity digital signal after the position rearrangement through the source electrode driving circuit to obtain a first polarity conversion signal, so that the output first polarity conversion signal is output to the corresponding position of the display panel, and the pixel matrix driving device is not only suitable for the traditional polarity inversion mode, but also suitable for the staggered polarity inversion mode, thereby reducing the phenomenon of horizontal equidistant cross striations of the display panel and reducing the working temperature of the driving chip.
The embodiment of the invention also provides a pixel matrix driving method, which comprises the following steps:
receiving a first polarity digital signal, and rearranging the position of a polarity position corresponding to the first polarity digital signal to obtain a second polarity digital signal;
and performing polarity conversion and position recovery on the second polarity digital signal to obtain a first polarity conversion signal.
The method of the embodiment of the invention is not only suitable for the traditional polarity inversion mode, but also suitable for the staggered polarity inversion mode, thereby reducing the phenomenon of horizontal equidistant horizontal stripes of the display panel and reducing the temperature of the driving chip during working.
The embodiment of the invention also provides a liquid crystal display which comprises the pixel matrix driving device, so that the phenomenon of horizontal equidistant transverse striation of the liquid crystal display can be avoided, and the working temperature of a driving chip can be reduced.
The foregoing is a more detailed description of the invention in connection with specific preferred embodiments and it is not intended that the invention be limited to these specific details. For those skilled in the art to which the invention pertains, several simple deductions or substitutions can be made without departing from the spirit of the invention, and all shall be considered as belonging to the protection scope of the invention.
Claims (5)
1. A pixel matrix driving device, comprising:
the time schedule controller is used for receiving a first polarity digital signal and rearranging the position of a polarity position corresponding to the first polarity digital signal to obtain a second polarity digital signal;
the source electrode driving circuit is used for carrying out polarity conversion and position recovery on the second polarity digital signal to obtain a first polarity conversion signal;
the time schedule controller comprises a plurality of storage units, each storage unit comprises N storages, the first polarity digital signal comprises a plurality of sub-polarity digital signals, and each storage is used for receiving 1 sub-polarity digital signal according to a preset rule; the source driving circuit includes: the switch comprises a polarity conversion unit and a switch recovery unit, wherein the polarity conversion unit comprises N polarity conversion modules, and each polarity conversion module comprises a positive polarity conversion module and a negative polarity conversion module; wherein, when the X-th level polarity conversion module is a positive polarity conversion module, the X + 1-th level polarity conversion module is a negative polarity conversion module, wherein N, X is a positive integer, X is not less than 1 and not more than N, the switch recovery unit comprises N switch recovery modules, the second polarity conversion signal comprises a plurality of sub-polarity conversion signals, the X-th level switch recovery module comprises a plurality of switches, the input ends of the switches are connected with the X-th level polarity conversion module, the output ends of the switches are used for controlling the polarities of different first polarity digital signals,
when the time sequence controller receives a first polarity digital signal, correspondingly transmitting the same number of sub-polarity digital signals to each storage unit according to the number of storages in each storage unit and the sequence of the first polarity digital signals in the pixel matrix, and each storage receives 1 sub-polarity digital signal according to a preset rule, wherein when each storage unit comprises m storages, the storage unit correspondingly receives m storages according to the sequence of the first polarity digital signals in the pixel matrix, the preset rule means that when a certain m sub-polarity digital signal is transmitted to a certain storage unit, the m sub-polarity digital signal is transmitted to a certain storage corresponding to the polarity of the sub-polarity digital signal in the storage unit according to the polarity of the sub-polarity digital signal, and the polarity conversion module transmits the sub-polarity digital signal received by the storage unit to the switch recovery module, if the polarity conversion module corresponding to the switch recovery module is a negative polarity conversion module, the polarity of the analog signal output by the polarity conversion module of the sub-polarity digital signal is a negative polarity, if the polarity conversion module corresponding to the switch recovery module is a positive polarity conversion module, the polarity of the analog signal outputted by the polarity converting module is positive, so as to realize the position rearrangement of the polar position corresponding to the first polar digital signal, all the sub-polar digital signals after the polarity conversion are second polar conversion signals, the switch recovery module of the X level comprises a plurality of switches, the input ends of the switches are connected with the polarity conversion unit of the X level, the output ends of the switches are used for controlling the polarities of different first polar digital signals, so as to restore the obtained sub-polarity conversion signal to the position of the pixel matrix where the corresponding sub-polarity digital signal is located through the switch.
2. The driving apparatus as claimed in claim 1, wherein the source driving circuit further comprises a data latch unit and a level shifter unit, the data latch unit comprises N data latches, the level shifter unit comprises N level shifters, and the data latch of the X-th stage and the level shifter of the X-th stage are sequentially connected between the storage of the X-th stage and the polarity shifting module of the X-th stage.
3. The driving apparatus as claimed in claim 1, wherein the source driving circuit further includes an output buffer unit, the output buffer unit includes N output buffers, and the output buffer of the X-th stage is connected between the polarity converting module of the X-th stage and the switching recovery module of the X-th stage.
4. A pixel matrix driving method is applied to a pixel matrix driving device, the pixel matrix driving device comprises a time schedule controller and a source electrode driving circuit, and the pixel matrix driving method comprises the following steps:
the time schedule controller receives a first polarity digital signal and rearranges the position of a polarity position corresponding to the first polarity digital signal to obtain a second polarity digital signal;
the source electrode driving circuit carries out polarity conversion and position recovery on the second polarity digital signal to obtain a first polarity conversion signal;
the time schedule controller comprises a plurality of storage units, each storage unit comprises N storages, the first polarity digital signal comprises a plurality of sub-polarity digital signals, and each storage is used for receiving 1 sub-polarity digital signal according to a preset rule; the source driving circuit includes: the switch comprises a polarity conversion unit and a switch recovery unit, wherein the polarity conversion unit comprises N polarity conversion modules, and each polarity conversion module comprises a positive polarity conversion module and a negative polarity conversion module; wherein, when the X-th level polarity conversion module is a positive polarity conversion module, the X + 1-th level polarity conversion module is a negative polarity conversion module, wherein N, X is a positive integer, X is not less than 1 and not more than N, the switch recovery unit comprises N switch recovery modules, the second polarity conversion signal comprises a plurality of sub-polarity conversion signals, the X-th level switch recovery module comprises a plurality of switches, the input ends of the switches are connected with the X-th level polarity conversion module, the output ends of the switches are used for controlling the polarities of different first polarity digital signals,
when the time sequence controller receives a first polarity digital signal, correspondingly transmitting the same number of sub-polarity digital signals to each storage unit according to the number of storages in each storage unit and the sequence of the first polarity digital signals in the pixel matrix, and each storage receives 1 sub-polarity digital signal according to a preset rule, wherein when each storage unit comprises m storages, the storage unit correspondingly receives m storages according to the sequence of the first polarity digital signals in the pixel matrix, the preset rule means that when a certain m sub-polarity digital signal is transmitted to a certain storage unit, the m sub-polarity digital signal is transmitted to a certain storage corresponding to the polarity of the sub-polarity digital signal in the storage unit according to the polarity of the sub-polarity digital signal, and the polarity conversion module transmits the sub-polarity digital signal received by the storage unit to the switch recovery module, if the polarity conversion module corresponding to the switch recovery module is a negative polarity conversion module, the polarity of the analog signal output by the polarity conversion module of the sub-polarity digital signal is a negative polarity, if the polarity conversion module corresponding to the switch recovery module is a positive polarity conversion module, the polarity of the analog signal outputted by the polarity converting module is positive, so as to realize the position rearrangement of the polar position corresponding to the first polar digital signal, all the sub-polar digital signals after the polarity conversion are second polar conversion signals, the switch recovery module of the X level comprises a plurality of switches, the input ends of the switches are connected with the polarity conversion unit of the X level, the output ends of the switches are used for controlling the polarities of different first polar digital signals, so as to restore the obtained sub-polarity conversion signal to the position of the pixel matrix where the corresponding sub-polarity digital signal is located through the switch.
5. A liquid crystal display comprising the pixel matrix driving device according to any one of claims 1 to 3.
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| CN201811521101.8A CN111312181B (en) | 2018-12-12 | 2018-12-12 | Pixel matrix driving device, liquid crystal display and pixel matrix driving method |
| US16/456,010 US10803821B2 (en) | 2018-07-23 | 2019-06-28 | Liquid crystal display panel with different polarity inversion positions for multiple columns of pixel units and liquid crystal display device |
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