CN112752090A

CN112752090A - Testing device

Info

Publication number: CN112752090A
Application number: CN201911054132.1A
Authority: CN
Inventors: 李本友
Original assignee: Hisense Visual Technology Co Ltd
Current assignee: Hisense Visual Technology Co Ltd
Priority date: 2019-10-31
Filing date: 2019-10-31
Publication date: 2021-05-04

Abstract

The invention provides a testing device, which comprises a mainboard and a display module connected with the mainboard, wherein a screen driving circuit is arranged in the mainboard, the display module comprises a display panel, the mainboard is used for acquiring a control instruction and generating a screen-up signal and a screen control signal corresponding to the display module according to the control instruction, wherein the screen-up signal is a plurality of groups of differential signal pairs, the control instruction is generated by the mainboard through detecting user operation or detecting a preset file, the display module is configured to drive the display module to display according to the screen-up signal and/or the screen control signal, according to the different display panels to be controlled, the corresponding control instructions are obtained, control over different display panels is achieved, a universal display module is particularly adopted when the main board is debugged or maintained, the practicability of the TCONLESS scheme is improved, and debugging and maintaining costs are saved.

Description

Testing device

Technical Field

The invention relates to the technical field of liquid crystal televisions, in particular to a testing device.

Background

With the development of the liquid crystal television market, market competition becomes very strong, so that higher requirements are made on the cost of the liquid crystal television.

Therefore, in the prior art, a counter Control Register (TCON) board of a liquid crystal display panel is generally integrated on a television main board, a TCON Chip is integrated in a System On Chip (SOC), and a P2P (Point to Point) signal is directly output to a display panel for display, which is an effective way to reduce cost, i.e., a TCONLESS scheme.

However, because specification information and compatible communication protocols of display panels produced by different manufacturers are different, models of a main board and the display panel must be matched and corresponded to each other to normally display a picture, and a factory needs to prepare a corresponding display panel for a television using display panels of different specifications during debugging or after-sales maintenance to light the display panel through a TCONLESS board to debug or maintain the TCONLESS board, which results in higher maintenance and production costs.

Disclosure of Invention

The invention provides a testing device, aiming at solving the problem that the TCONLESS plate in the prior art is not compatible with various display panels, so that the maintenance and production cost is high.

In a first aspect, the present invention provides a test apparatus, the apparatus comprising: the display device comprises a main board and a display module connected with the main board, wherein a screen driving circuit is arranged in the main board, and the display module comprises a display panel;

the main board is used for acquiring a control instruction and generating a screen-up signal and a screen control signal corresponding to the display module according to the control instruction; the control instruction is generated by the mainboard through detecting user operation or detecting a preset file; the screen control signal comprises GAMMA correction GAMMA voltage, a voltage control signal for supplying power to the display panel and a driving control voltage for driving the display panel to display;

the display panel is configured to drive the display module to display according to the screen loading signal and/or the screen control signal.

In a specific implementation manner, the display module includes a first display module, and the first display module includes a first display panel and a switching circuit connected to the first display panel; if the control instruction is a first control instruction for instructing the main board to generate a signal corresponding to the first display panel, the output end of the main board is connected with the input end of the first display panel through the switching circuit;

the switching circuit is used for providing power supply voltage for the first display panel;

the main board is used for generating a first screen-up signal and a screen control signal according to the first control instruction; the first upper screen signal is 8 groups of differential signal pairs which accord with a digital interface standard VbyOne; the first display panel is provided with a VbyOne interface;

the main board is further used for sending the first screen-up signal to the first display panel through the switching circuit, and driving the first display panel to display.

Further, the apparatus further comprises: a control signal detection module;

the main board is connected with the control signal detection module through the switching circuit;

the switching circuit is used for carrying out signal conversion on the screen control signal sent by the mainboard and then sending the screen control signal to the control signal detection module;

the control signal detection module is used for detecting whether the screen control signal is normal or not.

Further, the patching circuit comprises: a screen control signal processing module;

the screen control signal processing module includes: the analog-to-digital conversion sub-module, the micro control unit MCU sub-module and the level conversion sub-module;

the MCU submodule is respectively connected with the analog-to-digital conversion submodule and the level conversion submodule;

the analog-to-digital conversion sub-module is used for converting the screen control signal from an analog signal to a digital signal;

the MCU submodule is used for acquiring the digital signal and sending the digital signal to the level conversion submodule;

the level conversion submodule is used for boosting the digital signal.

Optionally, the switching circuit further includes: a line sequence arrangement module;

the line sequence arrangement module is connected between the mainboard and the screen control signal processing module and comprises a plurality of input sockets and two output sockets;

and the line sequence arranging module is used for matching the line sequence of the output end of the mainboard with the line sequence of the input end of the screen control signal processing module.

Optionally, the switching circuit includes: the power supply device comprises an input socket, an output socket and a power supply module;

the switching circuit is connected with an output socket of the mainboard through the input socket and receives the first screen-up signal and the screen control signal sent by the mainboard;

the switching circuit is connected with an input socket of the first display panel through the output socket;

the switching circuit sends the first screen-up signal to a screen-up signal input pin of an input socket of the first display panel through a screen-up signal output pin in the output socket;

the power supply module is connected with a power pin of an input socket of the first display panel through a power supply pin of an output socket and provides power supply voltage for the first display panel.

Optionally, the input sockets of the adaptor circuit are two 60pin sockets, and the output socket of the adaptor circuit is a 51pin socket.

Further, the switching circuit further comprises: a control signal output terminal;

the control signal output end is connected with the input end of the control signal detection module;

the switching circuit sends the screen control signal to the control signal detection module through the control signal output end.

In a specific implementation manner, the display module includes a second display module, and the second display module includes a second display panel; if the control instruction is a second control instruction for instructing the main board to generate a signal corresponding to the second display panel, the output end of the main board is connected with the input end of the second display panel;

the main board is used for generating a second screen-up signal and the screen control signal according to the second control instruction; the second screen-up signal is a plurality of groups of P2P signal pairs; the second display panel is provided with a plurality of groups of P2P signal interfaces;

the main board is further configured to send the second screen-up signal and/or the screen control signal to the second display panel, and drive the second display panel to display.

In a specific implementation, the motherboard includes: the system comprises a main chip, a power management PMU module, a GAMMA correction GAMMA module, a level conversion module and an output socket; the main chip is an integrated chip of an SOC chip and a TCON chip;

a power supply control pin of the main chip is connected with a power supply pin of the PMU module and provides power supply voltage for the PMU module; the main chip is connected with the bus pins of the PMU module and the GAMMA module through bus pins and is communicated with the PMU module and the GAMMA module; the main chip is connected with an input pin of the level conversion module through a drive control pin and sends a drive control signal to the level conversion module; the PMU module is connected with the GAMMA module; the output socket is connected with an upper screen signal output pin of the main chip and is connected with output pins of the PMU module, the GAMMA module and the level conversion module;

the main chip is used for generating the screen-up signal and the control signal according to the control instruction;

the PMU module is used for outputting the voltage control signal according to the control signal;

the GAMMA module is used for outputting the GAMMA voltage signal according to the control signal;

the level conversion module is used for carrying out level conversion on the control signal sent by the main chip to obtain a driving control signal and outputting the driving control signal.

Optionally, the output socket of the motherboard is two 60pin sockets.

The testing device provided by the embodiment of the invention comprises a mainboard and a display module connected with the mainboard, wherein a screen driving circuit is arranged in the mainboard, the display module comprises a display panel, the mainboard is used for acquiring a control instruction and generating a screen-up signal and a screen control signal corresponding to the display module according to the control instruction, wherein the screen signal is a plurality of groups of differential signal pairs, the control instruction is generated by the mainboard through detecting user operation or detecting a preset file, the mainboard is also used for driving the display module to display according to the screen signal and/or the screen control signal, according to the different display panels to be controlled, the corresponding control instructions are obtained, control over different display panels is achieved, a universal display module is particularly adopted when the main board is debugged or maintained, the practicability of the TCONLESS scheme is improved, and debugging and maintaining costs are saved.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without inventive exercise.

Fig. 1 is a schematic structural diagram of a first testing apparatus according to an embodiment of the present invention;

fig. 2 is a schematic structural diagram of a second testing apparatus according to an embodiment of the present invention;

fig. 3 is a schematic structural diagram of a third testing apparatus according to an embodiment of the present invention;

fig. 4a is a first schematic structural diagram of a switching circuit according to an embodiment of the present invention;

fig. 4b is a second schematic structural diagram of a switching circuit according to an embodiment of the present invention;

FIG. 4c is a schematic diagram of a switching circuit according to an embodiment of the present invention

Fig. 5 is a schematic structural diagram of a fourth testing apparatus according to an embodiment of the present invention;

fig. 6 is a schematic structural diagram of a fifth testing apparatus according to an embodiment of the present invention;

fig. 7 is a schematic diagram of a Gate working timing sequence of a display panel according to the present invention;

fig. 8 is a voltage divider circuit according to the present invention;

fig. 9 is a schematic diagram of a hardware structure of a motherboard according to an embodiment of the present invention.

Detailed Description

In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

The terms "first," "second," and the like in the description and in the claims, and in the drawings, of the embodiments of the application are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the application described herein are, for example, capable of operation in sequences other than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.

In the prior art, the counter Control Register (TCON) board is often integrated on the television main board, i.e. the TCONLESS scheme, so as to achieve the purpose of reducing the cost.

In view of the above problems, the testing device provided by the invention can enable the mainboard to be compatible with the display panel used in the product for sale and the display panel for debugging and maintenance.

The test device provided by the present invention is illustrated by several specific examples.

The testing device in the scheme can be applied to any terminal equipment with a display screen, such as a mobile phone, a flat panel, a television, a personal computer, a notebook, a wearable device and the like, and can also be applied to industrial equipment, medical equipment and the like.

Fig. 1 is a schematic structural diagram of a first testing apparatus according to an embodiment of the present invention, and as shown in fig. 1, the testing apparatus includes: mainboard 01 and display module assembly 02, mainboard 01 are connected with display module assembly 02, and this mainboard embeds has screen drive (TCON) circuit, can understand, and this mainboard passes through TCON circuit can realize the whole functions of TCON board.

Optionally, mainboard 01 and display module group 02 accessible two pairs of 60pin sockets are connected, are provided with two 60pin sockets at mainboard 01's output promptly, and display module group 02's input is provided with two corresponding 60pin sockets, and mainboard 01 is connected with two 60pin sockets of display module group 02's input through two 60pin sockets of output. It is worth mentioning that, the socket that mainboard 01 and display module 02 are connected is not limited to be 60 pins in this application, and sockets of different specifications can be set according to the demand.

Optionally, the display module may include a display panel, or may further include a functional circuit, a switching circuit, or other devices connected to the display panel.

The main board 01 is used for acquiring a control instruction and generating a screen-up signal and a screen control signal corresponding to the display module according to the control instruction, wherein the screen-up signal is a plurality of groups of differential signal pairs, the control instruction is generated by detecting user operation or detecting a preset file, and the screen control signal comprises GAMMA correction GAMMA voltage, a voltage control signal for supplying power to the display panel and a drive control voltage for driving the display panel to display. The main board 01 is further configured to drive the display module to display according to the screen display signal and/or the screen control signal, and correspondingly, the display module 02 is configured to display according to the screen display signal and/or the screen control signal.

In a possible implementation manner, the method for acquiring a control instruction provided by the present disclosure includes: in a system Boot (Boot) stage, the main board 01 detects user operation and a preset file to obtain a detection result, determines specification information of a display module to be controlled according to the detection result, wherein the specification information comprises at least one of a data format, a control signal, an interface type and a protocol type, and generates a control instruction according to the specification information, and the control instruction comprises screen parameters to be set.

For example, it is detected whether a user issues a request instruction through remote control, where the request instruction is used to request to enter a debugging or maintenance environment, and optionally, the request instruction may be issued through a specific remote control or may be issued by pressing a specific key; for another example, whether a preset file exists is detected, where the preset file is used to indicate that a debugging or maintenance environment needs to be entered, or content in the preset file is detected, and whether the debugging or maintenance environment needs to be entered is determined according to the content, where optionally, the preset file may be set in an external storage device, for example, stored in a usb disk.

Further, according to the detection result, if it is determined that a debugging or maintenance environment needs to be entered, determining that the display module to be controlled is a display module for debugging or maintaining the mainboard, for example, a display module conforming to a digital interface standard (VbyOne, VB 1); or, according to the detection result, if it is determined that the debugging or maintenance environment is not entered, the display module to be controlled is determined to be a display module used in normal production and sale (non-debugging or maintenance environment), for example, a display module conforming to the EPI/ISP/CEDS/USIT/CMPI protocol. And then, according to the difference of the display module group to be controlled, different control instructions are generated.

Optionally, the method for acquiring the control instruction further includes receiving the control instruction sent by the other device.

For example, if the display module is a general VB1 display module used when debugging or maintaining a motherboard, the display signal is 8 VB1 differential signal pairs, and if the display module is a Point to Point (P2P) display module matched with the motherboard and used during normal production or sale, the display signal is 12P 2P signal pairs. It should be noted that the VB1 display module mentioned in this application is a display module that only receives the VB1 signal, and for convenience, those display modules that receive other signals are referred to as end-to-end display modules that are used in normal production or sale and are matched with the main board. Of course, the received signal format is not limited to P2P, and the schemer may define the transmission signal format according to his own requirements.

The testing device provided by the embodiment of the invention comprises a mainboard 01 and a display module 02 connected with the mainboard 01, wherein a screen driving circuit is arranged in the mainboard 01, the mainboard 01 is used for acquiring a control instruction, and generates a screen-up signal and a screen control signal corresponding to the display module 02 according to the control instruction, wherein, the screen-up signal is a plurality of groups of differential signal pairs, the control instruction is generated by the mainboard by detecting user operation or detecting a preset file, the mainboard 01 is also used for driving the display module to display according to the screen-up signal and/or the screen control signal, according to the different display panels to be controlled, the corresponding control instructions are obtained, control over different display panels is achieved, a universal display module is particularly adopted when the main board is debugged or maintained, the practicability of the TCONLESS scheme is improved, and debugging and maintaining costs are saved.

On the basis of the embodiment shown in fig. 1, fig. 2 is a schematic structural diagram of a second testing apparatus provided in the embodiment of the present invention, the display module 02 includes a first display module 021, as shown in fig. 2, the first display module 021 includes a first display panel 0211, the first display panel 0211 is a general display panel usually used when debugging or maintaining a motherboard, for example, a VB1 display panel having a VB1 interface, and since the input terminal of the VB1 display panel is often provided with a 51pin socket and cannot be directly connected to the motherboard 01, the first display module 021 includes a switching circuit 0212 in addition to the first display panel 0211, and the first display panel 0211 is connected to the switching circuit 0212.

Based on the display module 02 being the first display module 021, the control command is a first control command for instructing the main board 01 to generate a signal corresponding to the first display panel 021, and the output terminal of the main board 01 is connected to the input terminal of the first display panel 0211 through the adapter circuit 0212.

The adapter circuit 0212 is used for providing a power supply voltage for the first display panel 0211; the main board 01 is configured to generate a first screen signal and a screen control signal according to the first control instruction, where the first screen signal is 8 groups of differential signal pairs conforming to the digital interface standard VB 1.

The main board 01 is further configured to send the first screen signal to the first display panel 0211 through the switching circuit 0212, and drive the first display panel 0211 to display.

Further, the main board 01 is debugged or repaired in combination with the content displayed by the first display panel 0211.

Optionally, the adapting circuit 0212 can be independent of the first display module 021 and connected between the main board and the first display module.

Further, with reference to fig. 3, a schematic structural diagram of a third testing apparatus according to an embodiment of the present invention is provided, where the testing apparatus further includes: and a control signal detection module 03.

The main board 01 is connected to the control signal detection module 03 through the switching circuit 0212.

The switching circuit 0212 is configured to perform signal conversion on the screen control signal sent by the motherboard 01, and send the screen control signal to the control signal detection module 03.

The control signal detection module 03 is used for detecting whether the screen control signal is normal.

Based on the embodiments shown in fig. 2 and fig. 3, fig. 4a is a first structural schematic diagram of the transit circuit provided by the embodiment of the present invention, and fig. 4b is a second structural schematic diagram of the transit circuit provided by the embodiment of the present invention, and in combination with fig. 4a, the transit circuit 0212 includes: the screen controls the signal processing module 100.

The screen control signal processing module 100 includes: an analog-to-digital conversion sub-module 101, a micro control unit MCU sub-module 102 and a level conversion sub-module 103; the MCU submodule 102 is respectively connected with the analog-to-digital conversion submodule 101 and the level conversion submodule 103;

the analog-to-digital conversion submodule 101 is configured to convert the panel control signal from an analog signal to a digital signal, the MCU submodule 102 is configured to obtain the digital signal from the analog-to-digital conversion submodule 101 and send the digital signal to the level conversion submodule 103, and the level conversion submodule 103 is configured to boost the digital signal.

Illustratively, the digital signal converted by the analog-to-digital conversion sub-module 101 is a transistor-transistor logic (TTL) level signal, and the level conversion sub-module 103 boosts the TTL level signal and converts the TTL level signal into a level signal conforming to the RS232 standard.

As shown in fig. 4a and 4b, the transit circuit 0212 further includes: an input socket 104, an output socket 105 and a power supply module 1.

The switching circuit 0212 is connected with an output socket of the mainboard 01 through the input socket 104, and receives a first screen-up signal and a screen control signal sent by the mainboard 01; the adapter circuit 0212 is connected with an input socket XP3 of the first display panel 021 through an output socket 105; optionally, the output socket of the motherboard 01 includes two 60pin sockets XP11 and XP 12.

The through circuit 0212 transmits the first upper screen signal to the upper screen signal input pin (e.g., VB1_0N to VB1_7N, VB1_0P to VB1_7P) of the input socket XP3 of the first display panel 021 through the upper screen signal output pin (e.g., VB1_0N to VB1_7N, VB1_0P to VB1_7P) in the output socket.

The power supply module 1 is connected to the power pin VCC _ Panel of the input socket XP3 of the first display Panel 021 through the power pin VCC _ Panel of the output socket, so as to provide a power supply voltage for the first display Panel 021.

Optionally, the input socket of the adaptor circuit 0212 is two 60pin sockets, and the output socket of the adaptor circuit 0212 is one 51pin socket.

In this embodiment, when needing to debug mainboard 01, the display module assembly 02 of being connected with mainboard 01 is first display module assembly 021, mainboard 01 is according to first control instruction, go up screen signal and drive signal to first display module assembly 021 output correspondence, drive first display module assembly 021 and show, through combining the content that first display module assembly 021 shows, realize debugging or the maintenance to mainboard 01, and need not debug or maintain every mainboard matching respective display module assembly, the cost is saved, the practicality of TCONLESS scheme has been increased.

In some embodiments, the transit circuit 0212 further includes: a control signal output terminal XP 5; the control signal output end XP5 is connected with the input end of the control signal detection module 03;

the through circuit 0212 sends the screen control signal to the control signal detection module 03 through the control signal output terminal XP 5. The panel control signal is a panel control signal processed by the panel control signal processing module 100, and the panel control signal includes a voltage control signal, such as a VCOM voltage, a VGH voltage, a VGL voltage, a VDDA voltage, a gama voltage (VG1, VG7, VG8, and VG14) output by a gama module of the main board, and a driving control signal, such as driving control signals (HC1 to HC8, ST1, LC1, LC2, and VSS _ XON) output by a level conversion module of the main board.

In this embodiment, the mainboard 01 sends the screen control signal to the control signal detection module 03 through the control signal output XP5 of the adapter circuit 0212, has realized the detection to the screen control signal, and whether normal through detecting the screen control signal, debugs or maintains the mainboard 01.

On the basis of the above embodiments, fig. 4c is a third schematic structural diagram of the transit circuit provided by the embodiment of the present invention, and as shown in fig. 4c, the transit circuit 0212 further includes: a line order sorting module 200;

the line sequence arrangement module 200 is connected between the main board 01 and the screen control signal processing module 100, and comprises a plurality of input sockets 201 and two output sockets 202;

the line sequence collating module is used for matching the line sequence of the output end of the main board 01 with the line sequence of the input end of the screen control signal processing module 100.

According to the line sequence or interface package of the motherboard 01, the output end of the motherboard 01 is connected to a corresponding pair of sockets in the line sequence adjusting module 200, for example, the input socket 1 and the input socket 2 shown by solid arrows in the figure, or the input socket 3 and the input socket 4 shown by dashed arrows in the figure.

In this embodiment, the adapting circuit 0212 further includes a line sequence sorting module 200, and according to the line sequence and the interface package of the motherboard 01, a corresponding pair of input sockets in the line sequence sorting module 200 is selected, so that the motherboard 01 is connected with the corresponding pair of input sockets in the line sequence sorting module 200, and the screen-up signal and the screen control signal output by the motherboard 01 are received, and the received screen-up signal and the screen control signal are output to the screen control signal processing module 100 by the two output sockets 202 of the line sequence sorting module 200, thereby realizing compatibility with the motherboards packaged by various different line sequences or different interfaces, and avoiding the problem of cost increase caused by matching a plurality of screen control signal processing modules 100 with various motherboards.

On the basis of the embodiment shown in fig. 1, fig. 5 is a schematic structural diagram of a fourth testing apparatus according to an embodiment of the present invention, the display module 02 includes a second display module 022, as shown in fig. 5, the second display module 022 includes a second display panel 0221, the second display panel 0221 is a display panel generally used in production or sale of a product and matching with the motherboard 01, but is not a general display panel used in debugging or maintenance, such as a P2P display panel, which has a P2P signal interface and conforms to the EPI/ISP/CEDS/USIT/CMPI protocol.

Based on the display module 02 being the second display module 022, the control instruction is a second control instruction for instructing the motherboard 01 to generate a signal for applying the second display panel 0221, and then the output terminal of the motherboard 01 is connected to the input terminal of the second display panel 0221.

The main board 01 is used for generating a second screen-up signal and a screen control signal according to a second control instruction; the second screen-up signal is a plurality of groups of P2P signal pairs.

The main board 01 is further configured to send the second upper screen signal and the screen control signal to the second display panel 022, and drive the second display panel 022 to display.

On the basis of the embodiments shown in fig. 1 to 5, fig. 6 is a schematic structural diagram of a fifth embodiment of the testing apparatus provided in the embodiment of the present invention, and as shown in fig. 6, the main board 01 includes: a main chip 011, a power management PMU module 012, a GAMMA correction GAMMA module 013, a level shift module 014, and an output jack 015.

Optionally, the main Chip 011 is an integrated Chip of a System On Chip (SOC) and a TCON Chip, or a combined Chip of the SOC and the TCON Chip, or an SOC integrated with functions of the TCON Chip.

A power supply control pin VCC _ Panel _ ctrol of the main chip 011 is connected with a power supply pin VCC _ Panel of the PMU module 012, and provides a power supply voltage to the PMU module 012; the main chip 011 communicates with the PMU module 012 and the GAMMA module 013 by connecting to bus pins (e.g., I2C _ SDA, I2C _ SCL) of the PMU module 012 and the GAMMA module 013 via bus pins (e.g., I2C _ SDA, I2C _ SCL); the main chip 011 is connected with input pins (e.g., Panel _ LC, Panel _ YDIO, Panel _ TER, Panel _ Yclk) of the level shift module 014 through driving control pins (e.g., Panel _ LC, Panel _ YDIO, Panel _ TER, Panel _ Yclk), and transmits driving control signals to the level shift module 014; the PMU module 012 (e.g., VDDA and VDDD pins) is connected to the gama module 013 (e.g., VDDA and VDDD pins); the output socket 015 is connected to the on-screen signal output pins (e.g., P2P _0N P2P11N, P2P _0P 2P _11P) of the main chip 011 and to the output pins of the PMU module 012, the GAMMA module 013, and the level shift module 014.

Optionally, the outlet receptacle 015 comprises two 60pin receptacles XP1 and XP 2.

The main chip 011 is used for generating a screen-up signal and a screen control signal according to the control instruction.

The PMU module 012 is configured to output a voltage control signal, which may supply power to the display panel according to the control signal, and illustratively, the voltage control signal includes a VCOM voltage signal, a VGH voltage signal, a VGL voltage signal, a VDDA and VDDD voltage signals, and the like.

The GAMMA module 013 is configured to generate a GAMMA voltage signal based on the control signals, e.g., VDDA, VDDD voltage signals, and output a GAMMA voltage signal, e.g., VG1, VG7, VG8, VG 14.

The Levelshift module 014 is configured to level-convert control signals, such as Panel _ LC, Panel _ YDIO, Panel _ TER, Panel _ Yclk, CPV1, CPV2, and the like, sent by the main chip 011, and output converted driving control signals, such as HC1 to HC8, ST1, LC1, LC2, and VSS _ XON.

In a specific implementation manner, the main board 01 generates a driving control voltage corresponding to the display module according to the acquired control instruction, where the driving control voltage may be a timing control signal. Referring to fig. 7, for the schematic diagram of the Gate operating timing of the display panel provided by the present invention, exemplarily, the main chip 011 generates control signals, such as a CPV1 signal and a CPV2 signal, the CPV1 signal and the CPV2 signal are input ends of a panel-end level shift module, and jointly determine a timing control CLK (CLK1-CLK6) signal, a falling edge of the CPV1 serves as a start of CKL1, a rising edge of the CPV2 serves as a stop of CLK1, and so on until all 2160 lines are scanned, and the level shift module generates and outputs a timing control signal (CLK1-CLK6) according to the CPV1 signal, the CPV2 signal, and a preset STV (for controlling the Gate operating timing of each frame panel, low level is active, high level is reset), as shown in fig. 7, the CLK1-CLK6 is 2160 lines Gate operating timing, and high level is VGH, and low level is negative voltage level (VGL).

Further, before the switching circuit 0212 receives the screen control signal sent by the main board 01, each path of signal needs to be divided, the scheme provides a sampling circuit, the sampling module comprises a plurality of voltage division circuits provided by the invention as shown in fig. 8, the voltage division circuits are arranged in the switching circuit 0212 and connected with each signal input end of the switching circuit, and the screen control signal output by the main board 01 is adjusted to the input voltage range of the analog-to-digital conversion sub-module. The voltage dividing circuit includes: a resistor R1, a resistor R2 and a resistor R3; one end of the resistor R2 is grounded, the other end of the resistor R2 is connected with one end of the resistor R1 and one end of the resistor R3 respectively, the other end of the resistor R1 is connected to a corresponding signal pin in the adapter circuit input socket, the other end of the resistor R3 is connected to the analog-to-digital conversion module 201, and different resistors are arranged according to different signals. Taking the voltage control signal VDDA as an example, the signal is supplied to the display panel through a Chip On Flex (or, Chip On Film, COF), a voltage range of the signal is different according to different panels and is within a range of 14-18V, and an input voltage range of the analog-to-digital conversion module is within 10V, so that the requirement is met by connecting a voltage division circuit, optionally, R1 ═ 10k ohm, R2 ═ 10k ohm, and R3 ═ 47k ohm; for another example, the tested CLK1 signal is output as VGL, i.e., -5.5V, and the voltage divider circuit shown in fig. 8 is still used, optionally, R1, R2, and R3 are all 100K ohms, and CLK1 is adjusted to meet the input voltage range of the analog-to-digital conversion module. This scheme is through setting up different divider resistance to the different input signal of mainboard 01, the sampling circuit design of the positive and negative voltage of compatible each panel.

Illustratively, an Analog-to-Digital Converter (ADC) chip used by the Analog-to-Digital Converter module in the present embodiment is ADS8688DBT, supports 8-way signal input, has 16-bit ADC processing capability with SPI communication, has input voltages of ± 10V, ± 5V, ± 2.5V, 0 to 10V and 0 to 5V, and has an operating voltage of 5V. Optionally, the number of ADS8688DBT chips is 5. When the chip works, the collected positive and negative voltages can be input into the ADS8688DBT through the input interface in the form of differential signals, namely, one voltage signal is a reference level signal.

Fig. 9 is a schematic diagram of a hardware structure of a motherboard according to an embodiment of the present invention. As shown in fig. 9, the main board 200 includes:

a processor 201, a memory 202 and a computer program;

optionally, the processor 201 is specifically a main chip in the present solution, and the memory 202 is specifically a Double Data Rate (DDR) and/or a memory (embc).

The computer program is stored in the memory 202, and the processor 201 executes the computer program to implement the control method of the display panel described in any method embodiment.

Fig. 9 is a simple design of a motherboard, the number of processors and memories in the motherboard is not limited in the embodiment of the present invention, and fig. 9 only illustrates the number of 1 as an example.

Alternatively, the memory 202 may be separate or integrated with the processor 201.

When the memory 202 is provided separately, the motherboard further comprises a bus 203 for connecting the memory 202 and the processor 201.

An embodiment of the present invention further provides a computer-readable storage medium, where a computer executing instruction is stored in the computer-readable storage medium, and when a processor executes the computer executing instruction, the method for controlling a display panel is implemented as described above.

Those of ordinary skill in the art will understand that: all or a portion of the steps of implementing the above-described method embodiments may be performed by hardware associated with program instructions. The program may be stored in a computer-readable storage medium. When executed, the program performs steps comprising the method embodiments described above; and the aforementioned storage medium includes: various media that can store program codes, such as ROM, RAM, magnetic or optical disks.

Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; while the invention has been described in detail and with reference to the foregoing embodiments, it will be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A test apparatus, the apparatus comprising: the display device comprises a main board and a display module connected with the main board, wherein a screen driving circuit is arranged in the main board, and the display module comprises a display panel;

the main board is used for acquiring a control instruction and generating a screen-up signal and a screen control signal corresponding to the display module according to the control instruction; the control instruction is generated by the mainboard through detecting user operation or detecting a preset file; the screen control signal comprises GAMMA correction GAMMA voltage, a voltage control signal for providing power supply for the display panel and a driving control voltage for driving the display panel to display;

the display module is configured to display according to the screen-up signal and/or the screen control signal.

2. The device of claim 1, wherein the display module comprises a first display module, the first display module comprising a first display panel and a switching circuit connected to the first display panel; if the control instruction is a first control instruction for instructing the main board to generate a signal corresponding to the first display panel, the output end of the main board is connected with the input end of the first display panel through the switching circuit;

3. The apparatus of claim 2, further comprising: a control signal detection module;

4. The apparatus of claim 3, wherein the transfer circuit comprises: a screen control signal processing module;

the level conversion submodule is used for boosting the digital signal.

5. The apparatus of claim 4, wherein the transfer circuit further comprises: a line sequence arrangement module;

6. The apparatus of claim 3, wherein the transfer circuit comprises: the power supply device comprises an input socket, an output socket and a power supply module;

7. The apparatus of claim 6, wherein the input socket of the patching circuit is two 60pin sockets and the output socket of the patching circuit is a 51pin socket.

8. The apparatus of claim 6, wherein the patching circuit further comprises: a control signal output terminal;

9. The device of claim 1, wherein the display module comprises a second display module comprising a second display panel; if the control instruction is a second control instruction for instructing the main board to generate a signal corresponding to the second display panel, the output end of the main board is connected with the input end of the second display panel;

10. The apparatus of claim 1 or 9, wherein the main board comprises: the system comprises a main chip, a power management PMU module, a GAMMA correction GAMMA module, a level conversion module and an output socket; the main chip is an integrated chip of an SOC chip and a TCON chip;