CN112738777B - Near field communication device and method, readable storage medium and processor - Google Patents
Near field communication device and method, readable storage medium and processor Download PDFInfo
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- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04W—WIRELESS COMMUNICATION NETWORKS
- H04W4/00—Services specially adapted for wireless communication networks; Facilities therefor
- H04W4/80—Services using short range communication, e.g. near-field communication [NFC], radio-frequency identification [RFID] or low energy communication
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- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/0003—Software-defined radio [SDR] systems, i.e. systems wherein components typically implemented in hardware, e.g. filters or modulators/demodulators, are implented using software, e.g. by involving an AD or DA conversion stage such that at least part of the signal processing is performed in the digital domain
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Abstract
The invention discloses a near field communication device and method, a readable storage medium and a processor. Wherein, the device includes: the analog-to-digital converter is used for converting the near field communication analog signal into a digital signal; the decoding module is connected with the analog-to-digital converter and used for decoding the digital signal to obtain a decoded signal, and the decoding module is realized by on-chip resources of the programmable logic array; the microcontroller is connected with the analog-to-digital converter and the decoding module and is used for controlling the conversion speed of the analog-to-digital converter based on the overflow signal fed back by the decoding module; and the output module is connected with the decoding module and used for outputting the decoding signal. The invention solves the technical problems of larger resource occupation, higher cost and lower working efficiency of the programmable logic array in the related technology.
Description
Technical Field
The present invention relates to the field of integrated circuits, and in particular, to a near field communication device and method, a readable storage medium, and a processor.
Background
Near Field Communication (NFC) is widely applied as a non-contact Communication mode, but NFC has a relatively complex Communication protocol, so that a Programmable logic Array (FPGA) is generally required to process NFC, and the FPGA has the advantages of Field programmability, design-based simulation verification, flexible configuration and the like.
In a conventional design, as shown in fig. 1, an NFC communication system based on an FPGA is composed of two main parts, namely a demodulation Circuit 11 and a decoding Circuit 12, where the decoding Circuit 12 is completely implemented by internal logic resources of the FPGA 10, and a control module 13 of the demodulation Circuit 11 is composed of internal logic resources of the FPGA 10 and a (printed Circuit board) Circuit board of an Analog-to-Digital Converter (ADC) mounted externally, where the demodulation Circuit 11 is configured to receive and demodulate an NFC signal, output the demodulated signal to the decoding Circuit 12, and decode the demodulated signal by the decoding Circuit 12 to obtain data output.
Although the implementation method is simple in structure and easy to implement, the occupation of FPGA resources is high, and when the occupation of FPGA internal resources is excessive, the layout and winding of the whole FPGA can be affected, so that the time sequence characteristic is reduced, the maximum working frequency is reduced, the working efficiency of the whole system is reduced, the simulation and debugging difficulty of the system in the later stage is increased, and the time for putting the system into the market is prolonged. And the FPGA chip with more resources is selected, so that the software and hardware design cost is multiplied. In addition, the decoding circuit also comprises a PCB circuit board carrying an ADC outside the FPGA, the circuit board increases the hardware design cost, and meanwhile, the development time cost is increased due to the linkage debugging with the FPGA.
In view of the above problems, no effective solution has been proposed.
Disclosure of Invention
Embodiments of the present invention provide a near field communication device and method, a readable storage medium, and a processor, so as to at least solve the technical problems of large resource occupation, high cost, and low working efficiency of a programmable logic array in the related art.
According to an aspect of an embodiment of the present invention, there is provided a near field communication device including: the analog-to-digital converter is used for converting the near field communication analog signal into a digital signal; the decoding module is connected with the analog-to-digital converter and used for decoding the digital signal to obtain a decoded signal, and the decoding module is realized by on-chip resources of the programmable logic array; the microcontroller is connected with the analog-to-digital converter and the decoding module and is used for controlling the conversion speed of the analog-to-digital converter based on the overflow signal fed back by the decoding module; and the output module is connected with the decoding module and used for outputting the decoding signal.
Optionally, the decoding module comprises: the first-in first-out sub-module is connected with the analog-to-digital converter and used for caching the digital signal sent by the analog-to-digital converter and outputting an overflow signal to the microcontroller; and the data decoding submodule is connected with the first-in first-out submodule and used for decoding the digital signal according to the near field communication protocol to obtain a decoded signal.
Optionally, the decoding module comprises: the first-in first-out sub-module is connected with the analog-to-digital converter and used for caching the digital signal sent by the analog-to-digital converter and outputting an overflow signal to the microcontroller; the serial-parallel conversion sub-module is connected with the first-in first-out sub-module and is used for converting serial data output by the first-in first-out sub-module into parallel data; and the data decoding submodule is connected with the serial-parallel conversion submodule and used for decoding the parallel data according to the near field communication protocol to obtain a decoding signal.
Optionally, the decoding module further comprises: the parallel-serial conversion submodule is connected with the data decoding submodule and used for converting the decoding signal according to a universal serial bus protocol to obtain converted data; and the output module is connected with the parallel-serial conversion submodule and used for outputting the converted data.
Optionally, the microcontroller is further configured to enter a standby state after the near field communication device is powered on; the analog-to-digital converter is also used for sending an activation signal under the condition of detecting the near field communication analog signal; the microcontroller is also used for controlling the work of the analog-digital converter based on the activation signal.
Optionally, the analog-to-digital converter is further configured to send a termination signal in a case where the near field communication analog signal is not detected; the microcontroller is also used for controlling the analog-to-digital converter to stop working based on the termination signal.
Optionally, the microcontroller is further configured to control the analog-to-digital converter to suspend operation when the overflow signal is digital signal overflow; and controlling the analog-to-digital converter to continue working under the condition that the overflow signal is the digital signal and does not overflow.
Optionally, the analog-to-digital converter and the microcontroller communicate over an advanced high performance bus.
Optionally, the digital signal is transmitted to the decoding module through a common routing resource of the programmable logic array.
According to another aspect of the embodiments of the present invention, there is also provided a near field communication method, including: receiving a near field communication analog signal through an analog-to-digital converter; converting the near-field communication analog signal into a digital signal through an analog-to-digital converter; decoding the digital signal through a decoding module to obtain a decoding signal, wherein the decoding module is realized by on-chip resources of a programmable logic array, and the conversion speed of an analog-to-digital converter is controlled by a microcontroller based on an overflow signal fed back by the decoding module; and outputting the decoding signal through the output module.
Optionally, before converting the near-field communication analog signal into a digital signal by the analog-to-digital converter, the method further comprises: sending an activation signal to a microcontroller through an analog-to-digital converter, wherein the microcontroller is in a standby state after being powered on; and controlling the analog-to-digital converter to work based on the activation signal through the microcontroller.
Optionally, in a case where the analog-to-digital converter does not detect the near field communication analog signal, the method further includes: sending a termination signal to the microcontroller through the analog-to-digital converter; and controlling the analog-to-digital converter to stop working based on the termination signal through the microcontroller.
Optionally, in the process of converting the near-field communication analog signal into the digital signal through the analog-to-digital converter, the method further comprises: under the condition that the overflow signal is digital signal overflow, the microcontroller controls the analog-to-digital converter to pause working; and under the condition that the overflow signal is a digital signal and does not overflow, controlling the analog-to-digital converter to continue working through the microcontroller.
According to another aspect of the embodiments of the present invention, there is also provided a computer-readable storage medium, where the computer-readable storage medium includes a stored program, and when the program runs, the apparatus where the computer-readable storage medium is located is controlled to execute the above-mentioned near field communication method.
According to another aspect of the embodiments of the present invention, there is also provided a processor, configured to execute a program, where the program executes the near field communication method.
In the embodiment of the invention, the near-field communication analog signal can be converted into the digital signal through the analog-to-digital converter, the digital signal is decoded through the decoding module to obtain the decoded signal, and the decoded signal is output through the output module, wherein the conversion speed of the analog-to-digital converter can be controlled by the microcontroller based on the overflow signal fed back by the decoding module. It is easy to notice that an FPGA Chip with SoC (System on a Chip) architecture embedded with MCU can be used, and MCU is used to realize the function of control module, so as to achieve the technical effects of low software and hardware economic cost, high execution efficiency, high hardware integration level and short development cycle, and further solve the technical problems of large resource occupation, high cost and low working efficiency of the programmable logic array in the related art.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the invention and together with the description serve to explain the invention without limiting the invention. In the drawings:
fig. 1 is a schematic diagram of an NFC communication system according to the prior art;
fig. 2 is a schematic diagram of a near field communication device according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of a decoding module according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of another decoding module according to an embodiment of the present invention;
FIG. 5 is a flow diagram of an alternative control module implementation flow according to an embodiment of the present invention;
fig. 6 is a flowchart of a near field communication method according to an embodiment of the present invention.
Detailed Description
In order to make the technical solutions of the present invention better understood, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It should be noted that the terms "first," "second," and the like in the description and claims of the present invention and in the drawings described above are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the invention described herein are capable of operation in other sequences than described or illustrated herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
Example 1
According to an embodiment of the present invention, a near field communication device is provided.
Fig. 2 is a schematic diagram of a near field communication device according to an embodiment of the present invention, as shown in fig. 2, the device includes:
and the analog-to-digital converter 11 is used for converting the near field communication analog signal into a digital signal.
The analog-to-digital converter 11 may be an ADC embedded in the FPGA 10, and the ADC IP hardcore may receive the NFC signal, where the NFC signal is an analog signal, and therefore, the ADC IP hardcore may perform analog-to-digital conversion on the received NFC signal, convert the received NFC signal into a digital signal, and achieve the purpose of signal conversion.
Alternatively, the digital signals may be transmitted to the decode module 12 via a common routing resource of the programmable logic array 10.
And the decoding module 12 is connected to the analog-to-digital converter 11 and configured to decode the digital signal to obtain a decoded signal, where the decoding module is implemented by an on-chip resource of the programmable logic array 10.
The decoding module 12 can be realized by logic resources in the FPGA 10, and is used for realizing the purpose of signal decoding, and makes full use of abundant logic resources and programmable elastic characteristics in the FPGA 10. For the NFC signal, since it uses the NFC protocol for signal transmission, the decoding module 12 may use the NFC protocol for decoding to obtain a decoded signal.
And the microcontroller 13 is connected with the analog-to-digital converter 11 and the decoding module 12 and is used for controlling the conversion speed of the analog-to-digital converter 11 based on the overflow signal fed back by the decoding module 12.
The microcontroller 13 may be an MCU embedded in the FPGA 10, and the conversion process of the entire NFC analog signal may be controlled by the MCU, and meanwhile, the program inside the MCU may automatically obtain the overflow signal of the decoding module 12, so as to adjust the conversion speed of the ADC in real time.
Optionally, the analog-to-digital converter 11 and the microcontroller 13 may communicate with each other through an Advanced High-performance Bus (AHB), so as to achieve the purpose of High-speed control.
And the output module 14 is connected with the decoding module 12 and used for outputting the decoded signal.
The output module 14 may be a USB (Universal Serial Bus) module.
In an alternative embodiment, the decoding module 12 may transmit the decoded signal to the USB IP hardcore for output by the USB module.
According to the technical scheme provided by the embodiment of the invention, the near-field communication analog signal can be converted into the digital signal through the analog-to-digital converter, the digital signal is decoded through the decoding module to obtain the decoded signal, and the decoded signal is output through the output module, wherein the conversion speed of the analog-to-digital converter can be controlled by the microcontroller based on the overflow signal fed back by the decoding module. It is easy to notice that an FPGA Chip with SoC (System on a Chip) architecture embedded with MCU can be used, and MCU is used to realize the function of control module, so as to achieve the technical effects of low software and hardware economic cost, high execution efficiency, high hardware integration level and short development cycle, and further solve the technical problems of large resource occupation, high cost and low working efficiency of the programmable logic array in the related art.
Optionally, in the above embodiment of the present invention, as shown in fig. 3, the decoding module 12 includes:
the fifo module 121 is connected to the adc 11, and is configured to buffer the digital signal sent by the adc 11 and output an overflow signal to the microcontroller 13.
The FIFO 121 may be a FIFO (First Input First Output), that is, the First data stored in the queue is First taken out and can be used as a buffer of the system.
In an alternative embodiment, after the analog-to-digital converter 11 converts the NFC analog signal into a digital signal, since the decoding process requires time and can only decode a certain amount of digital signal, a FIFO may be disposed in the decoding module 12 to buffer the digital signal sent from the ADC through the FIFO, so as to improve the overall stability and the operation speed of the system, and meanwhile, the FIFO has a function of outputting an overflow signal to feed back the overflow signal to the MCU control module to control the conversion speed of the ADC.
And the data decoding submodule 122 is connected with the first-in first-out submodule 121 and is used for decoding the digital signal according to the near field communication protocol to obtain a decoded signal.
The data decoding sub-module 122 is configured to process the digital signal obtained by quantizing the NFC analog signal, and decode the digital signal according to an NFC protocol to obtain a decoded signal.
Optionally, in the above embodiment of the present invention, as shown in fig. 4, the decoding module 12 includes:
the fifo module 121 is connected to the adc 11, and is configured to buffer the digital signal sent by the adc 11 and output an overflow signal to the microcontroller 13.
The serial-to-parallel conversion sub-module 123 is connected to the fifo sub-module 121, and is configured to convert serial data output by the fifo sub-module 121 into parallel data.
And the data decoding submodule 122 is connected with the serial-parallel conversion submodule 123 and is used for decoding the parallel data according to the near field communication protocol to obtain a decoded signal.
In an alternative embodiment, the digital signal after ADC conversion is serial data, and in order to realize signal decoding, a serial-to-parallel conversion sub-module 123 may be provided in the decoding module 12, and the serial data output by the FIFO is converted into parallel data by the serial-to-parallel conversion sub-module 123, so as to facilitate the decoding process of the data decoding sub-module 122.
Optionally, in the above embodiment of the present invention, as shown in fig. 3 and fig. 4, the decoding module 12 further includes: and the parallel-serial conversion sub-module 124 is connected with the data decoding sub-module 122 and is used for converting the decoded signal according to the universal serial bus protocol to obtain converted data.
The output module 14 is connected to the parallel-serial conversion submodule 124, and is configured to output the converted data.
In an alternative embodiment, the signal decoding processing process implemented by the data decoding submodule 122 does not change the data type, and therefore, the decoded signal is still parallel data, and therefore, the parallel-to-serial conversion submodule 124 may be disposed in the decoding module 12, and the parallel data of the data decoding submodule 122 is received by the parallel-to-serial conversion submodule 124, and is converted into data suitable for the USB protocol, and transmitted to the USB IP hardcore, and the USB module outputs the data.
Optionally, in the above embodiment of the present invention, the microcontroller 13 is further configured to enter a standby state after the near field communication device is powered on; the analog-to-digital converter 11 is further configured to send an activation signal when the near field communication analog signal is detected; the microcontroller 13 is also used to control the operation of the analog-to-digital converter 11 based on the activation signal.
In an alternative embodiment, as shown in fig. 5, after the whole system is powered on, the MCU resets and enters a standby state, that is, a standby state, waits for the ADC to send an activation signal, the ADC activates the MCU after detecting the NFC signal, and the MCU starts to operate and controls the ADC to perform analog-to-digital conversion.
Optionally, in the above embodiment of the present invention, the analog-to-digital converter 11 is further configured to send a termination signal in a case that the near field communication analog signal is not detected; the microcontroller 13 is also arranged to control the analog-to-digital converter to stop operating based on the termination signal.
In an optional embodiment, as shown in fig. 5, after the NFC signal leaves the field, the ADC cannot detect the NFC analog signal, a termination signal may be sent to the MCU, the analog-to-digital conversion is finished, otherwise, the MCU continues to control the ADC to perform the analog-to-digital conversion.
Optionally, in the above embodiment of the present invention, the microcontroller 13 is further configured to control the analog-to-digital converter 11 to suspend operation in a case that the overflow signal is a digital signal overflow; and controlling the analog-to-digital converter 11 to continue working under the condition that the overflow signal is the digital signal and is not overflowed.
In an alternative embodiment, as shown in fig. 5, the MCU may patrol the overflow flag bit of the FIFO, determine the output signal according to the overflow flag bit, determine that the overflow signal is that the FIFO does not overflow when the flag bit is invalid, continue the analog-to-digital conversion, and output the digital signal to be stored in the FIFO; when the flag bit is valid, the overflow signal can be determined as FIFO overflow, the analog-to-digital conversion needs to be suspended until the flag bit becomes invalid, and the analog-to-digital conversion is continued.
Through the scheme, the invention provides the near field communication device based on the FPGA, the decoding module is realized by utilizing the elastic programmable characteristic of the FPGA, the control of the ADC IP hard core is realized by utilizing the peripheral management capability of the MCU, and the MCU, the decoding module and the ADC are all integrated in the FPGA, so that the abundant resources of the FPGA are fully utilized. The device provided by the invention can efficiently complete the acquisition and decoding of the NFC signal, and has the advantages of low economic cost, high execution efficiency and short verification period.
Example 2
In accordance with an embodiment of the present invention, there is provided a near field communication method, it should be noted that the steps shown in the flowchart of the figure may be executed in a computer system such as a set of computer executable instructions, and that although a logical order is shown in the flowchart, in some cases, the steps shown or described may be executed in an order different from that shown.
The near field communication method provided by the embodiment of the present invention may be executed by the near field communication device in the above embodiment, and the specific implementation scheme and the preferred application scenario are the same as those in the above embodiment, and are not described herein again.
Fig. 6 is a flowchart of a near field communication method according to an embodiment of the present invention, as shown in fig. 6, the method includes the following steps:
step S602, receiving the near field communication analog signal through the analog-to-digital converter.
Step S604, the near field communication analog signal is converted into a digital signal by an analog-to-digital converter.
And step S606, decoding the digital signal through a decoding module to obtain a decoding signal, wherein the decoding module is realized by on-chip resources of the programmable logic array, and the conversion speed of the analog-to-digital converter is controlled by the microcontroller based on an overflow signal fed back by the decoding module.
In step S608, the decoded signal is output through the output module.
Optionally, in the foregoing embodiment of the present invention, decoding the digital signal by using the decoding module to obtain the decoded signal includes: the digital signal sent by the analog-to-digital converter is cached through the first-in first-out submodule, and an overflow signal is output to the microcontroller; and decoding the digital signal through the data decoding submodule according to the near field communication protocol to obtain a decoded signal.
Optionally, in the foregoing embodiment of the present invention, decoding the digital signal by using the decoding module to obtain the decoded signal includes: the digital signal sent by the analog-to-digital converter is cached through the first-in first-out submodule, and an overflow signal is output to the microcontroller; converting serial data output by the first-in first-out sub-module into parallel data through the serial-parallel conversion sub-module; and decoding the parallel data by the data decoding submodule according to the near field communication protocol to obtain a decoded signal.
Optionally, in the above embodiment of the present invention, after the data decoding submodule decodes the parallel data according to the near field communication protocol to obtain a decoded signal, the method further includes: converting the decoding signal by the parallel-serial conversion submodule according to a universal serial bus protocol to obtain converted data; and outputting the converted data through an output module.
Optionally, in the above embodiment of the present invention, before converting the near-field communication analog signal into a digital signal by the analog-to-digital converter, the method further includes: sending an activation signal to a microcontroller through an analog-to-digital converter, wherein the microcontroller is in a standby state after being powered on; and controlling the analog-to-digital converter to work based on the activation signal through the microcontroller.
Optionally, in the above embodiment of the present invention, in a case that the analog-to-digital converter does not detect the near field communication analog signal, the method further includes: sending a termination signal to the microcontroller through the analog-to-digital converter; and controlling the analog-to-digital converter to stop working based on the termination signal through the microcontroller.
Optionally, in the above embodiment of the present invention, in the process of converting the near-field communication analog signal into the digital signal by the analog-to-digital converter, the method further includes: under the condition that the overflow signal is digital signal overflow, the microcontroller controls the analog-to-digital converter to pause working; and under the condition that the overflow signal is a digital signal and does not overflow, controlling the analog-to-digital converter to continue working through the microcontroller.
Example 3
According to an embodiment of the present invention, a computer-readable storage medium is provided, where the computer-readable storage medium includes a stored program, and when the program runs, the apparatus where the computer-readable storage medium is located is controlled to execute the near field communication method in embodiment 2.
Example 4
According to an embodiment of the present invention, a processor is provided, and the processor is configured to execute a program, where the program executes the near field communication method in embodiment 2.
The above-mentioned serial numbers of the embodiments of the present invention are merely for description and do not represent the merits of the embodiments.
In the above embodiments of the present invention, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.
In the embodiments provided in the present application, it should be understood that the disclosed technology can be implemented in other ways. The above-described embodiments of the apparatus are merely illustrative, and for example, the division of the units may be a logical division, and in actual implementation, there may be another division, for example, multiple units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, units or modules, and may be in an electrical or other form.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, functional units in the embodiments of the present invention may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit.
The integrated unit, if implemented in the form of a software functional unit and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present invention may be embodied in the form of a software product, which is stored in a storage medium and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present invention. And the aforementioned storage medium includes: a U-disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a removable hard disk, a magnetic or optical disk, and other various media capable of storing program codes.
The foregoing is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, various modifications and decorations can be made without departing from the principle of the present invention, and these modifications and decorations should also be regarded as the protection scope of the present invention.
Claims (14)
1. A near field communication device, comprising:
the analog-to-digital converter is used for converting the near-field communication analog signal into a digital signal, the analog-to-digital converter is embedded in the programmable logic array, and the analog-to-digital converter is realized by an ADC (analog-to-digital converter) IP (Internet protocol) hard core of the programmable logic array;
the decoding module is connected with the analog-to-digital converter and used for decoding the digital signal to obtain a decoded signal, and the decoding module is realized by on-chip resources of the programmable logic array;
the microcontroller is connected with the analog-to-digital converter and the decoding module and used for controlling the conversion speed of the analog-to-digital converter in real time based on an overflow signal fed back by the decoding module, and the microcontroller is realized by an MCUIP hard core of the programmable logic array;
the output module is connected with the decoding module and used for outputting the decoding signal, and the output module is realized by a USB IP hard core of the programmable logic array;
the decoding module includes:
the first-in first-out module is connected with the analog-to-digital converter and used for caching the digital signal sent by the analog-to-digital converter and outputting the overflow signal to the microcontroller;
and the data decoding submodule is connected with the first-in first-out submodule and used for decoding the digital signal according to a near field communication protocol to obtain the decoded signal.
2. The apparatus of claim 1, wherein the decoding module comprises:
the first-in first-out module is connected with the analog-to-digital converter and used for caching the digital signal sent by the analog-to-digital converter and outputting the overflow signal to the microcontroller;
the serial-parallel conversion sub-module is connected with the first-in first-out sub-module and is used for converting serial data output by the first-in first-out sub-module into parallel data;
and the data decoding submodule is connected with the serial-parallel conversion submodule and used for decoding the parallel data according to the near field communication protocol to obtain the decoding signal.
3. The device according to claim 1 or 2,
the decoding module further comprises: the parallel-serial conversion submodule is connected with the data decoding submodule and used for converting the decoding signal according to a universal serial bus protocol to obtain converted data;
and the output module is connected with the parallel-serial conversion submodule and used for outputting the converted data.
4. The apparatus of claim 1,
the microcontroller is also used for entering a standby state after the near field communication device is powered on;
the analog-to-digital converter is also used for sending an activation signal under the condition of detecting the near field communication analog signal;
the microcontroller is also used for controlling the analog-to-digital converter to work based on the activation signal.
5. The apparatus of claim 1,
the analog-to-digital converter is also used for sending a termination signal under the condition that the near field communication analog signal is not detected;
the microcontroller is also used for controlling the analog-to-digital converter to stop working based on the termination signal.
6. The apparatus of claim 1, wherein the microcontroller is further configured to control the analog-to-digital converter to suspend operation if the overflow signal is the digital signal overflow; and controlling the analog-to-digital converter to continue working under the condition that the overflow signal is that the digital signal does not overflow.
7. The apparatus of claim 1, wherein the analog-to-digital converter and the microcontroller communicate over an advanced high performance bus.
8. The apparatus of claim 7, wherein the digital signal is transmitted to the decode module via a common routing resource of the programmable logic array.
9. A near field communication method, comprising:
receiving a near-field communication analog signal through an analog-to-digital converter, wherein the analog-to-digital converter is embedded in a programmable logic array and is realized by an ADC IP (analog-to-digital converter) hard core of the programmable logic array;
converting the near field communication analog signal into a digital signal through the analog-to-digital converter;
decoding the digital signal through a decoding module to obtain a decoded signal, wherein the decoding module is realized by on-chip resources of the programmable logic array, the conversion speed of the analog-to-digital converter is controlled in real time by a microcontroller based on an overflow signal fed back by the decoding module, and the microcontroller is realized by an MCUIP (multi-core unified power unit) hardcore of the programmable logic array;
outputting the decoded signal through an output module, wherein the output module is realized by a USB IP hard core of the programmable logic array;
decoding the digital signal through a decoding module to obtain a decoded signal, wherein the decoding module comprises: buffering the digital signal sent by the analog-to-digital converter through a first-in first-out sub-module, and outputting the overflow signal to the microcontroller; and decoding the digital signal through the data decoding submodule according to a near field communication protocol to obtain the decoded signal.
10. The method of claim 9, wherein prior to converting the near field communication analog signal to a digital signal by the analog-to-digital converter, the method further comprises:
sending an activation signal to the microcontroller through the analog-to-digital converter, wherein the microcontroller is in a standby state after being powered on;
controlling, by the microcontroller, the analog-to-digital converter to operate based on the activation signal.
11. The method of claim 9, wherein in the event that the analog-to-digital converter does not detect the near-field communication analog signal, the method further comprises:
sending a termination signal to the microcontroller through the analog-to-digital converter;
controlling, by the microcontroller, the analog-to-digital converter to stop operating based on the termination signal.
12. The method of claim 9, wherein in converting the near field communication analog signal to a digital signal via the analog-to-digital converter, the method further comprises:
under the condition that the overflow signal is the overflow of the digital signal, controlling the analog-to-digital converter to pause working through the microcontroller;
and under the condition that the overflow signal is that the digital signal does not overflow, controlling the analog-to-digital converter to continue working through the microcontroller.
13. A computer-readable storage medium, comprising a stored program, wherein the program, when executed, controls a programmable logic array to perform the near field communication method of any of claims 9 to 12.
14. A programmable logic array, wherein the programmable logic array is configured to run a program, wherein the program is configured to perform the near field communication method of any one of claims 9 to 12 when running.
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