CN112713242A - Preparation method of phase change memory based on nano current channel - Google Patents

Preparation method of phase change memory based on nano current channel Download PDF

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CN112713242A
CN112713242A CN202011566277.2A CN202011566277A CN112713242A CN 112713242 A CN112713242 A CN 112713242A CN 202011566277 A CN202011566277 A CN 202011566277A CN 112713242 A CN112713242 A CN 112713242A
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layer
phase change
metal
insulating
nano
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CN112713242B (en
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程晓敏
李瀚�
曾运韬
朱云来
刘香君
缪向水
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Huazhong University of Science and Technology
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
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    • H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/20—Multistable switching devices, e.g. memristors
    • H10N70/231—Multistable switching devices, e.g. memristors based on solid-state phase change, e.g. between amorphous and crystalline phases, Ovshinsky effect
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/011—Manufacture or treatment of multistable switching devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
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    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

The invention discloses a preparation method of a phase change memory based on a nano current channel, which comprises the following steps: growing a first electrode layer on a substrate; depositing and growing an insulating layer on the first electrode layer; etching the insulating layer to the first electrode layer by using a photoetching process, and forming a groove with a metal electrode layer at the bottom; preparing a nano current channel layer with metal grains in the groove, wherein the metal grains penetrate through the thickness of the layer; depositing a phase change material over the nanocurrent channel layer; depositing a second electrode layer over the phase change material forms a phase change memory having a nanocurrent channel layer. According to the invention, the contact area between the phase change layer and the electrode layer is greatly reduced through the nanoscale conductive channel, the current density of a local contact part is greatly improved, and the heat generation efficiency of current in the phase change layer is improved; the electric heat utilization efficiency of the phase change layer is improved; and the process is simple, so that the phase change memory can easily realize the reduction of the operation power consumption.

Description

Preparation method of phase change memory based on nano current channel
Technical Field
The invention belongs to the technical field of phase change memory, and particularly relates to a preparation method of a phase change memory based on a nano current channel.
Background
With the advent of the information age, memories have occupied more and more important positions in life, and the research of memories is continuously developed towards high speed, low power consumption and high stability. Among them, phase change memories (PCRAMs) fabricated using phase change properties of materials have great potential in the semiconductor market.
The basic principle of the phase change memory is that: the phase-change material can be reversibly converted between the crystalline state and the amorphous state, and the data storage of '1' and '0' is realized by using the huge resistance value difference presented between different states of the material. The commonly used phase change material is chalcogenide, and the switching between the crystalline state and the amorphous state of chalcogenide can be easily controlled by controlling the amplitude and the pulse width of the applied pulse current, and binary data stored in the phase change memory is read out through measuring the resistance. The phase change memory has the advantages of high read-write speed, high storage density, compatibility with the traditional CMOS process and the like.
In all new memory technologies, the phase change memory is located to replace the DRAM, and although the speed of the phase change memory has reached the order of the DRAM speed, the power consumption of the phase change memory needs to be further reduced, and especially in the case of further improving the integration level such as 3D storage, the reduction of the power consumption of the phase change memory cell is also beneficial to reducing the thermal crosstalk between cells.
Since the phase change memory realizes the change of the internal temperature of the device by using the thermal effect of current, thereby realizing the reversible transformation of the phase change material between the crystalline state and the amorphous state, the writing current of the PCRAM unit is proportional to the material quantity participating in the phase change, and the smaller the unit size is, the smaller the writing power consumption of the unit is. In addition, under the condition that the unit size of the device is not changed, the heat generation efficiency (increasing the current density of the phase change region, improving the heat generation efficiency of the phase change material, reducing the melting temperature and the like) and the heat dissipation condition of the write current are strictly controlled, so that the power consumption of the device is reduced.
At present, methods for reducing the power consumption of a phase change memory unit are mainly divided into two types, one type is to adopt a novel low-power-consumption phase change material with high heating efficiency and low melting temperature, and the other type is to change the structure of a device. The most direct method for changing the device structure is to reduce the amount of phase change material and increase the current density by reducing the device size, such as a limited phase change memory cell structure, but this method requires a higher process, and has a high process cost and difficulty. Other methods for changing the device structure, such as edge contact type, asymmetric structure, annular electrode structure, and two-dimensional material thermal resistance layer addition, all reduce the write power consumption of the phase change unit by reducing the material amount participating in the phase change or reducing the heat dissipation of the device as much as possible without increasing the process, but these methods all need to greatly change the device structure and process, and have the problems of high process cost and difficulty.
Disclosure of Invention
Aiming at the defects of the prior art, the invention provides a preparation method of a phase change memory based on a nano current channel, aiming at solving the problems of high process cost and high difficulty in reducing write-in power consumption by changing the structure of the prior device, improving the current density of a contact area, improving the heat production efficiency and improving the heat utilization efficiency, so that the write-in power consumption of the phase change memory can be reduced under the conditions of not reducing the unit size and not improving the process procedure.
The invention provides a preparation method of a phase change memory based on a nano current channel, which comprises the following steps:
(1) growing a first electrode layer on a substrate;
(2) depositing and growing an insulating layer on the first electrode layer;
(3) etching the insulating layer by utilizing a photoetching process until reaching the first electrode layer and forming a groove with a metal electrode layer at the bottom;
(4) preparing a nano current channel layer with metal grains in the groove, wherein the metal grains penetrate through the thickness of the layer;
(5) depositing a phase change material over the nanocurrent channel layer;
(6) depositing a second electrode layer over the phase change material forms a phase change memory having a nanocurrent channel layer.
The invention greatly reduces the contact area between the phase change layer and the electrode layer through the nano-scale conductive channel, greatly improves the current density of local contact parts, and improves the heat generation efficiency of current in the phase change layer. Meanwhile, the insulating and heat insulating material with low electrical conductivity and low heat conductivity prevents heat in the phase change layer from dissipating to the electrode layer, and improves the electric heat utilization efficiency of the phase change layer. Compared with the phase change unit which is made by adopting a more advanced process and is as small as possible, the phase change memory can break through the process limitation, further reduce the effective contact area between the electrode and the phase change material, has simple process and can easily realize the reduction of the operation power consumption.
In the embodiment of the present invention, the nanocurrent channel layer may be prepared by a magnetron sputtering method, a chemical vapor deposition method, a plasma enhanced chemical vapor deposition method, a physical vapor deposition method, a laser pulse deposition method, an evaporation method, an electrochemical growth method, an ion implantation method, a molecular beam epitaxy method, an atomic vapor deposition method, or an atomic layer deposition method.
Specifically, when the nano-current channel layer is prepared by a magnetron sputtering method, the specific sputtering mode is any one of the following four modes: (a) co-sputtering a metal target and an insulating heat-insulating material target; (b) alternately sputtering metal target and insulating heat-insulating material target; (c) directly placing a metal sheet on an insulating heat-insulating material target material for doping sputtering; (d) and directly placing the insulating and heat-insulating material sheet on a metal target for doping sputtering.
Further preferably, the film obtained by sputtering can be placed in a vacuum annealing furnace, and annealing is carried out according to a certain annealing temperature and heat preservation time, so that migration, aggregation and growth of crystal grains of metal atoms in the insulating layer are promoted, and nano metal crystal grains penetrating through the thickness of the nano current channel layer are formed.
Further preferably, the temperature of the substrate in the preparation process is increased, the migration kinetic energy of metal atoms is increased, the aggregation of the metal atoms and the growth of crystal grains of the metal atoms are promoted, and nano metal crystal grains penetrating through the thickness of the nano current channel layer are formed.
Further, the insulating material and the nanochannel material in the nanochannel layer may be selected and matched to ensure that the selected metallic conductive material can easily grow and aggregate into grains in the insulating material.
Further, in the steps (1) and (6), the thickness of the electrode layer is 20 nm-300 nm, and the materials are Au, Ta, Pt, Al, W, Ti, Cu, Ir and metal alloys and metal compounds thereof, such as TiW and TiN.
Furthermore, the method for forming the insulating layer in the step (2) comprises the steps of adopting a magnetron sputtering method, a chemical vapor deposition method and an atomic layer deposition method, wherein the thickness of the insulating layer is 20 nm-200 nm.
Further, the depth of the groove in the step (3) is 20nm to 200 nm.
The invention also provides a phase change memory obtained based on the preparation method, which comprises the following steps: the nano-current channel layer is an insulating layer containing metal nano-crystalline grains penetrating through the thickness of the layer, and current reaches the phase change layer from the electrode layer only through a nano-current channel formed by the metal nano-crystalline grains; the first electrode layer is adjacent to the phase change material, the phase change material layer is adjacent to the nano current channel layer, and the second electrode layer is adjacent to the nano current channel layer; the nanocurrent channel layer is a single layer of insulating layer containing metal nanocrystalline grains throughout the entire layer.
The nano current channel layer is a thin film structure formed by an insulating heat-insulating material and metal nano crystal grains embedded in the insulating heat-insulating material, and the metal nano crystal grains penetrate through the thin film structure to form a nano current channel.
The material of the metal nanocrystalline grains is at least one of elementary metal materials of Fe, Pt, W, Cu, Zn, Al, Ni, Ti, Au and Ag, or an alloy material formed by any two or more of the elementary metal materials of Fe, Pt, W, Cu, Zn, Al, Ni, Ti, Au and Ag, or a compound with good conductivity generated by the elementary metal materials of Fe, Pt, W, Cu, Zn, Al, Ni, Ti, Au and Ag.
Further, the metal nanocrystals of the nanochannel layer have higher electrical conductivity than the insulating material.
Further, the insulating material has a low thermal conductivity, and is any one of silicon oxide, silicon nitride, aluminum oxide, aluminum nitride, zinc oxide, tungsten oxide, titanium oxide, boron nitride, and silicon carbide.
Furthermore, the thickness of the nano current channel layer is 1 nm-30 nm.
Furthermore, the size of the metal nanocrystalline grains in the insulating layer is 1 nm-30 nm, and the size of the metal nanocrystalline grains in the direction vertical to the thin film is not less than the thickness of the nano current channel layer.
Still further, the phase change layer material layer includes a chalcogenide compound including any one of S, Se and Te or an alloy compound formed with other non-chalcogenide materials including one or more of Ge, Sb, Ga, Bi, In, Sn, Pb, Ag, N, and O.
Wherein the phase change material layer comprises GeTe, GeSb and Ge2Sb2Te5、Ge1Sb2Te4，Sb2Te3AgInSbTe, and superlattice phase change materials or heterostructure phase change materials containing sulfur-based compounds, including (GeTe)/(Sb)2Te3)，(GeTe)/(Bi2Te3)，(Sb2Te3)/(TiTe2) GeTe/Sb, (Ge-Sb-Te)/(Sb-Te) or (Ge-Sb-Te)/C.
The phase-change material layer comprises a compound formed by doping and modifying a chalcogenide compound, wherein the doping element comprises at least one of C, N, O, Cu, Cr, Sc and Ti.
The phase change material layer comprises single-element phase change materials Sb or Te.
Furthermore, the thickness of the phase change material layer is 20 nm-200 nm.
Further, the material of the first electrode and the material of the second electrode include simple metal substances of Au, Ta, Pt, Al, W, Ti, Cu, Ir, metal alloys and metal compounds thereof, such as TiW and TiN.
Wherein the thickness of the material of the first electrode and the material of the second electrode is 20 nm-300 nm.
Compared with the phase change memory unit manufactured by adopting a more advanced process as small as possible, the invention can break through the process limitation, further reduce the effective contact area between the electrode and the phase change material under a looser process, greatly improve the current density of a contact area and improve the heat production efficiency; meanwhile, the insulating and heat insulating material with low thermal conductivity in the nano current channel layer can effectively reduce heat loss and improve heat utilization efficiency; with the reduction of the effective contact area, the volume of the phase change region is correspondingly reduced, and the total energy required by phase change is lower, so that the write-in power consumption of the phase change memory can be reduced under the conditions of not reducing the cell size and not improving the process.
In addition, compared with other methods for changing the structure of the device (such as edge contact type, asymmetric structure, annular electrode structure, two-dimensional material thermal resistance increase and the like), the method does not need to change the structure of the device too much, only needs to prepare a layer of nano current channel layer, is very simple in preparation method, is compatible with the preparation method of the phase change layer, greatly reduces the power consumption of the device, and has the advantage of simple process.
Drawings
Fig. 1 is a flowchart illustrating a method for manufacturing a phase change memory based on a nanocurrent channel according to an embodiment of the present invention;
FIG. 2 is a cross-sectional view of an exemplary phase change memory with a nano-current channel layer according to embodiment 1 of the present invention;
FIGS. 3(a) - (i) are process flows for fabricating a device structure with nanocurrent channel in example 3 of the present invention;
FIG. 4(a) is a diagram showing a nano-current channel layer containing Ag grains (the material of the insulating portion is SiO) made in example 4 of the present invention2) A TEM image of (a);
fig. 4(b) is a V-R relationship curve of the phase change memory device having the nano-current channel layer containing Ag grains and the phase change device of the same structure without the layer, in which the pulse width of the applied voltage RESET pulse is 50ns, according to embodiment 4 of the present invention;
FIG. 5(a) is a diagram showing a nano-current channel layer containing Au grains (SiO is used as the material of the insulating portion) in example 5 of the present invention2) A TEM image of (a);
fig. 5(b) is a V-R relationship curve of the phase-change memory device including the Au nanocurrent channel layer and the phase-change device of the same structure without the Au nanocurrent channel layer according to embodiment 5 of the present invention, in which the pulse width of the applied voltage RESET pulse is 50 ns;
FIG. 6 shows several atoms in SiO in example 6 of the present invention2Running a Mean Square Displacement (MSD) of 4ps under the medium 1200K condition;
FIG. 7 shows several atoms in SiO in example 6 of the present invention2The radial distribution function after 10ps of operation at medium 1200K.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
The invention can realize the preparation of the nano current channel layer that the metal crystal grain forms nucleus and grows in the insulating and heat insulating material and the crystal grain size penetrates the thickness of the layer by adopting any one of the following sputtering modes: (a) co-sputtering the metal target and the insulating material target. (b) And alternately sputtering metal target and insulating heat-insulating material target. (c) And directly placing the metal sheet on the target material of the insulating heat-insulating material for doping sputtering. (d) And directly placing the insulating and heat-insulating material sheet on a metal target for doping sputtering. And an annealing process or a substrate heating process can be adopted to promote metal atoms to migrate, nucleate, grow and gather in the insulating layer so as to form metal grains with the grain size penetrating through the thickness of the layer, so that a nano-scale metal conductive channel is formed in the insulating layer, the contact area of the electrode layer and the phase change layer is further reduced, the local current density of the phase change layer is improved, and the erasing power consumption of the phase change memory cell is reduced.
Fig. 1 shows an implementation flow of a method for manufacturing a phase change memory based on a nanocurrent channel according to an embodiment of the present invention, and for convenience of description, only the parts related to the embodiment of the present invention are shown, which are detailed as follows:
the preparation method of the phase change memory based on the nano current channel comprises the following steps:
(1) growing a first electrode layer on a substrate;
(2) depositing and growing an insulating layer on the first electrode layer;
(3) etching the insulating layer by utilizing a photoetching process until reaching the first electrode layer and forming a groove with a metal electrode layer at the bottom;
(4) preparing a nano current channel layer with metal grains in the groove, wherein the metal grains penetrate through the thickness of the layer;
(5) depositing a phase change material over the nanocurrent channel layer;
(6) depositing a second electrode layer over the phase change material forms a phase change memory having a nanocurrent channel layer.
The preparation of the nano current channel layer can be realized by adopting any one of a magnetron sputtering method, a chemical vapor deposition method, a plasma enhanced chemical vapor deposition method, a physical vapor deposition method, a laser pulse deposition method, an evaporation method, an electrochemical growth method, an ion implantation method, a molecular beam epitaxy method, an atomic vapor deposition method and an atomic layer deposition method; the local current density can be increased under the condition of not reducing the size of the device, so that the phase change of the material can be completed, and the purpose of reducing the power consumption required by the device is achieved.
Further preferably, when the nano-current channel layer is prepared by a magnetron sputtering method, the specific sputtering mode is any one of the following four: (a) co-sputtering a metal target and an insulating heat-insulating material target; (b) alternately sputtering metal target and insulating heat-insulating material target; (c) directly placing a metal sheet on an insulating heat-insulating material target material for doping sputtering; (d) and directly placing the insulating and heat-insulating material sheet on a metal target for doping sputtering.
Specifically, the sputtered film may be placed in a vacuum annealing furnace, and annealed at a certain annealing temperature and for a certain heat-preserving time, so as to promote migration and aggregation of metal atoms in the insulating layer and growth of grains, thereby forming nano-metal grains penetrating through the thickness of the nano-current channel layer.
Further preferably, the temperature of the substrate in the preparation process is increased, the migration kinetic energy of metal atoms is increased, the aggregation of the metal atoms and the growth of crystal grains of the metal atoms are promoted, and nano metal crystal grains penetrating through the thickness of the nano current channel layer are formed.
In the process of preparing the nano current channel layer, the insulating heat-insulating material and the nano current channel material in the nano current channel layer are selected and matched so as to ensure that the selected metal conductive material can easily grow and be aggregated into grains in the insulating heat-insulating material. Specifically, the mean square displacement of metal atoms in the insulating and heat insulating material can be calculated through software such as VASP, Materials Studio, LAMMPS and the like through a first principle and molecular dynamics, and energy, a radial distribution function and the like are formed to screen metal simple substances and metal alloys matched with the insulating and heat insulating material.
In an embodiment of the present invention, the phase change memory obtained based on the above preparation method includes: a first electrode layer adjacent to the phase change material; a phase change material layer; a nanocurrent channel layer adjacent to the phase change material and being a single layer of insulating layer containing metallic nanocrystals that pass through the entire layer; and a second electrode adjacent to the nanocurrent channel layer. The nano current channel layer is a thin film structure formed by an insulating heat-insulating material and metal nano crystal grains embedded in the insulating heat-insulating material, and the metal nano crystal grains penetrate through the thin film structure to form a nano current channel.
A layer of nano current channel layer is inserted between an electrode and a phase change layer in a phase change memory, wherein nano grains are formed by growing and aggregating high-conductivity metal or metal compounds in low-conductivity low-thermal-conductivity insulating materials, and the nano grains grow under certain process conditions and can penetrate through an insulating layer to form a conductive nano current channel. The nano current channel layer is used for limiting the path of current, so that the current enters the phase change layer from the high-conductivity nano crystal grains when flowing through the layer, the current is limited in the nano current channel, the nano conductive channel greatly reduces the contact area between the phase change layer and the electrode layer, the current density of a local contact part is greatly improved, and the heat generation efficiency of the current in the phase change layer is improved. Meanwhile, the part of the nano current channel layer, except the high-conductivity nano crystal grains, is an insulating and heat-insulating material with low conductivity and low heat conductivity, and the low heat conductivity prevents heat in the phase change layer from dissipating to the electrode layer, so that the effect of thermal resistance is achieved, the electric heat utilization efficiency of the phase change layer is improved, and the writing power consumption of the device is further reduced.
The material of the metal nanocrystalline grains comprises a metal simple substance, a metal compound and a metal alloy.
Preferably, the metal nanocrystalline grain material is at least one of elementary metal materials of Fe, Pt, W, Cu, Zn, Al, Ni, Ti, Au and Ag, or an alloy material formed by any two or more of the elementary metal materials of Fe, Pt, W, Cu, Zn, Al, Ni, Ti, Au and Ag, or a compound with good conductivity generated by the elementary metal materials of Fe, Pt, W, Cu, Zn, Al, Ni, Ti, Au and Ag.
The insulating heat-insulating material is at least one of silicon oxide, silicon nitride, aluminum oxide, aluminum nitride, zinc oxide, tungsten oxide, titanium oxide, boron nitride and silicon carbide. The insulating material is required to have a low thermal conductivity.
Wherein the thickness of the nano current channel layer is 1 nm-30 nm. The size of the metal nanocrystalline grains in the insulating layer is 1 nm-30 nm, and the size of the metal nanocrystalline grains in the direction vertical to the film is not less than the thickness of the nano current channel layer.
The phase change layer material comprises a chalcogenide compound and a single element phase change material.
Preferably, the chalcogenide compound comprises an alloy compound formed by one of S, Se and Te and other non-chalcogenide materials, wherein the non-chalcogenide materials comprise one or more of Ge, Sb, Ga, Bi, In, Sn, Pb, Ag, N and O.
Preferably, the sulfur-based compound includes GeTe, GeSb, Ge2Sb2Te5、Ge1Sb2Te4，Sb2Te3、AgInSbTe。
More preferably, the chalcogenide compound comprises a compound formed by doping modification of the alloy compound, wherein the doping element comprises at least one of C, N, O, Cu, Cr, Sc and Ti.
The phase change material also comprises superlattice phase change material or heterostructure phase change material containing chalcogenide compound, including (GeTe)/(Sb)2Te3)，(GeTe)/(Bi2Te3)，(Sb2Te3)/(TiTe2)、GeTe/Sb、(Ge-Sb-Te)/(Sb-Te)、(Ge-Sb-Te)/C。
The phase change layer material also includes single element phase change materials such as Sb or Te.
To further illustrate the method for fabricating a phase change memory based on a nanocurrent channel according to an embodiment of the present invention, the following embodiments are described in detail as follows:
example 1:
a cross-sectional view of an exemplary structure of a phase change memory having a nanocurrent channel layer according to embodiment 1 of the present invention is shown in fig. 2. The bottom electrode 10 is formed on SiO2On the substrate, the material of the bottom electrode 10 is selected from conductive materials of W, Pt, Au, Al, Cu, Ti, Ta and other metal materials and alloys thereof. The nano-current channel 20 is formed on the bottom electrode 10, the nano-current channel layer 20 is composed of an insulating material 22 and a conductive nano-crystalline grain 21 embedded in the middle of the insulating material layer, wherein the thickness of the nano-current channel layer 20 is 1 nm-30 nm. The size of the conductive nano particles in the insulating layer is 1 nm-30 nm, and the size of the conductive nano particles 21 in the direction vertical to the film is not less than the thickness of the nano current channel layer 20. The conductive nanocrystal particles 21 have a smaller resistivity than the insulating thermal insulation material 22, and the phase change material layer 30 is formed on the nanocurrent channel 20, the phase change material layer 30 including a chalcogenide compound. Preferably, the chalcogenide compound comprises an alloy compound formed by one of S, Se and Te and other non-chalcogenide materials, wherein the non-chalcogenide materials comprise Ge, Sb, Ga, Bi, In,One or more of Sn, Pb, Ag, N and O; preferably, the sulfur-based compound includes GeTe, GeSb, Ge2Sb2Te5、Ge1Sb2Te4，Sb2Te3AgInSbTe; more preferably, the chalcogenide compound comprises a compound formed by doping modification of the alloy compound, wherein the doping element comprises at least one of C, N, O, Cu, Cr, Sc and Ti. The phase change material also comprises superlattice phase change material or heterostructure phase change material containing chalcogenide compound, including (GeTe)/(Sb)2Te3)，(GeTe)/(Bi2Te3)，(Sb2Te3)/(TiTe2) GeTe/Sb, (Ge-Sb-Te)/(Sb-Te), (Ge-Sb-Te)/C. The phase change layer material also comprises single element phase change materials such as Sb and Te. The upper electrode 40 is formed on the phase change material layer 30, and the material of the upper electrode 40 is selected from conductive materials of metal materials such as W, Pt, Au, Al, Cu, Ti, Ta, and alloys thereof.
Embodiment 1 illustrates the simplest three-layer phase change memory cell structure, which is not limited to a three-layer structure, but may be a T-type structure or a limited type structure; the phase change memory cell structure with the additional gate tube can also be used.
Example 2:
according to embodiment 2 of the present invention, finite element simulations were performed for the phase change memory structure with a nanocurrent channel layer and for the conventional phase change memory structure writing process.
The simulation employed the simplest three-layer phase change memory cell structure of embodiment 1. The material parameters used in the simulation are listed in table 1 (thermal and electrical parameters of various specific materials used in finite element analysis), the upper and lower electrode materials of the two unit structures are both Pt, and the insulating layer material is SiO2And the phase change layer is Ge2Sb2Te5The thicknesses of the upper and lower electrodes, the insulating layer and the phase change layer are all 100nm, the diameter of the unit device is 100nm, the thickness of the nano current channel layer is set to be 5nm in the structure with the nano current channel layer, and the insulating part of the layer adopts SiO2The material, using Ag as a nanocurrent channel, has a diameter of 6 nm. Applying amplitude values of60uA, RESET current pulse with a pulse width of 50 ns.
Figure BDA0002861071280000111
TABLE 1
The maximum temperature and the maximum value of the current density of the phase change layer after the same RESET current pulse was applied in the two different structures were compared. The results showed that the highest temperature reached by the phase change layer in the cell containing the nanocurrent channel layer was 963K, and the current density was 5 x 10 max9A/m2And the current density is at its maximum near the nanocurrent channel. In a normal cell structure, the maximum temperature reached in the phase change layer is 845K. Current density of at most 9 x 108A/m2And current density at Ge2Sb2Te5The medium distribution is more uniform. From the analysis, the highest temperature which can be reached by the device unit with the nano current channel layer structure under the same current pulse action is higher than that of the common small hole structure, which shows that the nano current channel layer structure can complete the RESET of the phase change memory under lower power consumption, and has the advantage of low power consumption.
Example 3:
according to embodiment 3 of the present invention, a process flow for preparing a T-type phase change memory cell having a nanocurrent channel layer is as follows:
(1) selecting SiO2a/Si (100) substrate, SiO2Performing ultrasonic treatment on a/Si (100) substrate in an acetone solution for 15 minutes by using 40W power to clean the surface, dust particles and organic impurities, and then washing the substrate by using deionized water;
(2) the treated substrate is treated by ultrasonic treatment for 15 minutes in ethanol solution with 40w of power, washed by deionized water and high-purity N2And air-drying the surface and the back to obtain the substrate to be sputtered.
(3) As shown in fig. 3(a), a bottom electrode 10 is grown on a substrate 00 by magnetron sputtering, the bottom electrode 10 is made of Pt material, high-purity argon gas is introduced as a sputtering gas during the production, the sputtering pressure is 0.5Pa, the power supply is 35W, and the thickness of the bottom electrode 10 is usually 20nm to 300 nm.
(4) As shown in FIG. 3(b), an insulating layer 60 is deposited on the bottom electrode 10 layer by physical vapor deposition (PECVD), the insulating layer 60 is SiO2And the thickness is 100 nanometers.
(5) As shown in fig. 3(c), a photoresist 61 is uniformly spread on the insulating layer 60 by using a spin coater.
(6) As shown in fig. 3(d), a photoresist mask 61 with a circular aperture of 250nm diameter is formed on the insulating layer 60 using an electron beam exposure system (EBL).
(7) As shown in fig. 3(e), the insulating layer 60 is etched by using a plasma etching technique (ICP), since the portion covered by the photoresist 61 is protected from etching, and the portion not covered by the photoresist 61 is exposed to be etched away until the bottom electrode 10 is exposed.
(8) As shown in fig. 3(f), the nanocurrent channel layer 20 is prepared by magnetron sputtering, ion implantation and annealing. Wherein the metal nanocrystals 21 grow and aggregate in the nanocurrent channel layer 20 to form a conductive channel. In this embodiment, the insulating material in the nano-current channel layer is SiO2The metal conductive material is Ag.
(9) The photoresist 61 is removed by the photoresist solution, and the final effect as shown in fig. 3(g) is finally obtained.
(10) And (3) utilizing an ultraviolet lithography system to etch a square hole structure with the size of 100 microns multiplied by 100 microns on the small hole. The square hole is aligned centrally with a circular aperture etched by ICP (not shown).
(11) As shown in fig. 3(h), a phase change material layer 30 is deposited in the square hole by magnetron sputtering, and the phase change material of the phase change material layer 30 includes a chalcogenide compound. The chalcogenide compound includes S, Se, Te phase change layer material 30 includes chalcogenide compounds. Preferably, the chalcogenide compound comprises an alloy compound formed by one of S, Se and Te and other non-chalcogenide materials, wherein the non-chalcogenide materials comprise one or more of Ge, Sb, Ga, Bi, In, Sn, Pb, Ag, N and O; preferably, the sulfur-based compound includes GeTe, GeSb, Ge2Sb2Te5、Ge1Sb2Te4，Sb2Te3AgInSbTe; more preferably, sulfurThe series compound comprises a compound formed by doping and modifying the alloy compound, wherein the doping element comprises at least one of C, N, O, Cu, Cr, Sc and Ti. The phase change material also comprises superlattice phase change material or heterostructure phase change material containing chalcogenide compound, including (GeTe)/(Sb)2Te3)，(GeTe)/(Bi2Te3)，(Sb2Te3)/(TiTe2) GeTe/Sb, (Ge-Sb-Te)/(Sb-Te), (Ge-Sb-Te)/C. The phase change layer material also comprises single element phase change materials such as Sb and Te. One of the alloy compounds is formed with other non-chalcogenide materials, wherein the non-chalcogenide materials comprise Ge, Sb, Ga, Bi, In, Sn and Pb; the phase change material used in this example was Ge2Sb2Te5For example. During preparation, high-purity argon is introduced as sputtering gas, the sputtering pressure is 0.5pa, the power supply power is 35W, the distance between a target and a substrate is 180mm, and the thickness of the phase-change material layer 30 is 100 nm.
(12) The upper electrode layer 40, which is also a Pt metal electrode material, is deposited using magnetron sputtering. After the completion, the photoresist of the uv lithography is removed by a lift-off process, and the final result is the structure shown in fig. 3 (i).
Example 4:
micro-testing the Ag-containing nano current channel layer film to obtain SiO2High resolution image of Ag, 5nm thickness of the nanocurrent channel layer, and SiO is clearly visible in image 4(a)2The cluster is generated, has a diameter of 10nm and can penetrate through SiO2The layer, the cluster formed was Ag as seen by the composition analysis. This indicates that the Ag grains can be in SiO2The nano current channel layer is conducted through the medium aggregation growth, and current can be conducted from the lower electrode layer to the phase change layer through the Ag nano crystal grains.
FIG. 4(b) is a V-R relationship curve of RESET in a device containing the Ag nano-current channel layer according to example 4 of the present invention and a comparative conventional structure device. Except for the 5nm Ag nanochannel channel layer described above, both devices were identical in material and structure of the other layers. Wherein, the phase change layer is made of Ge2Sb2Te5(GST), thickness 100 nm. Device unitThe diameter is 250nm, and the insulating layer is made of SiO2The thickness is 100nm, the upper and lower electrode materials are TiN, and the thickness is 100 nm.
The RESET test method of the device is as follows: RESET pulses with a pulse width of 50ns, a rising edge and a falling edge of 10ns, and a voltage step-by-step increase were applied to both by the B1500A semiconductor tester. The results show that the alloy contains Ag-SiO2The RESET voltage of the device of the nanocurrent channel layer is 0.6V, and the required power consumption is 3.3 x 10-5J, whereas the RESET voltage of the conventional device structure is 1.6V, the required power consumption is 2.1 x 10-4J, comparing the two, the current channel layer containing the Ag nano crystal grains can effectively reduce the power consumption required in the phase change process of the device.
Example 5:
changing the metal material in the nano current channel layer, and performing microscopic test on the current channel layer film containing Au nano crystal grains to obtain SiO2Au high resolution TEM image with a nanocurrent channel layer thickness of 3nm, in image 5(a) SiO was clearly visible2The cluster is generated, has a diameter of 3nm and can penetrate through SiO2The layer, the cluster formed was Au as can be seen by the composition analysis. This indicates that Au-containing can be in SiO2The nano current channel layer is conducted, and current can be conducted to the phase change layer from the lower electrode layer through the Au nano crystal grains.
FIG. 5(b) is a V-R relationship curve of RESET in a device containing the Au nano-current channel layer according to example 5 of the present invention and a comparative conventional structure device. Except for the 5nm thick Au nanochannel channel described above, both devices were identical in material and structure of the other layers. Wherein, the phase change layer is made of Ge2Sb2Te5(GST), thickness 100 nm. The diameter of the device unit is 250nm, and the insulating layer is made of SiO2The thickness is 100nm, and the upper and lower electrode materials are TiN. The thickness was 100 nm.
The RESET test method of the device is as follows: RESET pulses with a pulse width of 50ns, a rising edge and a falling edge of 10ns, and a voltage step-by-step increase were applied to both by the B1500A semiconductor tester. The results show that the alloy contains Au-SiO2Nano electricityThe RESET voltage of the device of the flow channel layer was 0.5V and the required power consumption was 1.25 x 10-4J, whereas the RESET voltage of the conventional device structure is 1.6V, the required power consumption is 2.1 x 10-4J, comparing the two, the current channel layer containing the Au nano crystal grains can effectively reduce the power consumption required in the phase change process of the device.
Example 6:
according to embodiment 6 of the present invention, as shown in fig. 6 and 7, the insulating material and the nanochannel material in the nanochannel are selected and matched to ensure that the selected metallic conductive material can easily grow and aggregate into grains in the insulating material. The selection and matching method of the two materials is as follows:
(1) the method comprises the steps of firstly, selecting an insulating and heat insulating material which needs to have larger resistivity and lower heat conductivity, ensuring that current cannot be conducted in the whole layer due to the large resistivity and only enters the phase change layer through a nano current channel, and enabling the part of the layer except the nano current channel to have a heat preservation effect on heat generated in the phase change layer due to the low heat resistivity, so that heat loss in the erasing and writing process is reduced, and power consumption is further reduced. The choice of material can also be determined according to experimental conditions. SiO was selected in this example2As an insulating material in the nanocurrent channel layer.
(2) Build up of crystalline SiO2Model, SiO of crystals using VASP software2Heating the model to 5000K to melt the model, cooling to 300K, and running for 2ps to obtain amorphous SiO2And (4) modeling.
(3) Form energy calculation: in amorphous SiO2Doping atoms of a certain nano current channel material selected by plan, carrying out structure optimization on the atoms, calculating the structure energy of the atoms, and obtaining the nano current channel material through a formula Ef＝Enx @ insulating thermal insulation material-EInsulating material-nExCalculating the formation energy, wherein Enx @ insulating thermal insulation materialDenotes n atoms in the insulating material (SiO)2) Total energy of the system in (1), EInsulating materialIndicating insulating material (SiO)2) Energy of (n) nExRepresenting the total atomic potential of the n incorporated atoms. In general, formAtoms of elements capable of being selected for positive representation may be in selected insulating materials (SiO in this embodiment)2) The larger the positive formation energy value, the easier it is to aggregate into grains and form nanocurrent channels.
(4) Mean Square Displacement (MSD) calculation: in amorphous SiO2Randomly doping atoms of a certain nano current channel material selected in a plan, carrying out structure optimization on the atoms, running 4ps molecular dynamics calculation under 1200K, and counting the Mean Square Displacement (MSD) of the atoms. The magnitude of the mean square shift indicates the presence of selected elemental atoms in the selected insulating material (SiO in this example)2) Ease of migration. The larger the mean square displacement value at the same time, the more vigorous the movement of atoms in the selected insulating material, i.e., the easier the migration can be achieved.
(5) Calculation of radial distribution function: in amorphous SiO2The atoms of a certain nano current channel material with a certain proportion (atomic number ratio, 12% in the embodiment) are randomly doped, the structure of the atoms is optimized, the molecular dynamics calculation of 10ps is operated under 1200K, and the radial distribution function between the doped atoms is counted. The size of the peak of the radial distribution function reflects the aggregation degree, and the larger the peak is, the higher the aggregation degree of atoms in the selected insulating material is, the more easily the atoms grow into the core and form large grains.
(6) Taking into account the atoms in SiO2The formation energy, the mean square displacement and the radial distribution function in the process are screened out to be suitable for SiO2In which the aggregated material grows.
Table 2 shows the atoms of several nano-current channel materials in SiO2FIG. 6 shows the formation energy of these materials at 1200K in SiO2The mean square displacement MSD in (1), L1-L5 respectively represents Au, Ag, Ti, Al and W.
Ag Au Al W Ti
0.198eV 2.536eV -4.548eV -5.731eV -5.670eV
TABLE 2
The formation energy of Ag and Au can be obtained according to the formation energy comparison, the formation energy is positive, the Ag and Au can be more easily aggregated and grown compared with Al, Ti and W, the mean square displacement of the Ag and Au is higher than that of the Al, W and Ti, and the Ag and Au are more easily on SiO compared with the Al, W and Ti2The medium migration can be found in the radial distribution function of FIG. 7 that the peak values of Au and Ag are relatively high and the aggregation degree is relatively obvious, so that Ag and Au are easier to be in SiO in comparison with other materials2Thereby forming a metal nanocrystalline grain and further forming a nano current channel.
Example 7: preparation process method 1 of nano current channel layer
The preparation method of the nano current channel layer is characterized in that a sputtering method can be adopted, and the specific sputtering mode is any one of the following four modes: (1) co-sputtering the metal target and the insulating material target. (2) And alternately sputtering metal target and insulating heat-insulating material target. (3) And directly placing the metal sheet on the target material of the insulating heat-insulating material for doping sputtering. (4) And directly placing the insulating and heat-insulating material sheet on a metal target for doping sputtering.
This example uses SiO with Ag grains2Taking the nano current channel layer as an example, the nano current channel layer is sputtered by using a magnetron sputtering methodThe preparation method comprises the following steps:
(a) SiO is put into a sputtering cavity2Target and Ag target, and pumping vacuum to 10 degree-4Pa；
(b) Using high-purity Ar gas as sputtering gas, setting the Ar gas flow to be stable at 10sccm, and adjusting the sputtering gas pressure to 0.5pa, wherein the distance between the target and the substrate is 120 mm;
(c) setting the power of an alternating current sputtering power supply to be 200W, and connecting SiO2Target, sputter 100s, grow 2nmSiO2Then the AC power supply is turned off, the power of the DC sputtering power supply is set to be 30W, the Ag target position is connected, the DC power supply is turned off after the Ag target position is sputtered for 10s, the DC power supply is turned off after 1nmAg grows, the AC power supply is turned on again to sputter 100sSiO2Growth of 2nmSiO2Then the power supply is turned off;
(d) and (3) putting the substrate obtained by sputtering into a vacuum annealing furnace, heating the annealing furnace to 400 ℃ at the speed of 15 ℃/min, and preserving the heat at 400 ℃ for 30 min. Making metal Ag in SiO2In-growth and agglomeration to form through-SiO2Layer thickness of the nano-metal grains, as in fig. 4 (a).
The annealing temperature and the holding time in the step (d) can be determined according to SiO2The thickness ratio of the layer and the Ag layer is optimized, if the larger the thickness ratio, the higher the annealing temperature and the longer the holding time are needed, and the optimization aims to ensure that the metal Ag is in SiO2In-growth and agglomeration to form through-SiO2Nano-metal grains of layer thickness.
Example 8: preparation process method 2 of nano current channel layer
The preparation method of the nano current channel layer is characterized in that a sputtering method can be adopted, and the specific sputtering mode is any one of the following four modes: (1) co-sputtering the metal target and the insulating material target. (2) And alternately sputtering metal target and insulating heat-insulating material target. (3) And directly placing the metal sheet on the target material of the insulating heat-insulating material for doping sputtering. (4) And directly placing the insulating and heat-insulating material sheet on a metal target for doping sputtering.
This example uses SiO with Au grains2Taking the nano current channel layer as an example, the nano current channel layer is sputtered by a magnetron sputtering method, and the specific preparation method comprises the following stepsThe method comprises the following steps:
(a) in SiO2Placing 8 Au sheets with the size of 1cm x 0.5cm at the position of an etching ring on the surface of the target material, and vacuumizing to 10 DEG-4Pa；
(b) Using high-purity Ar gas as sputtering gas, setting the Ar gas flow to be stable at 10sccm, and adjusting the sputtering gas pressure to 0.5Pa and the distance between the target and the substrate to be 120 mm;
(c) setting the power of an alternating current sputtering power supply to be 200W, and sputtering for 200 s;
(d) and (3) putting the substrate obtained by sputtering into a vacuum annealing furnace, heating the annealing furnace to 400 ℃ at the speed of 15 ℃/min, and preserving the heat at 400 ℃ for 30 min. Making metal Au on SiO2Grown and agglomerated in a layer to form a through SiO2Layer thickness of nano-metal grains, as in fig. 5 (a).
The annealing temperature and the heat preservation time in the step (d) can be optimized according to the number of Au pieces (or the area of the Au pieces covering the etching ring), for example, the smaller the number of the Au pieces (the smaller the area of the Au pieces covering the etching ring), the higher the annealing temperature and the longer the heat preservation time are needed, and the optimization aims to ensure that the metal Au is in SiO2Grown and agglomerated in a layer to form a through SiO2Nano-metal grains of layer thickness.
In the co-sputtering method in this embodiment, the temperature of the substrate during the sputtering process may be increased to replace the subsequent annealing process. The increase of the substrate temperature is beneficial to increasing the migration kinetic energy of metal atoms and promoting the aggregation of the metal atoms and the growth of crystal grains thereof, and the aim is also to form nano metal crystal grains penetrating through the thickness of the nano current channel layer.
It will be understood by those skilled in the art that the foregoing is only a preferred embodiment of the present invention, and is not intended to limit the invention, and that any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the scope of the present invention.

Claims (11)

1. A preparation method of a phase change memory based on a nano current channel is characterized by comprising the following steps:
(1) growing a first electrode layer on a substrate;
(2) depositing and growing an insulating layer on the first electrode layer;
(3) etching the insulating layer by utilizing a photoetching process until reaching the first electrode layer and forming a groove with a metal electrode layer at the bottom;
(4) preparing a nano current channel layer with metal grains in the groove, wherein the metal grains penetrate through the thickness of the layer;
(5) depositing a phase change material over the nanochannel layer;
(6) depositing a second electrode layer over the phase change material forms a phase change memory having a nanocurrent channel layer.
2. The method of claim 1, wherein the nanocurrent channel layer is prepared by magnetron sputtering, chemical vapor deposition, plasma enhanced chemical vapor deposition, physical vapor deposition, laser pulse deposition, evaporation, electrochemical growth, ion implantation, molecular beam epitaxy, atomic vapor deposition or atomic layer deposition.
3. The method according to claim 2, wherein the nanocurrent channel layer is composed of an insulating material and a metal conductive nanocrystal particle embedded in the insulating material layer, the metal conductive nanocrystal particle penetrates through the thickness of the layer, and the first electrode layer is communicated with the phase change layer through a current channel formed by the nanoconductive metal nanocrystal particle.
4. The method according to claim 2, wherein when the nanocurrent channel layer is prepared by a magnetron sputtering method, a specific sputtering method is any one of the following four types: (a) co-sputtering a metal target and an insulating heat-insulating material target; (b) alternately sputtering metal target and insulating heat-insulating material target; (c) directly placing a metal sheet on an insulating heat-insulating material target material for doping sputtering; (d) and directly placing the insulating and heat-insulating material sheet on a metal target for doping sputtering.
5. The method according to claim 3, wherein the sputtered thin film is placed in a vacuum annealing furnace and annealed at a certain annealing temperature for a certain holding time to promote migration and aggregation of metal atoms in the insulating layer and growth of grains, thereby forming nano-metal grains penetrating the thickness of the nano-current channel layer.
6. The method of claim 4, wherein the metal atoms are aggregated and their grain growth is promoted by increasing the temperature of the substrate during fabrication to increase the kinetic energy of the metal atoms for migration, thereby forming nano-metal grains throughout the thickness of the layer of nano-current channels.
7. The method of any one of claims 1-5, wherein the insulating material and the nanochannel material in the nanochannel layer are selected and matched to ensure that the selected metallic conductive material can readily grow and aggregate into grains in the insulating material.
8. The production method according to any one of claims 1 to 6, wherein the thickness of the electrode layer in steps (1) and (6) is 20nm to 300nm, and the electrode material is Au, Ta, Pt, Al, W, Ti, Cu, Ir, and metal alloys and metal compounds thereof.
9. The production method according to any one of claims 1 to 7, wherein the method of forming the insulating layer in step (2) comprises using a magnetron sputtering method, a chemical vapor deposition method, or an atomic layer deposition method, and the insulating layer has a thickness of 20nm to 200 nm.
10. The production method according to any one of claims 1 to 8, wherein the groove depth in step (3) is 20nm to 200 nm.
11. A phase change memory obtained based on the manufacturing method of any one of claims 1 to 9.
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