CN113838886A - Phase change memory and preparation method thereof - Google Patents
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
- H10B63/20—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices comprising selection components having two electrodes, e.g. diodes
- H10B63/24—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices comprising selection components having two electrodes, e.g. diodes of the Ovonic threshold switching type
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- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/011—Manufacture or treatment of multistable switching devices
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- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/20—Multistable switching devices, e.g. memristors
- H10N70/231—Multistable switching devices, e.g. memristors based on solid-state phase change, e.g. between amorphous and crystalline phases, Ovshinsky effect
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- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
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- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
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Abstract
The invention discloses a phase change memory and a preparation method thereof, wherein the phase change memory comprises a substrate, a bottom electrode layer, a dielectric material layer, a top electrode layer, a gating material layer and a phase change material layer which are arranged in a laminated manner, wherein the bottom electrode layer is arranged on the upper side of the substrate and comprises a body and a protruding part which extends upwards from the upper side of the body; the dielectric material layer is arranged on the upper side of the body of the bottom electrode layer and surrounds the circumferential direction of the protruding part; the top electrode layer is arranged on the upper side of the dielectric material layer; the gating material layer and the phase change material layer which are arranged in a laminated mode are arranged between the dielectric material layer and the top electrode layer, one of the gating material layer and the phase change material layer is adjacent to the dielectric material layer and is in contact with the upper surface of the protruding portion, the other of the gating material layer and the phase change material layer is adjacent to the top electrode layer, and the material of the gating material layer comprises hexagonal-phase boron nitride; the material of one of the bottom electrode layer and the top electrode layer in contact with the gate material layer includes silver. The phase change memory provided by the invention has good stability and long cycle life.
Description
Technical Field
The invention relates to the technical field of semiconductor devices, in particular to a phase change memory and a preparation method thereof.
Background
Phase-change random access memory (PCRAM) is a new storage technology, and has the advantages of high operation speed, low power consumption, and capability of performing storage and calculation simultaneously, so that the phase-change random access memory is considered to be a new storage technology which has the most potential to overcome the performance bottleneck in the current von neumann computing architecture and improve the current computing architecture. The memory mechanism of the PCRAM is that the phase transition of the phase-change material between the crystalline state and the amorphous state is induced by the action of an external electric pulse signal, and the great resistance value difference between the amorphous state and the crystalline state can define the logic states of '0' and '1' of the device. The newly-appeared 3D-Xpoint technology based on PCRAM storage can be used for bridging a random dynamic memory (DRAM) and a storage Solid State Disk (SSD) to improve the comprehensive computing performance, and is expected to be applied to a storage-class memory to improve the current von Neumann computing architecture.
In 3D-Xpoint technology, a voltage difference also exists across half-selected PCRAM cells on the word line and bit line during an erase or read operation. The industry has employed phase change memory cells embedded with gates to prevent large leakage current conditions in half-select PCRAM devices, i.e., 1S-1M structures (1-gate-1 memory). When the voltage difference of the devices is lower than the threshold transition voltage of the gate, the gate is closed, and therefore the phase change memory unit is protected. Currently, most gating is applied as a Threshold transition gating material, namely an OTS (ovonic Threshold switching) material, and currently, the more mature OTS material is an arsenic-containing system. However, arsenic is highly toxic, and therefore, finding a gating material with characteristics of low leakage current, high thermal stability, appropriate threshold transition voltage and the like is a hot problem to be solved for promoting the application of PCRAM in the fields of 3D stacking and the like.
Disclosure of Invention
The invention mainly aims to provide a phase change memory and a preparation method thereof, and aims to provide the phase change memory which takes hexagonal phase boron nitride as a gating material layer, so that the phase change memory has the advantages of good stability and long cycle life.
In order to achieve the above object, the present invention provides a phase change memory, including:
a substrate;
the bottom electrode layer is arranged on the upper side of the substrate and comprises a body and a protruding part extending upwards from the upper side of the body;
the dielectric material layer is arranged on the upper side of the body of the bottom electrode layer and is arranged around the circumferential direction of the protruding part;
a top electrode layer disposed on an upper side of the dielectric material layer; and the number of the first and second groups,
the gating material layer and the phase-change material layer are arranged in a laminated mode and arranged between the dielectric material layer and the top electrode layer, one of the gating material layer and the phase-change material layer is adjacent to the dielectric material layer and is in contact with the upper surface of the protruding portion, the other of the gating material layer and the phase-change material layer is adjacent to the top electrode layer, and the gating material layer comprises hexagonal-phase boron nitride;
and one of the bottom electrode layer and the top electrode layer, which is in contact with the gating material layer, is made of silver.
Optionally, the distance from the upper end face of the protruding part of the bottom electrode layer to the lower end face of the body is 40-50 nm; and/or the presence of a gas in the gas,
the cross section of the bulge is circular, and the diameter of the bulge is 30-150 nm.
Optionally, the material of the dielectric material layer is silicon dioxide; and/or the presence of a gas in the gas,
the thickness of the dielectric material layer is 15-20 nm.
Optionally, the hexagonal phase boron nitride is two-dimensional hexagonal phase boron nitride; and/or the presence of a gas in the gas,
the thickness of the gating material layer is 2-10 nm.
Optionally, the phase change material layer is made of germanium antimony tellurium, scandium-doped antimony tellurium alloy, elemental antimony, and Sb2Te3Any one of them.
Optionally, the thickness of the phase change material layer is 20-50 nm.
Optionally, the thickness of the top electrode layer is 40-50 nm;
and one of the bottom electrode layer and the top electrode layer which is not contacted with the gating material layer is made of silver or titanium nitride.
The invention further provides a preparation method of the phase change memory, which comprises the following steps:
s10, providing a substrate;
s20, preparing a bottom electrode layer on the upper side of the substrate, wherein the bottom electrode layer is provided with a body and a convex part extending upwards from the middle part of the upper side of the body;
s30, preparing a dielectric material layer on the upper side of the bottom electrode, and enabling the dielectric material layer to be arranged around the circumferential direction of the protruding portion;
s40, preparing a gating material layer and a phase-change material layer which are arranged in a stacked mode on the upper side of the dielectric material layer, enabling one of the gating material layer and the phase-change material layer to be adjacent to the dielectric material layer and to be in contact with the upper surface of the protruding portion, and enabling the gating material layer to be made of hexagonal-phase boron nitride;
and S50, preparing a top electrode layer on the upper side of the other one of the gating material layer and the phase change material layer, wherein the material of one of the bottom electrode layer and the top electrode layer, which is in contact with the gating material layer, comprises silver.
Optionally, the bottom electrode layer is prepared by a magnetron sputtering method; and/or the presence of a gas in the gas,
the dielectric material layer is prepared by adopting a magnetron sputtering method; and/or the presence of a gas in the gas,
the phase change material layer is prepared by a magnetron sputtering method; and/or the presence of a gas in the gas,
the top electrode layer is prepared by adopting a magnetron sputtering method.
Optionally, the bottom electrode layer is prepared by a magnetron sputtering method, the sputtering time is 10-20 min, and the sputtering power is 50-70W; and/or the presence of a gas in the gas,
the dielectric material layer is prepared by a magnetron sputtering method, the sputtering time is 20-40 min, and the sputtering power is 50-70W; and/or the presence of a gas in the gas,
the phase change material layer is prepared by a magnetron sputtering method, the sputtering time is 10-20 min, and the sputtering power is 10-20W; and/or the presence of a gas in the gas,
the top electrode layer is prepared by a magnetron sputtering method, the sputtering time is 10-20 min, and the sputtering power is 80-100W.
According to the phase change memory provided by the technical scheme of the invention, through the addition of the gating material layer, the material of the gating material layer comprises hexagonal phase boron nitride (h-BN), the use of toxic substances As is avoided, the h-BN has a typical threshold transition effect, and the threshold transition voltage of the gating material layer can improve the device performance of a phase change memory unit; the phase change film can effectively inhibit failure caused by atomic diffusion between the bottom electrode layer and the phase change material layer in the reversible operation process, so that the component stability of the phase change film is improved, the cycle life of the phase change memory is prolonged, and the h-BN is an insulating material, has low internal thermal conductivity, and can reduce heat flowing out of a phase change area so as to reduce the power consumption of the phase change memory.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the structures shown in the drawings without creative efforts.
FIG. 1 is a schematic diagram of a phase change memory according to an embodiment of the present invention;
fig. 2 is a schematic diagram illustrating a manufacturing process of the phase change memory shown in fig. 1.
The reference numbers illustrate:
| 100 | |
3 | |
| 1 | |
4 | |
| 2 | |
5 | Phase |
| 21 | |
6 | |
| 22 | Raised part |
The implementation, functional features and advantages of the objects of the present invention will be further explained with reference to the accompanying drawings.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It should be noted that, if directional indications (such as upper, lower, left, right, front, rear, outer and inner … …) are involved in the embodiment of the present invention, the directional indications are only used to explain the relative position relationship between the components, the motion situation, etc. in a specific posture (as shown in the drawing), and if the specific posture is changed, the directional indications are changed accordingly.
In addition, if there is a description of "first", "second", etc. in an embodiment of the present invention, the description of "first", "second", etc. is for descriptive purposes only and is not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In addition, the meaning of "and/or" appearing throughout includes three juxtapositions, exemplified by "A and/or B" including either A or B or both A and B. In addition, technical solutions between various embodiments may be combined with each other, but must be realized by a person skilled in the art, and when the technical solutions are contradictory or cannot be realized, such a combination should not be considered to exist, and is not within the protection scope of the present invention.
In 3D-Xpoint technology, a voltage difference also exists across half-selected PCRAM cells on the word line and bit line during an erase or read operation. The industry has employed phase change memory cells embedded with gates to prevent large leakage current conditions in half-select PCRAM devices, i.e., 1S-1M structures (1-gate-1 memory). When the voltage difference of the devices is lower than the threshold transition voltage of the gate, the gate is closed, and therefore the phase change memory unit is protected. Currently, most gating is applied as a Threshold transition gating material, namely an OTS (ovonic Threshold switching) material, and currently, the more mature OTS material is an arsenic-containing system. However, arsenic is highly toxic, and therefore, finding a gating material with characteristics of low leakage current, high thermal stability, appropriate threshold transition voltage and the like is a hot problem to be solved for promoting the application of PCRAM in the fields of 3D stacking and the like.
In view of this, the present invention provides a phase change memory, and aims to provide a phase change memory with good stability and long cycle life. In the drawings, FIG. 1 is a schematic diagram of a phase change memory according to an embodiment of the present invention; fig. 2 is a schematic diagram illustrating a manufacturing process of the phase change memory shown in fig. 1.
Referring to fig. 1, a phase change memory 100 according to the present invention includes a substrate 1, a bottom electrode layer 2, a dielectric material layer 3, a top electrode layer 6, and a gate material layer 4 and a phase change material layer 5 stacked together, wherein the bottom electrode layer 2 is disposed on an upper side of the substrate 1, and the bottom electrode layer 2 includes a body 21 and a protrusion 22 extending upward from the upper side of the body 21; the dielectric material layer 3 is arranged on the upper side of the body 21 of the bottom electrode layer 2 and surrounds the circumferential direction of the convex part 22; the top electrode layer 6 is arranged on the upper side of the dielectric material layer 3; the gate material layer 4 and the phase-change material layer 5 which are arranged in a laminated mode are arranged between the dielectric material layer 3 and the top electrode layer 6, one of the gate material layer 4 and the phase-change material layer 5 is adjacent to the dielectric material layer 3 and is in contact with the upper surface of the protruding portion 22, the other of the gate material layer 4 and the phase-change material layer 5 is adjacent to the top electrode layer 6, and the material of the gate material layer 4 comprises hexagonal-phase boron nitride; the material of one of the bottom electrode layer 2 and the top electrode layer 6, which is in contact with the gate material layer 4, includes silver.
In the embodiment of the present invention, referring to fig. 1, the gate material layer 4 is adjacent to the dielectric material layer 3 and contacts the upper surface of the protrusion 22, and the phase change material layer 5 is adjacent to the top electrode layer 6, so that the bottom electrode layer 2 is made of silver.
Through the addition of the gating material layer 4, the material of the gating material layer 4 comprises hexagonal phase boron nitride (h-BN), the h-BN has a typical threshold transition effect, and as a gating material, the adjustable threshold transition voltage of the h-BN can improve the device performance of the phase change memory 100 unit; and h-BN is an insulating material, the internal thermal conductivity of the h-BN is very low, and the heat flowing out of a phase change region can be reduced, so that the power consumption of the phase change memory 100 is reduced.
The phase change memory 100 provided by the embodiment of the invention uses a hexagonal phase boron nitride (h-BN) gating material, so that the half-selection phase change memory 100 in a three-dimensional stack can be effectively protected; it is also possible to effectively suppress element diffusion between the bottom electrode and the phase change material layer 5 during the sustained reversible operation, and thus it is possible to improve the stability of the composition of the phase change film and to extend the life of the phase change memory 100.
In the embodiment of the invention, the electrode in contact with the gating material layer 4 is made of silver, so that the function of the gating material layer 4 can be better exerted, the component stability of the phase change film is improved, and the cycle life of the phase change memory 100 is prolonged.
Preferably, the protrusion 22 extends upward from the middle of the upper side of the body 21, so that the phase change memory 100 has better stability.
Regarding the dimensions of the body 21 and the protruding portion 22 of the bottom electrode layer 2, the present invention is not limited, and preferably, the distance from the upper end surface of the protruding portion 22 of the bottom electrode layer 2 to the lower end surface of the body 21 is 40 to 50 nm; the cross section of the bulge 22 is circular, the diameter of the bulge 22 is 30-150 nm, and the diameter of the bulge 22 is the diameter of the cross section. The bottom electrode layer 2 and the gating material layer 4 can be ensured to have smaller contact area, the power consumption of the phase change memory 100 is reduced, and the stability and the cycle life are improved.
It can be understood that the distance and the circular diameter from the upper end surface of the protruding portion 22 of the bottom electrode layer 2 to the lower end surface of the body 21 may be satisfied at the same time, or may be satisfied at only one of them, and as a preferred embodiment of the present invention, the above two are satisfied at the same time, which is beneficial to reducing the power consumption of the phase change memory 100, and improving the stability and the cycle life.
The invention is also not limited with respect to the size and material of the dielectric material layer 3, and preferably, the material of the dielectric material layer 3 includes silicon dioxide, which has good dielectric properties, mechanical properties, low thermal conductivity, electrical conductivity and chemical stability.
Preferably, the thickness of the dielectric material layer 3 is 15 to 20 nm. The dielectric properties of the dielectric material layer 3 are best at the above thickness.
The thickness of the gating material layer 4 is not limited, and preferably, the thickness of the gating material layer 4 is 2-10 nm. In addition, preferably, the hexagonal phase boron nitride is two-dimensional hexagonal phase boron nitride, and the two-dimensional material refers to a material in which electrons can move freely (in a plane) only on a two-dimensional nanoscale (1-100 nm), and the two-dimensional hexagonal phase boron nitride has excellent stability, is flat in surface and free of dangling bonds, is the best known two-dimensional insulator, and is beneficial to improving gating performance.
The material and size of the phase change material layer 5 are not limited in the present invention, and preferably, the material of the phase change material layer 5 includes germanium antimony tellurium (GeSbTe), scandium-doped antimony tellurium alloy (Sc-doped Sb)2Te3I.e. ScxSb2Te30.2 to 0.3 x), elemental antimony (Sb), and Sb2Te3In any one of the above materials, the materials are phase change materials with van der waals gaps, and the materials can easily and better form a 00l crystal face-up crystal texture in the preparation process, so that the materials can be better adapted to two-dimensional hexagonal phase boron nitride.
Preferably, the thickness of the phase change material layer 5 is 20-50 nm, and the phase change memory 100 using the phase change material as the phase change material layer 5 has the advantages of high speed, low power consumption, non-volatility, long data retention time and high storage density by combining the special phase change property of the phase change material.
The thickness of the top electrode layer 6 is not limited in the present invention, and preferably, the thickness of the top electrode layer 6 is 40 to 50nm, and the power consumption of the phase change memory 100 is low at the thickness.
In addition, it is preferable that the material of the bottom electrode layer 2 or the top electrode layer 6 which is not in contact with the gate material layer 4 includes silver or titanium nitride. In the embodiment of the present invention, referring to fig. 1, the top electrode layer 6 is not in contact with the gate material layer 4, and the material thereof may be silver or titanium nitride, which has good conductivity and can be used as a top electrode material.
In order to facilitate performance testing of the phase change memory 100, the top electrode layer 6 is preferably square, and the side length of the square is about 50 μm.
In the embodiment of the present invention, the substrate 1 is preferably a semiconductor substrate 1, and the material thereof is preferably a thermally oxidized silicon wafer.
Further, referring to fig. 2, the present invention provides a method for manufacturing the phase change memory, including the following steps:
s10, providing a substrate.
Preferably, before step S20, a cleaning pretreatment is performed on the substrate, and the cleaning treatment of the thermal oxidation silicon wafer includes the following specific steps:
1) providing a thermal oxidation silicon wafer substrate, cleaning the surface and the back, and removing dust particles, organic impurities and inorganic impurities;
2) placing the thermal oxidation silicon wafer substrate in a beaker filled with 50ml of acetone solution (the acetone solution completely covers the thermal oxidation silicon wafer substrate), sealing the beaker by using special tinfoil paper or a preservative film to prevent the acetone solution from volatilizing, placing the beaker in an ultrasonic cleaner for 20min by ultrasound, and taking out;
3) rapidly transferring the thermal oxidation silicon wafer substrate into a beaker filled with 50ml of absolute ethyl alcohol solution (the absolute ethyl alcohol solution completely covers the thermal oxidation silicon wafer substrate), sealing the beaker by using a special preservative film to prevent the absolute ethyl alcohol solution from volatilizing, placing the beaker in an ultrasonic cleaning instrument for 20min by ultrasonic treatment, then washing the thermal oxidation silicon substrate by deionized water for 3min, and then rapidly drying by nitrogen;
4) and (3) placing the thermal oxidation silicon wafer substrate in an oven at 80 ℃ for baking for 30min, and removing residual moisture on the surface to finish pretreatment.
S20, preparing a bottom electrode layer on the upper side of the substrate, wherein the bottom electrode layer is provided with a body and a convex part extending upwards from the middle part of the upper side of the body.
Preferably, the bottom electrode layer is prepared by a magnetron sputtering method, wherein a proper amount of argon gas is filled in high vacuum, voltage is applied between a cathode (a columnar target or a planar target) and an anode (a coating chamber wall), magnetic control type abnormal glow discharge is generated in a coating chamber, the argon gas is ionized, argon ions are accelerated by the cathode and bombard the surface of the cathode target, and atoms on the surface of the target are sputtered to deposit on the surface of the substrate to form the film. By replacing targets of different materials and controlling different sputtering time, films of different materials and different thicknesses can be obtained. The magnetron sputtering method has the advantages of strong binding force between the coating layer and the substrate, compact coating layer, good uniformity and the like.
More preferably, when the bottom electrode layer is prepared by a magnetron sputtering method, the sputtering time is 10-20 min, the sputtering power is 50-70W, and under the above conditions, the distance from the upper end surface of the protruding part of the bottom electrode layer to the lower end surface of the body can be ensured to be 40-50 nm.
Specifically, when the bottom electrode layer is prepared by the magnetron sputtering method, the specific conditions are as follows:
the sputtering target material is Ag, the sputtering gas is high-purity Ar gas, the purity atomic percent of the Ag target material is more than 99.999 percent, the background vacuum degree is not more than 2 multiplied by 10-7And Torr, a direct current power supply is adopted for the Ag target, the sputtering power is 50-70W, the purity volume percentage of Ar gas is more than 99.999 percent, the flow of the sputtered Ar is 27sccm, and the pressure is 3.7 mTorr. The specific operation steps are as follows:
1) placing the substrate on a base support, turning on a direct-current power supply on an Ag target, sputtering the Ag target, and cleaning the surface of the Ag target for 10 min;
2) after the surface of the Ag target is cleaned, closing the applied direct current power supply, mounting the substrate to be sputtered on the base, starting the direct current power supply of the Ag target position, and starting sputtering the Ag film for 10-20 min;
3) the thickness of the finally obtained Ag film is 40-50 nm, and the sputtering rate of Ag is controlled to be 2-3 nm/min.
Referring to fig. 2, after the magnetron sputtering method, the cross-sectional view of the bottom electrode layer is rectangular and does not include a protrusion, so that the bottom electrode layer needs to be further processed, and the bottom electrode layer is subjected to electron beam exposure, etching and dielectric layer material filling to prepare a bottom electrode layer having a nano-sized body and a protrusion. The specific steps of adopting electron beam exposure patterning and etching to prepare the nanoscale bottom electrode are as follows:
1) placing a sample on a spin coater, setting the spin speed to be 4000rpm, placing the thermal oxidation silicon wafer substrate with the bottom electrode on the spin coater, sucking electron beam photoresist (PMMA 950k photoresist) by a dropper, uniformly dripping the electron beam photoresist on the bottom electrode for 30-45 s, and quickly transferring to a hot table at 180 ℃ to heat for 3min after the completion;
2) exposing the patterned dielectric layer material region by adopting an electron beam;
3) carrying out developing operation on the exposed thermal oxidation silicon wafer substrate: placing the mixture in a developing solution for 30s, and then quickly transferring the mixture to a fixing solution for 30 s; then blowing the sample by nitrogen;
electron beam lithography (electron beam lithography) refers to a process of creating a pattern on a surface using an electron beam, and is an extended application of lithography.
4) And etching the bottom electrode area of the patterned area by adopting reactive ion etching, wherein the depth is 15-20 nm, and the bottom electrode area is used for filling an insulating and heat-insulating dielectric material layer.
S30, preparing a dielectric material layer on the upper side of the bottom electrode, and enabling the dielectric material layer to be arranged around the circumferential direction of the protruding portion.
Preferably, the dielectric material layer is prepared by a magnetron sputtering method, more preferably, when the bottom dielectric material layer is prepared by the magnetron sputtering method, the sputtering time is 20-40 min, and the sputtering power is 50-70W, under the above conditions, the thickness of the dielectric material layer can be ensured to be 15-20 nm.
Specifically, when the magnetron sputtering method is used for preparing the dielectric material layer, the specific conditions are as follows:
the sputtering target material is SiO2The sputtering gas is high-purity Ar gas, SiO2The purity atomic percentage of the target material is more than 99.99 percent, and the background vacuum degree is not more than 2 multiplied by 10-7Torr，SiO2The target material adopts a radio frequency power supply, the sputtering power is 50-70W, the embodiment of the invention preferably adopts 60W, the purity volume percentage of Ar gas is more than 99.999 percent, the gas flow is 27sccm during sputtering, and the pressure is 3.7 mTorr. The specific operation steps are as follows:
1) placing the sample on a base, opening SiO2Starting to process SiO by using a radio frequency power supply on the target, wherein the sputtering time is 10min2Target feedingSputtering and cleaning SiO2The surface of the target material;
2)SiO2after the surface of the target material is cleaned, the applied radio frequency power supply is closed, the substrate to be sputtered is arranged on the base support, and SiO is started2Sputtering target radio frequency power supply for 20-40 min, and starting to sputter SiO2A film;
3) SiO finally obtained2The thickness of the film is 15-20 nm, the thickness of the film is controlled by sputtering time, and SiO is2The sputtering rate of (2) was 0.7 nm/min.
Preferably, after preparing the dielectric material layer, the thermal oxidation silicon wafer substrate with the bottom electrode layer and the dielectric material layer prepared in the above way is subjected to a photoresist removing operation:
soaking the thermal oxidation silicon wafer substrate in a beaker filled with 50ml of acetone solution for about 1h, and quickly transferring the thermal oxidation silicon wafer substrate surface to the beaker filled with 50ml of absolute ethyl alcohol solution for soaking for 30-60 s after removing glue on the thermal oxidation silicon wafer substrate surface; then dried by nitrogen.
S40, preparing a gating material layer and a phase-change material layer which are arranged in a stacked mode on the upper side of the dielectric material layer, enabling one of the gating material layer and the phase-change material layer to be adjacent to the dielectric material layer and to be in contact with the upper surface of the protruding portion, and enabling the gating material layer to be made of hexagonal-phase boron nitride.
In an embodiment of the present invention, a gating material layer is adjacent to the dielectric material layer and in contact with the upper surface of the protrusion, and the gating material layer includes hexagonal phase boron nitride. Therefore, the gate material layer is prepared first, and then the phase change material layer is prepared on the upper side of the gate material layer.
Transferring a gating material layer on a thermal oxidation silicon wafer substrate with a bottom electrode layer and a dielectric material layer, wherein the preparation steps are as follows:
1) suspending and coating a PMMA (polymethyl methacrylate) anisole film (5 percent or 10 percent of mass fraction) on the surface of h-BN growing on a copper foil substrate, then cutting the h-BN film into a FeCl film with the proper size of 1mol/L3Etching the copper substrate for 12h in the etching solution;
2) and transferring the etched h-BN film with the PMMA anisole film into clean deionized water by using a clean substrate to be soaked for 3 hours, and repeatedly soaking for 3 times until the residual etching liquid is cleaned.
3) Transferring the h-BN film with the PMMA anisole film to the thermal oxidation silicon wafer substrate with the bottom electrode layer and the dielectric material layer, and obliquely standing for about 24 hours until the water is dried;
4) placing a thermal oxidation silicon wafer substrate of the h-BN film with the PMMA anisole film on a 35 ℃ hot table to be heated for 3h, and then heating the substrate for 2min at the temperatures of 50 ℃, 80 ℃, 100 ℃, 120 ℃ and 140 ℃ respectively;
5) and (3) placing the substrate of the h-BN film with the PMMA methyl ether film in an acetone solution, standing for 3h, and repeating for three times to remove the PMMA methyl ether film on the surface layer. The thickness of the h-BN film is controlled by controlling the number of times the h-BN film is transferred.
When the phase-change material layer is prepared, preferably, a magnetron sputtering method is adopted for preparation, more preferably, during preparation, the sputtering time is 10-20 min, the sputtering power is 10-20W, and under the conditions, the thickness of the phase-change material layer can be ensured to be 20-50 nm.
Specifically, when the phase change material layer is prepared by the magnetron sputtering method, the specific conditions are as follows:
the sputtering target material is a phase-change target material corresponding to the phase-change material, the sputtering gas is high-purity Ar gas, the purity atomic percentage of the phase-change material target material is more than 99.999 percent, and the background vacuum degree is not more than 2 multiplied by 10-7Torr, a radio frequency power supply is adopted as a phase-change material target, the sputtering power is 10-20W, the purity volume percentage of Ar gas is more than 99.999%, the gas flow is 27sccm during sputtering, and the pressure is 3.7 mTorr. The specific operation steps are as follows:
1) placing a sample on a base, turning on a radio frequency power supply on a phase-change material target, starting sputtering the phase-change material target for 10min, and cleaning the surface of the phase-change material target;
2) and after the surface of the phase-change material target is cleaned, closing the applied radio frequency power supply, mounting the substrate to be sputtered on the base support, starting the radio frequency power supply of the phase-change material target, and starting sputtering the phase-change material film for 10-20 min.
3) The thickness of the finally obtained phase-change material film is 20-50 nm, and the sputtering rate of the phase-change material is 2-3 nm/min.
S50, preparing a top electrode layer on the upper side of the other one of the gating material layer and the phase change material layer, wherein the bottom electrode layer or the top electrode layer in contact with the gating material layer comprises silver.
In the embodiment of the invention, the top electrode layer is arranged on the upper side of the phase-change material layer and is not in contact with the gating material layer, so the material of the top electrode layer can be silver or titanium nitride, taking titanium nitride as an example, preferably, the top electrode layer is prepared by adopting a magnetron sputtering method, more preferably, the sputtering time is 10-20 min, the sputtering power is 80-100W, and under the above conditions, the thickness of the top electrode layer can be ensured to be 40-50 nm.
Specifically, when the top electrode layer is prepared by the magnetron sputtering method, the specific conditions are as follows:
the sputtering target material is Ti, and the sputtering gas is high-purity Ar and high-purity N2The purity atomic percentage of the Ti target material is more than 99.999 percent, and the background vacuum degree is not more than 2 multiplied by 10-7Torr and Ti target material adopt a direct current power supply, the sputtering power is 80-100W, Ar and N2The purity volume percentage of the alloy is more than 99.999 percent, the Ar gas flow is 22sccm during sputtering, and N is2The gas flow was 7sccm and the pressure was 3.7 mTorr. The specific operation steps are as follows:
1) placing any sample on a base support, turning on a direct-current power supply on a Ti target, starting sputtering the Ti target for 10min, and cleaning the surface of the Ti target;
2) after the surface of the Ti target material is cleaned, the applied radio frequency power supply is closed, the substrate to be sputtered is installed on the base support, the radio frequency power supply of the Ti target material is started, and the TiN film starts to be sputtered for 10-20 min;
3) the thickness of the finally obtained TiN film is 40-50 nm, and the sputtering rate of TiN is 2-3 nm/min.
Preferably, after step S50, the excess h-BN gate material layer, phase change material layer and top electrode material layer are removed by dry etching, so as to obtain a relatively clean and complete phase change memory.
According to the preparation method of the phase change memory provided by the embodiment of the invention, the prepared phase change memory is gated by hexagonal phase boron nitride (h-BN), so that the semi-selective phase change memory in a three-dimensional stack can be effectively protected; and element diffusion between the bottom electrode and the phase change material layer in the continuous reversible operation process can be effectively inhibited, so that the stability of the components of the phase change film can be improved, and the service life of the phase change memory can be prolonged.
The phase change memory prepared by the invention has all the beneficial effects of the phase change memory, and the details are not repeated.
In conclusion, the present invention effectively overcomes various disadvantages of the prior art, such As the avoidance of the toxic substance As in the commonly used gating material, and improves the prior art by innovation, thereby having high industrial utilization value.
The above description is only a preferred embodiment of the present invention, and is not intended to limit the scope of the present invention, and all modifications and equivalents of the present invention, which are made by the contents of the present specification and the accompanying drawings, or directly/indirectly applied to other related technical fields, are included in the scope of the present invention.
Claims (10)
1. A phase change memory, comprising:
a substrate;
the bottom electrode layer is arranged on the upper side of the substrate and comprises a body and a protruding part extending upwards from the upper side of the body;
the dielectric material layer is arranged on the upper side of the body of the bottom electrode layer and is arranged around the circumferential direction of the protruding part;
a top electrode layer disposed on an upper side of the dielectric material layer; and the number of the first and second groups,
the gating material layer and the phase-change material layer are arranged in a laminated mode and arranged between the dielectric material layer and the top electrode layer, one of the gating material layer and the phase-change material layer is adjacent to the dielectric material layer and is in contact with the upper surface of the protruding portion, the other of the gating material layer and the phase-change material layer is adjacent to the top electrode layer, and the gating material layer comprises hexagonal-phase boron nitride;
and one of the bottom electrode layer and the top electrode layer, which is in contact with the gating material layer, is made of silver.
2. The phase change memory according to claim 1, wherein a distance from an upper end surface of the protrusion to a lower end surface of the body is 40 to 50 nm; and/or the presence of a gas in the gas,
the cross section of bellying is circular, just the diameter of bellying is 30 ~ 150 nm.
3. The phase change memory of claim 1, wherein the dielectric material layer is silicon dioxide; and/or the presence of a gas in the gas,
the thickness of the dielectric material layer is 15-20 nm.
4. The phase change memory of claim 1, wherein the hexagonal phase boron nitride is a two-dimensional hexagonal phase boron nitride; and/or the presence of a gas in the gas,
the thickness of the gating material layer is 2-10 nm.
5. The phase change memory of claim 1, wherein the phase change material layer comprises SiGeSb, Sc-doped SiSb-Te alloy, elemental antimony, Sb2Te3Any one of them.
6. The phase change memory of claim 1, wherein the phase change material layer has a thickness of 20 to 50 nm.
7. The phase change memory of claim 1, wherein the top electrode layer has a thickness of 40 to 50 nm;
and one of the bottom electrode layer and the top electrode layer which is not contacted with the gating material layer is made of silver or titanium nitride.
8. A method for manufacturing a phase change memory according to any one of claims 1 to 7, comprising the steps of:
s10, providing a substrate;
s20, preparing a bottom electrode layer on the upper side of the substrate, wherein the bottom electrode layer is provided with a body and a convex part extending upwards from the upper side of the body;
s30, preparing a dielectric material layer on the upper side of the bottom electrode, and enabling the dielectric material layer to be arranged around the circumferential direction of the protruding portion;
s40, preparing a gating material layer and a phase-change material layer which are arranged in a stacked mode on the upper side of the dielectric material layer, enabling one of the gating material layer and the phase-change material layer to be adjacent to the dielectric material layer and to be in contact with the upper surface of the protruding portion, and enabling the gating material layer to be made of hexagonal-phase boron nitride;
and S50, preparing a top electrode layer on the upper side of the other one of the gating material layer and the phase change material layer, wherein the material of one of the bottom electrode layer and the top electrode layer, which is in contact with the gating material layer, comprises silver.
9. The method for manufacturing a phase change memory according to claim 8, wherein the bottom electrode layer is manufactured by a magnetron sputtering method; and/or the presence of a gas in the gas,
the dielectric material layer is prepared by adopting a magnetron sputtering method; and/or the presence of a gas in the gas,
the phase change material layer is prepared by a magnetron sputtering method; and/or the presence of a gas in the gas,
the top electrode layer is prepared by adopting a magnetron sputtering method.
10. The preparation method of the phase change memory according to claim 8, wherein the bottom electrode layer is prepared by a magnetron sputtering method, the sputtering time is 10-20 min, and the sputtering power is 50-70W; and/or the presence of a gas in the gas,
the dielectric material layer is prepared by a magnetron sputtering method, the sputtering time is 20-40 min, and the sputtering power is 50-70W; and/or the presence of a gas in the gas,
the phase change material layer is prepared by a magnetron sputtering method, the sputtering time is 10-20 min, and the sputtering power is 10-20W; and/or the presence of a gas in the gas,
the top electrode layer is prepared by a magnetron sputtering method, the sputtering time is 10-20 min, and the sputtering power is 80-100W.
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