CN112713219B - Co-doped blocking impurity band detection system and method - Google Patents

Co-doped blocking impurity band detection system and method Download PDF

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CN112713219B
CN112713219B CN202011605117.4A CN202011605117A CN112713219B CN 112713219 B CN112713219 B CN 112713219B CN 202011605117 A CN202011605117 A CN 202011605117A CN 112713219 B CN112713219 B CN 112713219B
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崔慧源
王兵兵
陈雨璐
王晓东
刘文辉
童武林
陈栋
秦世宏
吴翼飞
王洋刚
王添雄
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Shanghai Institute of Microwave Technology CETC 50 Research Institute
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Abstract

The invention provides a codoped blocking impurity band detection system and a codoped blocking impurity band detection method, wherein the codoped blocking impurity band detection system comprises the following steps: s1, injecting As ions or P ions into the surface of one side of the high-resistance silicon substrate, and annealing by using a furnace tube; s2, continuously epitaxially growing an As and P element co-doped absorption layer on the surface after ion implantation; s3, continuously epitaxially growing high-resistance silicon on the absorption layer by using a metal organic chemical vapor deposition process to serve as a barrier layer; s4, forming a local positive electrode contact area on the barrier layer; a mesa structure is formed in the barrier layer, the positive electrode contact region, and the absorber layer with a certain depth. Step S5: depositing a silicon dioxide passivation layer on the surface, the side wall and the bottom of the table top; step S6: opening positive and negative electrode holes on the silicon dioxide passivation layer; step S7: positive and negative electrodes with good ohmic contact are formed in the positive and negative electrode holes. The invention can improve the effective incidence rate and the detection sensitivity.

Description

Co-doped barrier impurity band detection system and method
Technical Field
The invention relates to a detector, in particular to a codoped blocking impurity band detection system and a codoped blocking impurity band detection method, and particularly relates to a codoped blocking impurity band detector with high sensitivity and large response bandwidth.
Background
Terahertz waves are generally electromagnetic waves between microwaves and infrared in electromagnetic frequencies, and have significant advantages in the aspects of penetrability, safety, resolution and the like, so that the terahertz waves have important application prospects in the fields of electronic information, national defense, life and the like.
Terahertz detectors are an important direction in the field of terahertz research. Commonly used terahertz wave band detectors are divided into two types: the material is a narrow-band-gap semiconductor material represented by indium gallium arsenic, tellurium cadmium mercury and the like, photon detection is realized by utilizing band gap transition of the material, and the regulation and control of the detection wavelength of the material need to change the material components so as to change the band gap, so that when the deviation of a certain component is increased, the integral quality is reduced, the dark current is increased rapidly, and the performance of the detector is reduced; the other type is a quantum well detector which utilizes the conduction band relative energy difference of materials with different components as the energy resolution of optical wave detection, however, when the response wave band of the detector extends to short wave, the component difference of adjacent materials needs to be changed, so that the lattice mismatch rate is obviously increased, and the performance of the device is reduced.
Patent document CN104729691A discloses a terahertz detector parameter measurement device and a measurement method, which are used for measuring parameters such as responsivity of various terahertz detectors. The invention adopts a method for comparing and measuring a standard terahertz detector with absolute responsiveness and a terahertz detector to be measured, which comprises the following steps: referring to terahertz radiation of a terahertz radiation source and background radiation of a liquid nitrogen refrigeration black body, modulating the terahertz radiation signal into a periodically-changed terahertz radiation signal by a chopper, alternately emitting the terahertz radiation signal into an optical system in a period, finally emitting the terahertz radiation signal onto a standard terahertz detector or a terahertz detector to be detected, converting the terahertz radiation signal into a periodically-changed voltage signal, and processing the voltage signal by a phase-locked amplifier to obtain a measurement voltage signal; and calculating parameters such as responsivity, noise equivalent power and the like of the terahertz detector to be detected according to the absolute responsivity value of the standard terahertz detector. The patent still leaves room for improvement in process configuration and technical effect.
Disclosure of Invention
Aiming at the defects in the prior art, the invention aims to provide a co-doped blocking impurity band detection system and a method.
The invention provides a detection method of a codoped blocking impurity band, which comprises the following steps: in the module M1, an ion implantation process is adopted on the surface of one side of a high-resistance silicon substrate to implant As ions or P ions, and then a furnace tube is adopted to carry out slow annealing to eliminate implantation damage; s2, continuously epitaxially growing an As and P element co-doped absorption layer on the surface of the implanted ion through a Metal Organic Chemical Vapor Deposition (MOCVD) process; s3, continuously epitaxially growing high-resistance silicon on the absorption layer as a barrier layer by a metal organic chemical vapor deposition process, wherein the layer is required to have the highest purity; s4, forming a local positive electrode contact area on the barrier layer through a complete photoetching process, ion implantation and a rapid thermal annealing process; forming a mesa structure in the barrier layer, the positive electrode contact area and the absorption layer with a certain depth through a complete photoetching process and a deep silicon etching process; s5, depositing silicon dioxide (SiO) on the surface, the side wall and the bottom of the table top by a plasma enhanced chemical vapor deposition process 2 ) A passivation layer; s6, opening a positive electrode hole and a negative electrode hole on the silicon dioxide passivation layer through a complete photoetching process, reactive ion beam etching (RIE) and a wet etching process to expose the silicon surface of the corresponding area; and S7, forming the positive electrode and the negative electrode with good ohmic contact in the positive electrode hole and the negative electrode hole through a complete photoetching process, electron beam evaporation and a rapid thermodynamic annealing process.
Preferably, the step S3 includes:
step S3.1: co-doping As and P elements to form an absorption layer, wherein the total concentration of the absorption layer is set to be 5E17/cm 3 -3E18/cm 3 The epitaxial thickness of the absorber layer is set to 15-25 microns.
Preferably, said module M1 comprises: module M1.1: in the ion implantation process for forming the negative electrode contact region, the implanted ions are As/P ions, the implantation energy is 20-80keV, and the implantation dose is 5-20 × 10 14 cm -2 The annealing process for forming the negative electrode contact area adopts furnace tube annealing, the protective atmosphere is nitrogen, the annealing temperature is 900-1100 ℃, and the annealing time is 10-50min.
Preferably, said module M1 comprises: module M1.2: in the ion implantation process for forming the positive electrode contact region, the implanted ions are As/P ions, the implantation energy is 20-80keV, and the implantation dosage is 1-7 × 10 14 cm -2 The annealing process for forming the positive electrode contact area adopts rapid thermodynamic annealing, the protective atmosphere is nitrogen, the annealing temperature is 900-1000 ℃, and the annealing time is 5-20s;
preferably, the step S6 includes: step S6.1: and adopting plasma enhanced chemical vapor deposition as a growth method of a silicon dioxide passivation layer, and setting the thickness of the silicon dioxide layer to be 150-300nm.
According to the invention, the codoped blocking impurity band detection system comprises: in the module M1, an ion implantation process is adopted on the surface of one side of a high-resistance silicon substrate to implant As ions or P ions, and then a furnace tube is adopted to carry out slow annealing to eliminate implantation damage; continuing to epitaxially grow an As and P element co-doped absorption layer on the surface of the module M2 after ion implantation by a Metal Organic Chemical Vapor Deposition (MOCVD) process; a module M3, wherein high-resistance silicon is continuously epitaxially grown on the absorption layer as a barrier layer by a metal organic chemical vapor deposition process, and the purity of the layer is required to be as high as possible; a module M4, wherein a local positive electrode contact area is formed on the barrier layer through a complete photoetching process, ion implantation and a rapid thermal annealing process; forming a mesa structure in the barrier layer, the positive electrode contact area and the absorption layer with a certain depth through a complete photoetching process and a deep silicon etching process; module M5, on the surface, side walls and bottom of the table top, by plasmaDaughter-enhanced chemical vapor deposition process for depositing silicon dioxide (SiO) 2 ) A passivation layer; a module M6, wherein a positive electrode hole and a negative electrode hole are formed on the silicon dioxide passivation layer through a complete photoetching process, a reactive ion beam etching (RIE) process and a wet etching process, so that the silicon surface of a corresponding area is exposed; and the module M7 is used for forming the positive electrode and the negative electrode with good ohmic contact in the positive electrode hole and the negative electrode hole through a complete photoetching process, electron beam evaporation and a rapid thermodynamic annealing process.
Preferably, said module M3 comprises:
module M3.1: co-doping As and P elements to form an absorption layer, wherein the total concentration of the absorption layer is set to be 5E17/cm 3 -3E18/cm 3 The epitaxial thickness of the absorber layer is set to 15-25 microns.
Preferably, said module M1 comprises: module M1.1: in the ion implantation process for forming the negative electrode contact region, the implanted ions are As/P ions, the implantation energy is 20-80keV, and the implantation dose is 5-20 × 10 14 cm -2 The annealing process for forming the negative electrode contact area adopts furnace tube annealing, the protective atmosphere is nitrogen, the annealing temperature is 900-1100 ℃, and the annealing time is 10-50min.
Preferably, said module M1 comprises: module M1.2: in the ion implantation process for forming the positive electrode contact region, the implanted ions are As/P ions, the implantation energy is 20-80keV, and the implantation dosage is 1-7 × 10 14 cm -2 The annealing process for forming the positive electrode contact area adopts rapid thermodynamic annealing, the protective atmosphere is nitrogen, the annealing temperature is 900-1000 ℃, and the annealing time is 5-20s;
preferably, said module M6 comprises: module M6.1: and adopting plasma enhanced chemical vapor deposition as a growth method of the silicon dioxide passivation layer, and setting the thickness of the silicon dioxide layer to be 150-300nm.
Compared with the prior art, the invention has the following beneficial effects:
1. in the invention, the doped elements of the absorption layer are As and P codoped, so that the function of detecting the 1-40 um wave band on a single device is realized, and the response bandwidth is greatly improved;
2. according to the invention, the negative electrode contact area is realized by adopting an ion implantation process, after the ion implantation, the annealing process adopts furnace tube slow annealing, the annealing time is 10-50min, and the method not only has the advantage of shallow ion implantation depth, namely the negative electrode contact layer is thin, but also can well eliminate lattice damage caused by the ion implantation, improve the effective incidence rate and improve the detection sensitivity;
3. the invention has reasonable flow structure and convenient use and can overcome the defects of the prior art.
Drawings
Other features, objects and advantages of the invention will become more apparent upon reading of the detailed description of non-limiting embodiments with reference to the following drawings:
fig. 1 is a schematic view of the overall structure of the present invention.
Fig. 2 is a schematic structural diagram of a focal plane array device of a mesa-type arsenic and phosphorus co-doped Si-based blocking impurity band detector with high responsivity and wide response band in the embodiment of the present invention.
Fig. 3 is a schematic diagram of normalized responsivity of the BIB device with wavelength variation when the absorption layer is doped with As element in the embodiment of the present invention.
Fig. 4 is a schematic diagram of normalized responsivity of the BIB device varying with wavelength when the absorption layer is doped with P element in the embodiment of the present invention.
FIG. 5 shows the result of the theoretical calculation of the normalized responsivity of the BIB device with wavelength variation when the absorption layer is codoped with As and P elements.
In the figure:
positive electrode contact layer 5 of high-resistance silicon substrate 1
Negative electrode contact layer 2 positive electrode 6
As and P codoped absorption layer 3 negative electrode 7
High-resistance silicon barrier layer 4V groove 8
Detailed Description
The present invention will be described in detail with reference to specific examples. The following examples will aid those skilled in the art in further understanding the present invention, but are not intended to limit the invention in any manner. It should be noted that it would be obvious to those skilled in the art that various changes and modifications can be made without departing from the spirit of the invention. All falling within the scope of the present invention.
In order to overcome the defects of the prior art, a blocking impurity band detector is produced. The blocking impurity band is essentially in the category of photoconductive detectors, except that a blocking layer is additionally added to the absorption layer to suppress the hopping conductance behavior of the doping element in the absorption layer at low temperatures. The impurity-blocking band detector of the mesa structure takes a high-resistance material as a substrate, a negative electrode contact area is prepared through ion implantation, an epitaxial layer with a certain doping concentration is grown to serve as an absorption layer, and a high-resistance blocking layer is prepared on the absorption layer. Light waves are incident from the substrate side of the device, and most of the light waves are absorbed by an absorption layer with a certain thickness, so that the conversion of photoelectric signals is realized.
The table-top structure blocks the impurity band detector absorption layer 3 from being doped with only As element or only P element in the prior art, and when the absorption layer is doped with the As element, the long-wave cut-off wavelength is about 29um, and the short-wave cut-off wavelength is about 1um; when P element is doped, the long-wave cut-off wavelength is about 40um, the short-wave cut-off wavelength is about 10um, and the two schemes have disadvantages in long wave and short wave respectively.
The mesa structure blocks impurity and takes detector negative electrode contact layer 2 prior art to be two kinds, one kind is through metal organic chemical vapor deposition process epitaxial growth, and epitaxial growth is difficult to control when thickness is thin, leads to back electrode layer thickness big and inhomogeneous, and mesa structure requires the back incident, and back electrode layer doping concentration is high, and the absorption coefficient is high, absorbs very big a part light, leads to the effective incident light intensity of absorbing layer to descend, and the responsivity reduces, the homogeneity reduces. The other method is that the ion implantation method accelerates the annealing of a rapid annealing furnace (RTP), the longest retention time of the rapid annealing furnace is generally less than one minute at the temperature of about 1000 ℃ due to the structural limitation of a furnace body, the time is too short, only the action of activating ions can be achieved, the negative influence of the damage of the ion implantation on the incident light transmittance is removed, the effective incident light is reduced, and the response rate is reduced.
As shown in fig. 1 to 4, a co-doped blocking impurity band detection system and method includes:
and implanting As ions or P ions into the surface of the single side of the high-resistance silicon substrate by adopting an ion implantation process, and then, performing slow annealing by adopting a furnace tube to eliminate implantation damage.
And (4) continuing to epitaxially grow an As and P element co-doped absorption layer on the surface of the ion-implanted substrate by a Metal Organic Chemical Vapor Deposition (MOCVD) process.
And continuously epitaxially growing high-resistance silicon on the absorption layer by a metal organic chemical vapor deposition process to serve as a barrier layer, wherein the purity of the layer is required to be as high as possible.
Forming a local positive electrode contact area on the barrier layer through a complete photoetching process, ion implantation and a rapid thermal annealing process; and forming a mesa structure in the barrier layer, the positive electrode contact region and the absorption layer with a certain depth by a complete photoetching process and a deep silicon etching process.
Depositing silicon dioxide (SiO) on the surface, the side wall and the bottom of the table top by a plasma enhanced chemical vapor deposition process 2 ) A passivation layer;
opening positive and negative electrode holes on the silicon dioxide passivation layer through a complete photoetching process, reactive ion beam etching (RIE) and a wet etching process to expose silicon surfaces in corresponding areas;
forming positive and negative electrodes with good ohmic contact in the positive and negative electrode holes through a complete photoetching process, electron beam evaporation and a rapid thermodynamic annealing process;
preferably, the absorbing layer is codoped by As and P elements and has a total concentration of 5E17/cm 3 ~3E18/cm 3 The epitaxial thickness of the absorption layer is 15-25 microns.
Preferably, in the ion implantation process for forming the negative electrode contact region, the implanted ions are As/P ions, the implantation energy is 20-80keV, and the implantation dose is 5-20 × 10 14 cm -2 The annealing process for forming the negative electrode contact area adopts furnace tube annealing, the protective atmosphere is nitrogen, the annealing temperature is 900-1100 ℃, and the annealing time is10~50min;
Preferably, in the ion implantation process for forming the positive electrode contact region, the implanted ions are As/P ions, the implantation energy is 20-80keV, and the implantation dose is 1-7 × 10 14 cm ~2 The annealing process for forming the positive electrode contact area adopts rapid thermodynamic annealing, the protective atmosphere is nitrogen, the annealing temperature is 900-1000 ℃, and the annealing time is 5-20s;
preferably, the growth method of the silicon dioxide passivation layer is plasma enhanced chemical vapor deposition, and the thickness of the silicon dioxide layer is 150-300nm.
Specifically, in one aspect, a co-doped blocking impurity band detection system and method includes:
cleaning a high-resistance silicon substrate: the resistivity of the high-resistance silicon substrate is more than 10000 omega cm,<100>the mirror surface is obtained by market purchase, firstly, carbon tetrachloride is adopted for ultrasonic cleaning for 5 minutes, deionized water is adopted for cleaning, then acetone and isopropanol are respectively adopted for ultrasonic cleaning for 10 minutes, and deionized water is adopted for washing to remove organic pollutants; the reuse volume ratio is HF: h 2 O =1:10 for 30 seconds, followed by deionized water rinse and nitrogen blow dry.
Preparing a back electrode contact layer: firstly, siO with the thickness of 20nm is deposited by adopting plasma enhanced chemical vapor deposition 2 The ion implantation direction deviates from the channel direction by 7 degrees, and the two measures are to prevent the channel effect generated by the ion implantation. Then, standard ion implantation process is adopted, the implantation energy is 20-80keV, and the implantation dosage is 5-20 × 10 14 cm -2 . And then, adopting furnace tube annealing treatment to eliminate ion implantation damage to the maximum extent, wherein the protective atmosphere is nitrogen, the annealing temperature is 900-1000 ℃, and the annealing time is 10-50min. Then, mixing the components in a volume ratio of HF: h 2 O =1:10 for 30 seconds, followed by deionized water rinse and nitrogen blow dry.
Growing an absorption layer by chemical vapor deposition: epitaxially growing an As and P element co-doped absorption layer on the ion-implanted substrate by adopting a metal organic compound chemical vapor deposition process, wherein the growth thickness is 15-25 microns, and the total doping concentration range of the two elements is 5E17/cm 3 -3E18/cm 3
Growing a barrier layer by chemical vapor deposition: and epitaxially growing a high-purity barrier layer on the absorption layer by adopting a metal organic compound chemical vapor deposition process, wherein the growth thickness is 5-8 microns, and the purity of the cavity is ensured as far as possible in the growth process so as not to introduce other impurity elements.
Preparing a photoetching mark: firstly, a complete photoetching process is carried out, and positive photoresist is coated on the surface of the high-resistance silicon epitaxial layer in a spin coating mode, wherein the thickness of the positive photoresist is 1.6 mu m. And then placing the substrate on a hot plate with the temperature of 100 ℃ for pre-baking for 2 minutes, and then exposing and developing for 1 minute to form a photoetching mark area window. Depositing Ti/Au double-layer metal by adopting an electron beam evaporation process, and then soaking and stripping in acetone to form the photoetching mark.
Preparing a positive electrode contact area: performing complete photoetching process to obtain window required for ion implantation, and performing ion implantation with As/P ion implantation energy of 20-80keV and implantation dosage of 1-7 × 10 14 cm -2 And then, adopting rapid thermal mechanical annealing with the protective atmosphere of nitrogen, the annealing temperature of 900-1000 ℃ and the annealing time of 5-20s.
Etching to isolate phase elements: and (3) obtaining a window required by etching through a complete photoetching process, and removing the positive electrode contact layer, the barrier layer and the absorption layer by adopting a deep silicon etching process until the ion implantation back electrode contact layer is exposed.
Evaporation of positive and negative electrodes: and (2) obtaining a positive electrode and negative electrode area window on the positive and negative electrode contact layers by adopting a complete photoetching process, depositing four layers of Ti/Al/Ni/Au metal by adopting an electron beam evaporation process, soaking and stripping in acetone, and then carrying out rapid thermal annealing.
Thickening the positive electrode and the negative electrode: and (3) adopting a complete photoetching process, obtaining windows of positive electrode and negative electrode areas again on the positive and negative electrode contact layers, and evaporating Ni/Au by adopting an electron beam evaporation process to thicken the positive and negative electrodes to finish the preparation of positive and negative ohmic contact electrodes.
Packaging: and finishing the packaging of the device by adopting a grinding wheel scribing and gold wire ball bonding process, and finishing the preparation of the device.
In the description of the present application, it is to be understood that the terms "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", and the like indicate orientations or positional relationships based on those shown in the drawings, and are only for convenience in describing the present application and simplifying the description, but do not indicate or imply that the referred device or element must have a specific orientation, be constructed in a specific orientation, and be operated, and thus, should not be construed as limiting the present application.
The foregoing description has described specific embodiments of the present invention. It is to be understood that the present invention is not limited to the specific embodiments described above, and that various changes or modifications may be made by one skilled in the art within the scope of the appended claims without departing from the spirit of the invention. The embodiments and features of the embodiments of the present application may be combined with each other arbitrarily without conflict.

Claims (10)

1. A co-doped barrier impurity band detection method, comprising:
s1, injecting As ions or P ions into the surface of one side of the high-resistance silicon substrate, and then annealing by using a furnace tube to eliminate injection damage;
s2, continuously epitaxially growing an As and P element codoped absorption layer on the surface after ion implantation;
s3, continuously epitaxially growing high-resistance silicon on the absorption layer by using a metal organic chemical vapor deposition process to serve as a barrier layer;
s4, forming a local positive electrode contact area on the barrier layer;
forming a mesa structure in the barrier layer, the positive electrode contact region and the absorption layer with a certain depth;
step S5: depositing a silicon dioxide passivation layer on the surface, the side wall and the bottom of the table top;
step S6: opening a positive electrode hole and a negative electrode hole on the silicon dioxide passivation layer so as to expose the silicon surface of the corresponding region;
step S7: and forming a positive electrode and a negative electrode with good ohmic contact in the positive electrode hole and the negative electrode hole.
2. The method according to claim 1, wherein the step S2 comprises:
step S2.1: co-doping As and P elements to form an absorption layer, wherein the total concentration of the absorption layer is set to be 5E17/cm 3 -3E18/cm 3 The epitaxial thickness of the absorber layer is set to 15-25 microns.
3. The co-doped barrier impurity band detection method according to claim 1, wherein the step S1 comprises: step S1.1: in the ion implantation process for forming the negative electrode contact region, the implanted ions are As/P ions, the implantation energy is 20-80keV, and the implantation dose is 5-20 × 10 14 cm -2 The annealing process for forming the negative electrode contact area adopts furnace tube annealing, the protective atmosphere is nitrogen, the annealing temperature is 900-1100 ℃, and the annealing time is 10-50min.
4. The method according to claim 3, wherein the step S1 comprises: step S1.2: in the ion implantation process for forming the positive electrode contact region, the implanted ions are As/P ions with implantation energy of 20-80keV and implantation dosage of 1-7 × 10 14 cm -2 The annealing process for forming the positive electrode contact area adopts rapid thermodynamic annealing, the protective atmosphere is nitrogen, the annealing temperature is 900-1000 ℃, and the annealing time is 5-20s.
5. The co-doped barrier impurity band detection method according to claim 1, wherein the step S6 comprises: step S6.1: and adopting plasma enhanced chemical vapor deposition as a growth method of the silicon dioxide passivation layer, and setting the thickness of the silicon dioxide layer to be 150-300nm.
6. A co-doped barrier impurity strip detection system, comprising:
injecting As ions or P ions into the surface of one side of the high-resistance silicon substrate, and then annealing by using a furnace tube to eliminate injection damage;
continuing to epitaxially grow an As and P element co-doped absorption layer on the surface of the module M2 after the ion implantation;
a module M3, wherein high-resistance silicon is continuously epitaxially grown on the absorption layer by a metal organic chemical vapor deposition process to be used as a barrier layer;
module M4, forming a local positive electrode contact area on the barrier layer;
forming a mesa structure in the barrier layer, the positive electrode contact region and the absorption layer with a certain depth;
a module M5: depositing a silicon dioxide passivation layer on the surface, the side wall and the bottom of the table top;
a module M6: opening a positive electrode hole and a negative electrode hole on the silicon dioxide passivation layer so as to expose the silicon surface in corresponding areas;
a module M7: and forming a positive electrode and a negative electrode with good ohmic contact in the positive electrode hole and the negative electrode hole.
7. The co-doped barrier impurity strip detection system of claim 6, wherein the module M2 comprises:
module M2.1: co-doping As and P elements to form an absorption layer, wherein the total concentration of the absorption layer is set to be 5E17/cm 3 -3E18/cm 3 The epitaxial thickness of the absorber layer is set to 15-25 microns.
8. The co-doped barrier impurity strip detection system of claim 6, wherein the module M1 comprises: module M1.1: in the ion implantation process for forming the negative electrode contact region, the implanted ions are As/P ions, the implantation energy is 20-80keV, and the implantation dose is 5-20 × 10 14 cm -2 The annealing process for forming the negative electrode contact area adopts furnace tube annealing, the protective atmosphere is nitrogen, the annealing temperature is 900-1100 ℃, and the annealing time is 10-50min.
9. The codoped barrier impurity strip detection system of claim 8, wherein the module M1 packComprises the following steps: module M1.2: in the ion implantation process for forming the positive electrode contact region, the implanted ions are As/P ions, the implantation energy is 20-80keV, and the implantation dosage is 1-7 × 10 14 cm -2 The annealing process for forming the positive electrode contact area adopts rapid thermodynamic annealing, the protective atmosphere is nitrogen, the annealing temperature is 900-1000 ℃, and the annealing time is 5-20s.
10. The codoped blocking impurity strip detection system of claim 6, wherein the module M6 comprises: module M6.1: and adopting plasma enhanced chemical vapor deposition as a growth method of the silicon dioxide passivation layer, and setting the thickness of the silicon dioxide layer to be 150-300nm.
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