CN112289872A - Impurity-blocking band detector with inverted trapezoidal groove surface structure and preparation method thereof - Google Patents
Impurity-blocking band detector with inverted trapezoidal groove surface structure and preparation method thereof Download PDFInfo
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Abstract
The invention provides an impurity band blocking detector with an inverted trapezoidal groove surface structure and a preparation method thereof, wherein the impurity band blocking detector comprises a high-purity gallium arsenide substrate, and a common negative electrode contact layer, a gallium arsenide sulfur-doped absorption layer, an intrinsic gallium arsenide barrier layer, a silicon nitride passivation layer, a positive electrode contact layer, a positive electrode and a negative electrode which are sequentially arranged on the high-purity gallium arsenide substrate; a positive electrode groove for accommodating the positive electrode contact layer is arranged on the intrinsic gallium arsenide barrier layer; the intrinsic gallium arsenide barrier layer and the gallium arsenide sulfur-doped absorption layer are provided with inverted trapezoidal negative electrode grooves, and the silicon nitride passivation layer is distributed on the surface of the intrinsic gallium arsenide barrier layer and the side faces of the inverted trapezoidal negative electrode grooves; the positive electrode and the negative electrode are respectively arranged on the surfaces of the inverted trapezoidal negative electrode grooves of the positive electrode contact layer, and the negative electrode is connected with the common negative electrode contact layer through the bottom surface of the inverted trapezoidal negative electrode groove. The invention can work in a front-lighting mode and a back-lighting mode, and the inverted trapezoidal negative electrode groove is adopted, thereby being beneficial to improving the reliability of electrical connection.
Description
Technical Field
The invention relates to a terahertz detection device and a preparation technology thereof, in particular to an impurity band blocking detector with an inverted trapezoidal groove surface structure and a preparation method thereof, and particularly relates to a high-sensitivity and high-reliability impurity band blocking terahertz detector with an inverted trapezoidal groove surface structure and a preparation method thereof.
Background
The gallium arsenide-based impurity blocking band detector can effectively detect terahertz radiation within a wave band range of 100-300 microns. Has wide application prospect in civil, military and aerospace fields. At present, a gallium arsenide-based impurity band blocking detector mainly adopts the following two preparation methods: one is prepared by adopting a high-conductivity gallium arsenide substrate, and the other is prepared by adopting a high-purity gallium arsenide substrate. When the high-conductivity gallium arsenide substrate is adopted for preparation, other doping processes are not needed to form an electrode contact layer, the common negative electrode can be directly manufactured on the high-conductivity gallium arsenide substrate, the manufacturing Process is simple and feasible, but because terahertz radiation cannot penetrate through the high-conductivity gallium arsenide substrate, the Detector manufactured by the method can only work in a positive irradiation mode (namely terahertz radiation irradiates from the side of the barrier layer, penetrates through the barrier layer and is absorbed by the absorption layer to form response current), which is shown in Bingbing Wang, Xiaodong Wang, Yulu Chen, Liwei Hou, Wei Xie, Ming Pan.
When the high-purity gallium arsenide substrate is adopted for preparation, a common negative electrode contact layer is required to be formed on the surface of the high-purity gallium arsenide substrate by an ion implantation or chemical vapor phase epitaxy method, and then a subsequent preparation process is carried out. The detector manufactured by the method has the advantages that the detector can work in a front irradiation mode and a back irradiation mode (namely terahertz radiation irradiates from one side of the high-purity gallium arsenide substrate, penetrates through the high-purity gallium arsenide substrate and is absorbed by the absorption layer to form response current). At present, the preparation method mostly adopts a V-shaped groove structure, wherein the V-shaped groove penetrates through the barrier layer, the absorption layer and the common negative electrode contact layer, and the bottom surface of the V-shaped groove is positioned on the high-purity gallium arsenide substrate. The contact area of the electrode metal and the contact layer of the common negative electrode in the V-shaped groove structure is small, the contact resistance is large, the reliability of electrode connection is not high, good contact is not easy to form, the manufacturing method can refer to Liao, Liuxi Hui, yellow and bright and the like.
Patent document CN105957917A discloses a wavelength selection Si-based photoconductive mid-infrared blocking impurity band detector based on surface plasmons and a preparation method thereof, which sequentially comprises a high-purity silicon substrate, a buried bottom electrode with low resistivity on the high-purity silicon substrate, a high-doping absorption layer, an impurity band blocking layer, and a passivation layer deposited above the blocking layer from bottom to top, wherein an upper electrode interconnection region and an upper electrode are arranged on the blocking layer, the upper electrode is a square periodic circular hole array formed by an aluminum film, the square periodic circular hole array formed by the aluminum film is a surface plasmonic structure of the detector, and the wavelength selection function is realized. The upper electrode is made of metal aluminum, the preparation process of the aluminum is simple, convenient and mature, the price is low, the aluminum is easy to obtain, the anti-corrosion capability is strong, and the compatibility with devices is good; compared with a corrosion technology, the metal aluminum square periodic circular hole array prepared by the stripping technology has better controllability and actual effect. However, the technical solution of this patent document adopts a V-groove structure, in which the contact area between the electrode metal and the common negative electrode contact layer is small, the contact resistance is large, the reliability of the electrode connection is not high, and good contact is not easily formed.
Disclosure of Invention
Aiming at the defects in the prior art, the invention aims to provide an impurity band blocking detector with an inverted trapezoidal groove surface structure and a preparation method thereof.
The impurity band blocking detector with the inverted trapezoidal groove surface structure comprises a high-purity gallium arsenide substrate, a common negative electrode contact layer, a gallium arsenide sulfur-doped absorption layer, an intrinsic gallium arsenide blocking layer, a positive electrode contact layer, a silicon nitride passivation layer, a positive electrode and a negative electrode;
the high-purity gallium arsenide substrate is sequentially provided with a common negative electrode contact layer, a gallium arsenide sulfur-doped absorption layer, an intrinsic gallium arsenide barrier layer and a silicon nitride passivation layer;
a positive electrode groove for accommodating the positive electrode contact layer is formed in the intrinsic gallium arsenide barrier layer, and the positive electrode contact layer is arranged in the positive electrode groove;
the intrinsic gallium arsenide barrier layer and the gallium arsenide sulfur-doped absorption layer are provided with inverted trapezoidal negative electrode grooves, and the silicon nitride passivation layer is distributed on the surface of the intrinsic gallium arsenide barrier layer and the side faces of the inverted trapezoidal negative electrode grooves;
the positive electrode is arranged on the surface of the positive electrode contact layer and extends to the surface of the silicon nitride passivation layer;
the negative electrode is arranged on the surface of the inverted trapezoid negative electrode groove and extends to the outer plane of the inverted trapezoid negative electrode groove, and the negative electrode is connected with the common negative electrode contact layer through the bottom surface of the inverted trapezoid negative electrode groove.
The invention provides a preparation method of an impurity band blocking detector with an inverted trapezoidal groove surface structure, which comprises the following steps:
the method comprises the following steps: preparing a common negative electrode contact layer on a high-purity gallium arsenide substrate;
step two: depositing a gallium arsenide doped sulfur absorbing layer on the common negative electrode contact layer;
step three: depositing an intrinsic gallium arsenide barrier layer on the gallium arsenide doped sulfur absorption layer;
step four: preparing a positive electrode groove on the intrinsic gallium arsenide barrier layer, and depositing a positive electrode contact layer in the positive electrode groove;
step five: preparing an inverted trapezoidal negative electrode groove on the intrinsic gallium arsenide barrier layer and the gallium arsenide sulfur-doped absorption layer;
step six: depositing a silicon nitride passivation layer on the surfaces of the intrinsic gallium arsenide barrier layer, the positive electrode contact layer and the inverted trapezoidal negative electrode groove;
step seven: and forming a negative electrode opening and a positive electrode opening on the bottom surface position of the inverted trapezoidal negative electrode groove on the surface of the silicon nitride passivation layer and the position of the positive electrode contact layer, depositing a negative electrode and a positive electrode, and then packaging.
Preferably, in the first step, a common negative electrode contact layer is grown on the high-purity gallium arsenide substrate by adopting a molecular beam epitaxy method;
in the second step, a gallium arsenide sulfur-doped absorption layer is epitaxially grown on the common negative electrode contact layer by adopting a chemical vapor deposition process;
and in the third step, a chemical vapor deposition process is adopted to epitaxially grow an intrinsic gallium arsenide barrier layer on the gallium arsenide doped sulfur absorption layer.
Preferably, the common negative electrode contact layer grown by the molecular beam epitaxy in the first step is doped with silicon element with the doping concentration of 5 × 1018cm-3The growth thickness is 150 nm;
in the second step, a gallium arsenide doped sulfur absorption layer is epitaxially grown by adopting a metal organic compound chemical vapor deposition process, wherein the doping concentration of the sulfur element is 5 multiplied by 1015~2×1016cm-3The growth thickness is 30-35 mu m;
and in the third step, a metal organic compound chemical vapor deposition process is adopted to epitaxially grow the intrinsic gallium arsenide barrier layer, wherein the growth thickness is 8-10 microns.
Preferably, in the fourth step, a positive electrode groove is etched on the intrinsic gallium arsenide barrier layer by adopting a photoetching process, and a positive electrode contact layer is formed in the positive electrode groove by sulfur ion implantation and a rapid thermal annealing process.
Preferably, the step five comprises the following steps:
step 5.1: depositing a silicon nitride mask layer on the surface of the intrinsic gallium arsenide barrier layer;
step 5.2: etching a slotted area on the silicon nitride mask layer by adopting a photoetching process;
step 5.3: corroding an inverted trapezoidal negative electrode groove on the intrinsic gallium arsenide barrier layer and the gallium arsenide doped sulfur absorption layer by adopting a wet corrosion process;
step 5.4: and removing the silicon nitride mask layer on the surface of the intrinsic gallium arsenide barrier layer.
Preferably, in the sixth step, a silicon nitride passivation layer is deposited by using a plasma enhanced chemical vapor deposition process, and the deposition thickness is 200 nm.
Preferably, the seventh step comprises the steps of:
step 7.1: etching the negative electrode open pore and the positive electrode open pore at the bottom surface position of the inverted trapezoidal negative electrode groove and the positive electrode contact layer position on the surface of the silicon nitride passivation layer by adopting a photoetching process;
step 7.2: forming a negative electrode evaporation area and a positive electrode evaporation area on the negative electrode opening and the positive electrode opening through photoresist on the surface of the silicon nitride passivation layer by adopting a photoetching process;
step 7.3: evaporating conductive metal on the surfaces of the negative electrode evaporation area, the positive electrode evaporation area and the photoresist by an electron beam evaporation process;
step 7.4: and removing the photoresist, and respectively forming a negative electrode and a positive electrode in the negative electrode evaporation area and the positive electrode evaporation area.
Preferably, in the seventh step, an annealing process is used to anneal the positive electrode and the negative electrode.
Preferably, the seventh step further comprises the steps of:
step 7.5: forming a thickened negative electrode evaporation area and a thickened positive electrode evaporation area on the surfaces of the negative electrode and the positive electrode through photoresist by adopting a photoetching process, wherein the area of the thickened negative electrode evaporation area is larger than that of the negative electrode, and the area of the thickened positive electrode evaporation area is larger than that of the positive electrode;
step 7.6: evaporating conductive metal on the surfaces of the thickened negative electrode evaporation area, the thickened positive electrode evaporation area and the photoresist by an electron beam evaporation process;
step 7.7: and removing the photoresist, and respectively forming a thickened negative electrode and a thickened positive electrode in the thickened negative electrode evaporation area and the thickened positive electrode evaporation area.
Compared with the prior art, the invention has the following beneficial effects:
1. the invention adopts the high-purity gallium arsenide substrate, can effectively transmit far terahertz radiation, and can work in a front irradiation mode and a back irradiation mode relative to a front irradiation type detector using the high-conductivity gallium arsenide substrate, thereby being convenient for manufacturing an array type silicon-based impurity band blocking detector.
2. The invention adopts the molecular beam epitaxy process and the rapid thermal annealing process to dope to form the common negative electrode contact layer, can accurately control the concentration and the growth depth of doped impurities, and is favorable for forming good ohmic contact of the electrode while avoiding the absorption loss of the common negative electrode contact layer to terahertz radiation.
3. The invention adopts wet etching process to form an inverted trapezoidal groove surface structure, the bottom surface of the groove surface is positioned on the common negative electrode contact layer, and compared with the V-shaped groove structure, the invention increases the contact area of the common negative electrode, reduces the contact resistance, is beneficial to forming good ohmic contact and improves the reliability of electrical connection.
4. According to the invention, the silicon nitride passivation layer is deposited on the surface of the intrinsic silicon barrier layer, the surface of the positive electrode contact area and the side surface of the inverted trapezoidal groove surface by adopting a plasma enhanced chemical vapor deposition process, so that the surface leakage current can be effectively inhibited, and the sensitivity and stability of the device are improved.
Drawings
Other features, objects and advantages of the invention will become more apparent upon reading of the detailed description of non-limiting embodiments with reference to the following drawings:
fig. 1 is a schematic cross-sectional structure diagram of an impurity band blocking detector with an inverted trapezoidal groove surface structure according to the present invention.
Fig. 2 is a flow chart of a method for manufacturing an impurity band blocking detector with an inverted trapezoidal groove surface structure according to the present invention.
Fig. 3 is a schematic structural diagram after a common negative electrode contact layer is grown on a high-purity gallium arsenide substrate.
Fig. 4 is a schematic structural diagram of the gallium arsenide doped sulfur absorption layer grown on the common negative electrode contact layer on the basis of fig. 3.
Fig. 5 is a schematic structural diagram of the intrinsic gallium arsenide barrier layer grown on the gallium arsenide doped sulfur absorption layer based on fig. 4.
Fig. 6 is a schematic structural diagram of the intrinsic gallium arsenide barrier layer on the basis of fig. 5 after a positive electrode contact layer is formed by ion implantation.
Fig. 7 is a schematic structural diagram of fig. 6 after a silicon nitride mask layer is deposited on the intrinsic gallium arsenide barrier layer and the surface of the positive electrode contact layer.
Fig. 8 is a schematic structural diagram of the silicon nitride mask layer after a trench area is etched on the silicon nitride mask layer based on fig. 7.
FIG. 9 is a schematic structural diagram of the structure of FIG. 8 after forming an inverted trapezoidal common negative electrode trench in the intrinsic GaAs barrier layer and the GaAs doped sulfur absorption layer by etching.
Fig. 10 is a schematic structural view of fig. 9 after the silicon nitride mask layer is removed.
Fig. 11 is a schematic structural diagram of the structure of fig. 10 after depositing a silicon nitride passivation layer on the intrinsic gallium arsenide barrier layer, the surface of the positive electrode contact layer, and the side surfaces and the bottom surface of the inverted trapezoid-shaped groove surface.
Fig. 12 is a schematic structural view of fig. 11 with positive and negative electrode holes.
The figures show that:
1-high purity gallium arsenide substrate 6-silicon nitride mask layer
2-common negative electrode contact layer 7-silicon nitride passivation layer
3-gallium arsenide doped sulfur absorption layer 8-positive electrode
4-intrinsic gallium arsenide barrier 9-negative electrode
5-positive electrode contact layer
Detailed Description
The present invention will be described in detail with reference to specific examples. The following examples will assist those skilled in the art in further understanding the invention, but are not intended to limit the invention in any way. It should be noted that it would be obvious to those skilled in the art that various changes and modifications can be made without departing from the spirit of the invention. All falling within the scope of the present invention.
The impurity band blocking detector with the inverted trapezoid groove surface structure, as shown in fig. 1, comprises a high-purity gallium arsenide substrate 1, a common negative electrode contact layer 2, a gallium arsenide sulfur-doped absorption layer 3, an intrinsic gallium arsenide barrier layer 4, a positive electrode contact layer 5, a silicon nitride passivation layer 7, a positive electrode 8 and a negative electrode 9; the high-purity gallium arsenide substrate 1 is sequentially provided with a common negative electrode contact layer 2, a gallium arsenide sulfur-doped absorption layer 3, an intrinsic gallium arsenide barrier layer 4 and a silicon nitride passivation layer 7; a positive electrode groove for accommodating the positive electrode contact layer 5 is arranged on the intrinsic gallium arsenide barrier layer 4, and the positive electrode contact layer 5 is arranged in the positive electrode groove; inverted trapezoidal negative electrode grooves are formed in the intrinsic gallium arsenide barrier layer 4 and the gallium arsenide sulfur-doped absorption layer 3, and silicon nitride passivation layers 7 are distributed on the surface of the intrinsic gallium arsenide barrier layer 4 and the side faces of the inverted trapezoidal negative electrode grooves; the positive electrode 8 is arranged on the surface of the positive electrode contact layer 5 and extends to the surface of the silicon nitride passivation layer 7; the negative electrode 9 is arranged on the surface of the inverted trapezoid negative electrode groove (comprising the bottom surface and the side surface of the inverted trapezoid negative electrode groove) and extends to the external plane of the inverted trapezoid negative electrode groove, and the negative electrode 9 is connected with the common negative electrode contact layer 2 through the bottom surface of the inverted trapezoid negative electrode groove.
According to the manufacturing method of the impurity band blocking detector with the inverted trapezoid groove surface structure, as shown in fig. 1-12, the method comprises the following steps:
the method comprises the following steps: preparing a common negative electrode contact layer 2 on a high-purity gallium arsenide substrate 1;
step two: depositing a gallium arsenide doped sulfur absorbing layer 3 on the common negative electrode contact layer 2;
step three: depositing an intrinsic gallium arsenide barrier layer 4 on the gallium arsenide doped sulfur absorption layer 3;
step four: preparing a positive electrode groove on the intrinsic gallium arsenide barrier layer 4, and depositing a positive electrode contact layer 5 in the positive electrode groove;
step five: preparing an inverted trapezoidal negative electrode groove on the intrinsic gallium arsenide barrier layer 4 and the gallium arsenide sulfur-doped absorption layer 3;
step six: depositing a silicon nitride passivation layer 7 on the surfaces of the intrinsic gallium arsenide barrier layer 4, the positive electrode contact layer 5 and the inverted trapezoidal negative electrode groove;
step seven: and forming negative electrode openings and positive electrode openings on the bottom surface positions of the inverted trapezoidal negative electrode grooves on the surface of the silicon nitride passivation layer 7 and the positions of the positive electrode contact layer 5, depositing a negative electrode 9 and a positive electrode 8, and then packaging.
In the first step, a common negative electrode contact layer 2 is grown on a high-purity gallium arsenide substrate 1 by adopting a molecular beam epitaxy method, and preferably, the resistivity of the high-purity gallium arsenide substrate is more than 1 multiplied by 107 omega cm; in the second step, a gallium arsenide sulfur-doped absorption layer 3 is epitaxially grown on the common negative electrode contact layer 2 by adopting a chemical vapor deposition process; and in the third step, the intrinsic gallium arsenide barrier layer 4 is epitaxially grown on the gallium arsenide doped sulfur absorption layer 3 by adopting a chemical vapor deposition process. Preferably, the common negative electrode contact layer 2 grown by the molecular beam epitaxy in the step one is doped with silicon element with a doping concentration of 5 × 1018cm-3The growth thickness is 150 nm; in the second step, a gallium arsenide doped sulfur absorption layer 3 is epitaxially grown by adopting a metal organic compound chemical vapor deposition process, wherein the doping concentration of the sulfur element is 5 multiplied by 1015~2×1016cm-3The growth thickness is 30-35 mu m; in the third step, the intrinsic gallium arsenide barrier layer 4 is epitaxially grown by adopting a metal organic compound chemical vapor deposition process, no element is intentionally doped, and the growth thickness is thick8 to 10 μm.
And in the fourth step, a positive electrode groove is etched on the intrinsic gallium arsenide barrier layer 4 by adopting a photoetching process, and a positive electrode contact layer 5 is formed in the positive electrode groove by sulfur ion injection and a rapid thermal annealing process. Preferably, in the ion implantation process for forming the positive electrode contact layer 5, the implanted ions are sulfur ions, the implantation energy is 50-60 keV, and the implantation dose is 5 × 1014~8×1014cm-2The injection angle is 7 degrees; in the rapid thermal annealing process for forming the positive electrode contact layer 5, the protective atmosphere is nitrogen, the heating and cooling rate is 100 ℃/s, the annealing temperature is 900-960 ℃, and the annealing time is 20-25 s.
The fifth step comprises the following steps:
step 5.1: depositing a silicon nitride mask layer 6 on the surface of the intrinsic gallium arsenide barrier layer 4; preferably, a silicon nitride mask layer 6 is grown by adopting a plasma enhanced chemical vapor deposition process, and the thickness of the grown silicon nitride mask layer 6 is 220 nm;
step 5.2: etching a slotted area on the silicon nitride mask layer 6 by adopting a photoetching process;
step 5.3: corroding reversed trapezoidal negative electrode grooves on the intrinsic gallium arsenide barrier layer 4 and the gallium arsenide sulfur-doped absorption layer 3 by adopting a wet corrosion process; preferably, a Reactive Ion Etching (RIE) and wet etching process is adopted to form an inverted trapezoidal negative electrode groove, the used etching solution is a mixed solution of phosphoric acid with the concentration of 85%, hydrogen peroxide with the concentration of 30% and deionized water, the volume ratio of the three components is 2:1:20, and the etching depth is 38-45 mu m;
step 5.4: removing the silicon nitride mask layer 6 on the surface of the intrinsic gallium arsenide barrier layer 4; preferably, a hydrofluoric acid etching solution with a volume ratio of hydrofluoric acid (concentration of 49%) to deionized water (concentration of 1: 5) is adopted, the etching time is 120-150 s, and the silicon nitride mask layer 6 is removed.
In the sixth step, silicon nitride (SiN) is deposited by adopting a plasma enhanced chemical vapor deposition processx) The passivation layer 7, preferably the silicon nitride passivation layer 7, is deposited to a thickness of 200 nm.
The seventh step comprises the following steps:
step 7.1: etching the negative electrode open pore and the positive electrode open pore on the bottom surface of the inverted trapezoidal negative electrode groove on the surface of the silicon nitride passivation layer 7 and the position of the positive electrode contact layer 5 by adopting a photoetching process; preferably, the etching step in the photoetching adopts reactive ion etching, and the etching depth is 200 nm;
step 7.2: forming a negative electrode evaporation area and a positive electrode evaporation area on the surface of the silicon nitride passivation layer 7 through photoresist at the negative electrode opening and the positive electrode opening by adopting a photoetching process;
step 7.3: evaporating conductive metal on the surfaces of the negative electrode evaporation area, the positive electrode evaporation area and the photoresist by an electron beam evaporation process; preferably, gold germanium alloy (AuGe), nickel (Ni) and gold (Au) are evaporated from bottom to top in sequence, the thickness of the evaporated gold germanium alloy is 50nm, the thickness of the evaporated nickel is 30nm, and the thickness of the evaporated gold is 150 nm;
step 7.4: the photoresist is removed, and a negative electrode 9 and a positive electrode 8 are formed in the negative electrode evaporation region and the positive electrode evaporation region, respectively. And in the seventh step, annealing is carried out on the positive electrode 8 and the negative electrode 9 by adopting an annealing process so as to form good ohmic contact.
The seventh step further comprises the following steps:
step 7.5: forming a thickened negative electrode evaporation area and a thickened positive electrode evaporation area on the surface of the silicon nitride passivation layer 7 through photoresist at the negative electrode 9 and the positive electrode 8 by adopting a photoetching process, wherein the area of the thickened negative electrode evaporation area is larger than that of the negative electrode 9, and the area of the thickened positive electrode evaporation area is larger than that of the positive electrode 8;
step 7.6: evaporating conductive metal on the surfaces of the thickened negative electrode evaporation area, the thickened positive electrode evaporation area and the photoresist by an electron beam evaporation process; preferably, nickel and gold are evaporated in sequence from bottom to top, the thickness of the evaporated nickel is 30nm, and the thickness of the evaporated gold is 200 nm;
step 7.7: removing the photoresist, and respectively forming a thickened negative electrode 9 and a thickened positive electrode 8 in the thickened negative electrode evaporation area and the thickened positive electrode evaporation area;
step 7.8: and scribing and packaging the device by adopting a grinding wheel scribing and gold wire ball bonding process, so as to finish the preparation of the device.
The invention provides an impurity band blocking detector with an inverted trapezoidal groove surface structure and a manufacturing method thereof, which are suitable for manufacturing a high-sensitivity terahertz impurity band blocking detector. The high-purity gallium arsenide substrate is adopted, so that the problem that the high-conductivity gallium arsenide substrate cannot realize a back irradiation working mode can be solved, and a foundation is laid for further manufacturing large-scale array devices. The common negative electrode contact layer is formed by doping through a molecular beam epitaxy process and a rapid thermal annealing process, the concentration and the growth depth of doped impurities can be accurately controlled, and good ohmic contact of the electrode is formed while absorption loss of the common negative electrode contact layer on terahertz radiation is avoided. And a reverse trapezoidal groove surface structure is formed by adopting a wet etching process, and the bottom surface of the groove surface is positioned on the common negative electrode contact layer, so that compared with a V-shaped groove structure, the contact area of the common negative electrode is increased, the contact resistance is reduced, good ohmic contact is favorably formed, and the reliability of electrical connection is improved. And a silicon nitride passivation layer is deposited on the surface of the intrinsic silicon barrier layer, the surface of the positive electrode contact area and the side surface of the inverted trapezoidal groove surface by adopting a plasma enhanced chemical vapor deposition process, so that the surface leakage current can be effectively inhibited, and the sensitivity and the stability of the device are improved.
In one embodiment, as shown in fig. 2, a method for manufacturing a blocking impurity band detector with an inverted trapezoidal groove surface structure includes the following steps:
s1, molecular beam epitaxy growth of a common negative electrode contact layer: on a high-purity gallium arsenide substrate 1, a common negative electrode contact layer 2 is grown by adopting a molecular beam epitaxy process, and is doped with silicon elements with the doping concentration of 5 multiplied by 1018cm-3The growth thickness is 150nm (see fig. 3);
s2, growing an absorption layer by chemical vapor deposition: on the common negative electrode contact layer 2, a gallium arsenide doped sulfur absorption layer 3 is epitaxially grown by adopting a metal organic compound chemical vapor deposition process, and is doped with sulfur elements with the doping concentration of 5 multiplied by 1015~2×1016cm-3The growth thickness is 30-35 mu m (see figure 4);
s3, growing a barrier layer by chemical vapor deposition: on the gallium arsenide doped sulfur absorption layer 3, continuously adopting a metal organic compound chemical vapor deposition process to epitaxially grow an intrinsic gallium arsenide barrier layer 4, wherein the growth thickness is 8-10 mu m, and no element is intentionally doped (see figure 5);
s4, first photolithography: spin coating positive photoresist AZ5214 with the thickness of 1.6 μm on the surface of the intrinsic gallium arsenide barrier layer 4, exposing and developing to form a photoetching mark area window;
s5, first plasma photoresist stripping: further removing the residual photoresist basement membrane after exposure and development by adopting an oxygen plasma photoresist removing process;
s6, etching the photoetching mark: etching a photoetching mark on the surface of the intrinsic gallium arsenide barrier layer 4 by adopting a reactive ion etching process, wherein the etching depth is 100-150 nm;
s7, second photoetching: spin coating positive glue AZ4620 with the thickness of 6.5 μm on the surface of the intrinsic gallium arsenide barrier layer 4, exposing and developing to form an ion implantation area window;
s8, second plasma photoresist removing: further removing the residual photoresist basement membrane after exposure and development by adopting an oxygen plasma photoresist removing process;
s9, positive electrode ion implantation: implanting sulfur ions into the intrinsic GaAs barrier layer 4 by ion implantation process, wherein the implanted ions are sulfur ions, the implantation energy is 50-60 keV, and the implantation dosage is 5 × 1014~8×1014cm-2The injection angle is 7 degrees;
s10, rapid thermal annealing of the positive electrode: in a nitrogen atmosphere, a rapid thermal annealing process is adopted, the temperature rising and reducing rate is 100 ℃/s, the annealing temperature is 900-960 ℃, the annealing temperature holding time is 20-25 seconds, injected ions are activated, and crystal lattice damage is repaired to form a positive electrode contact layer 5 (shown in figure 6);
s11, depositing a silicon nitride mask layer: depositing a silicon nitride mask layer 6 on the surfaces of the intrinsic gallium arsenide barrier layer 4 and the positive electrode contact layer 5 by adopting a plasma enhanced chemical vapor deposition process, wherein the deposition thickness is 220nm (see figure 7);
s12, third photolithography: spin coating positive glue AZ5214 with the thickness of 1.6 μm on the surface of the intrinsic gallium arsenide barrier layer 4, exposing and developing to form an etching opening area window;
s13, third plasma photoresist removing: further removing the residual photoresist basement membrane after exposure and development by adopting an oxygen plasma photoresist removing process;
s14, etching and opening: etching in the silicon nitride mask layer 6 by adopting a reactive ion etching process, wherein the etching depth is 220nm (see figure 8);
s15, corroding the negative electrode groove: corroding a negative electrode groove (shown in figure 9) by adopting a wet corrosion method, wherein the adopted corrosive liquid is a mixed solution of phosphoric acid with the concentration of 85%, hydrogen peroxide with the concentration of 30% and deionized water, the volume ratio of the three components is 2:1:20, and the corrosion depth is 38-45 mu m; the adopted volume ratio is hydrofluoric acid (concentration is 49%): and (3) removing the silicon nitride mask layer 6 (see fig. 10) by using a hydrofluoric acid etching solution with the deionized water ratio of 1:5, wherein the etching time is 120-150 s.
S16, depositing a silicon nitride passivation layer: depositing a silicon nitride passivation layer 7 on the side wall and the bottom of the inverted trapezoidal groove surface on the surfaces of the intrinsic gallium arsenide barrier layer 4 and the positive electrode contact layer 5 by adopting a plasma enhanced chemical vapor deposition process, wherein the deposition thickness is 200nm (see figure 11);
s17, fourth photolithography: coating positive glue AZ4620 with the thickness of 6.5 μm on the surface of the silicon nitride passivation layer 7, exposing and developing to form a positive electrode opening area window and a negative electrode opening area window;
s18, fourth plasma photoresist stripping: further removing the residual photoresist basement membrane after exposure and development by adopting an oxygen plasma photoresist removing process;
s19, etching positive and negative electrode holes: adopting a reactive ion etching method to open positive and negative electrode holes, wherein the etching depth is 200nm (see figure 12);
s20, fifth lithography: coating positive glue AZ4620 with the thickness of 6.5 μm on the surface of the whole device, exposing and developing to form positive and negative electrode evaporation area windows;
s21, fifth plasma stripping: further removing the residual photoresist basement membrane after exposure and development by adopting an argon plasma photoresist removing process;
s22, evaporation of positive and negative electrodes: evaporating a positive electrode and a negative electrode by adopting an electron beam evaporation process, and evaporating gold germanium alloy (AuGe), nickel (Ni) and gold (Au) from bottom to top in sequence, wherein the thickness of the evaporated gold germanium alloy is 50nm, the thickness of the evaporated nickel is 30nm, and the thickness of the evaporated gold is 150 nm;
s23, positive and negative electrode peeling: stripping with acetone, soaking at room temperature for 3 hours, ultrasonically cleaning for 10 minutes, ultrasonically cleaning with isopropanol for 5 minutes, flushing with deionized water, and drying with nitrogen;
s24, annealing of the positive electrode and the negative electrode: adopting an annealing process, wherein the annealing temperature is 420 ℃ and the annealing temperature is kept for 10 minutes in a nitrogen atmosphere, so that the electrode forms good ohmic contact;
s25, sixth photolithography: adopting a double-layer photoresist photoetching process, sequentially and spirally coating photoresist LOR10A and photoresist AZ4620 on the surface of the device, and exposing and developing to form windows required by thickened positive and negative electrodes;
s26, sixth plasma stripping: removing the residual photoresist basement membrane after clean exposure and development by adopting an argon plasma photoresist removing process;
s27, evaporating and thickening the positive electrode and the negative electrode: adopting an electron beam evaporation process, sequentially evaporating nickel and gold from bottom to top, wherein the thickness of the evaporated nickel is 30nm, and the thickness of the evaporated gold is 200nm, so as to thicken the positive electrode and the negative electrode and finish the preparation of the positive electrode 9 and the negative electrode 10;
s28, thickening electrode stripping: peeling off by using acetone, soaking for 3 hours at room temperature, ultrasonically cleaning for 10 minutes, ultrasonically cleaning for 5 minutes by using isopropanol, ultrasonically cleaning for 1 minute by using a 2.38% tetramethylammonium hydroxide solution, flushing by using deionized water, and drying by using nitrogen (shown in figure 1);
s29, packaging the device: and scribing and packaging the device by adopting a grinding wheel scribing and gold wire ball bonding process, so as to finish the preparation of the device.
In the description of the present application, it is to be understood that the terms "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", and the like indicate orientations or positional relationships based on those shown in the drawings, and are only for convenience in describing the present application and simplifying the description, but do not indicate or imply that the referred device or element must have a specific orientation, be constructed in a specific orientation, and be operated, and thus, should not be construed as limiting the present application.
The foregoing description of specific embodiments of the present invention has been presented. It is to be understood that the present invention is not limited to the specific embodiments described above, and that various changes or modifications may be made by one skilled in the art within the scope of the appended claims without departing from the spirit of the invention. The embodiments and features of the embodiments of the present application may be combined with each other arbitrarily without conflict.
Claims (10)
1. An impurity band blocking detector with an inverted trapezoidal groove surface structure is characterized by comprising a high-purity gallium arsenide substrate (1), a common negative electrode contact layer (2), a gallium arsenide sulfur-doped absorption layer (3), an intrinsic gallium arsenide barrier layer (4), a positive electrode contact layer (5), a silicon nitride passivation layer (7), a positive electrode (8) and a negative electrode (9);
the high-purity gallium arsenide substrate (1) is sequentially provided with a common negative electrode contact layer (2), a gallium arsenide sulfur-doped absorption layer (3), an intrinsic gallium arsenide barrier layer (4) and a silicon nitride passivation layer (7);
a positive electrode groove for accommodating the positive electrode contact layer (5) is formed in the intrinsic gallium arsenide barrier layer (4), and the positive electrode contact layer (5) is arranged in the positive electrode groove;
inverted trapezoidal negative electrode grooves are formed in the intrinsic gallium arsenide barrier layer (4) and the gallium arsenide sulfur-doped absorption layer (3), and silicon nitride passivation layers (7) are distributed on the surface of the intrinsic gallium arsenide barrier layer (4) and the side faces of the inverted trapezoidal negative electrode grooves;
the positive electrode (8) is arranged on the surface of the positive electrode contact layer (5) and extends to the surface of the silicon nitride passivation layer (7);
the negative electrode (9) is arranged on the surface of the inverted trapezoid negative electrode groove and extends to the outer plane of the inverted trapezoid negative electrode groove, and the negative electrode (9) is connected with the common negative electrode contact layer (2) through the bottom surface of the inverted trapezoid negative electrode groove.
2. A preparation method of an impurity band blocking detector with an inverted trapezoid groove surface structure is characterized by comprising the following steps:
the method comprises the following steps: preparing a common negative electrode contact layer (2) on a high-purity gallium arsenide substrate (1);
step two: depositing a gallium arsenide doped sulfur absorption layer (3) on the common negative electrode contact layer (2);
step three: depositing an intrinsic gallium arsenide barrier layer (4) on the gallium arsenide doped sulfur absorption layer (3);
step four: preparing a positive electrode groove on the intrinsic gallium arsenide barrier layer (4), and depositing a positive electrode contact layer (5) in the positive electrode groove;
step five: preparing an inverted trapezoidal negative electrode groove on the intrinsic gallium arsenide barrier layer (4) and the gallium arsenide sulfur-doped absorption layer (3);
step six: depositing a silicon nitride passivation layer (7) on the surfaces of the intrinsic gallium arsenide barrier layer (4), the positive electrode contact layer (5) and the inverted trapezoidal negative electrode groove;
step seven: and forming negative electrode openings and positive electrode openings on the bottom surface of the inverted trapezoidal negative electrode groove on the surface of the silicon nitride passivation layer (7) and the position of the positive electrode contact layer (5), depositing a negative electrode (9) and a positive electrode (8), and then packaging.
3. The method for preparing the impurity band detector with the inverted trapezoidal groove surface structure according to claim 2, wherein in the first step, a common negative electrode contact layer (2) is grown on a high-purity gallium arsenide substrate (1) by using a molecular beam epitaxy method;
in the second step, a gallium arsenide sulfur-doped absorption layer (3) is epitaxially grown on the common negative electrode contact layer (2) by adopting a chemical vapor deposition process;
and in the third step, a chemical vapor deposition process is adopted to epitaxially grow an intrinsic gallium arsenide barrier layer (4) on the gallium arsenide doped sulfur absorption layer (3).
4. The method for manufacturing a blocking impurity band detector of an inverted trapezoidal groove face structure as claimed in claim 3, wherein the common negative electrode contact layer (2) grown by the molecular beam epitaxy in the first step is doped with silicon element with a doping concentration of 5 x 1018cm-3The growth thickness is 150 nm;
in the second step, the metal organic compound chemical vapor deposition process is adopted for epitaxial growthA long GaAs doped sulfur absorption layer (3) with a sulfur doping concentration of 5 × 1015~2×1016cm-3The growth thickness is 30-35 mu m;
and in the third step, a metal organic compound chemical vapor deposition process is adopted to epitaxially grow the intrinsic gallium arsenide barrier layer (4), and the growth thickness is 8-10 mu m.
5. The method for preparing the impurity band-blocking detector with the inverted trapezoidal groove surface structure as claimed in claim 2, wherein a positive electrode groove is etched on the intrinsic gallium arsenide barrier layer (4) by using a photolithography process in the fourth step, and a positive electrode contact layer (5) is formed in the positive electrode groove by a sulfur ion implantation and rapid thermal annealing process.
6. The method for preparing an impurity band blocking detector with an inverted trapezoidal groove surface structure as claimed in claim 2, wherein the fifth step comprises the following steps:
step 5.1: depositing a silicon nitride mask layer (6) on the surface of the intrinsic gallium arsenide barrier layer (4);
step 5.2: etching a slotted area on the silicon nitride mask layer (6) by adopting a photoetching process;
step 5.3: corroding an inverted trapezoidal negative electrode groove on the intrinsic gallium arsenide barrier layer (4) and the gallium arsenide sulfur-doped absorption layer (3) layer by adopting a wet corrosion process;
step 5.4: and removing the silicon nitride mask layer (6) on the surface of the intrinsic gallium arsenide barrier layer (4).
7. The method for preparing the impurity band detector with the inverted trapezoidal groove surface structure according to claim 2, wherein a silicon nitride passivation layer (7) is deposited in the sixth step by using a plasma enhanced chemical vapor deposition process, and the deposition thickness is 200 nm.
8. The method for preparing an impurity band blocking detector with an inverted trapezoidal groove surface structure as claimed in claim 2, wherein the seventh step comprises the following steps:
step 7.1: etching negative electrode openings and positive electrode openings on the bottom surface of the inverted trapezoidal negative electrode groove on the surface of the silicon nitride passivation layer (7) and the position of the positive electrode contact layer (5) by adopting a photoetching process;
step 7.2: forming a negative electrode evaporation area and a positive electrode evaporation area on the surface of the silicon nitride passivation layer (7) through photoresist at the positions of the negative electrode opening and the positive electrode opening by adopting a photoetching process;
step 7.3: evaporating conductive metal on the surfaces of the negative electrode evaporation area, the positive electrode evaporation area and the photoresist by an electron beam evaporation process;
step 7.4: and removing the photoresist, and forming a negative electrode (9) and a positive electrode (8) in the negative electrode evaporation area and the positive electrode evaporation area respectively.
9. The method for manufacturing the impurity band blocking detector with the inverted trapezoidal groove surface structure according to claim 8, wherein in the seventh step, an annealing process is used to anneal the positive electrode (8) and the negative electrode (9).
10. The method for preparing a blocking impurity band detector of an inverted trapezoidal groove face structure as claimed in claim 8 or 9, wherein the seventh step further comprises the steps of:
step 7.5: forming a thickened negative electrode evaporation area and a thickened positive electrode evaporation area on the surface of a silicon nitride passivation layer (7) through photoresist at a negative electrode (9) and a positive electrode (8) by adopting a photoetching process, wherein the area of the thickened negative electrode evaporation area is larger than that of the negative electrode (9), and the area of the thickened positive electrode evaporation area is larger than that of the positive electrode (8);
step 7.6: evaporating conductive metal on the surfaces of the thickened negative electrode evaporation area, the thickened positive electrode evaporation area and the photoresist by an electron beam evaporation process;
step 7.7: and removing the photoresist, and respectively forming a thickened negative electrode (9) and a thickened positive electrode (8) in the thickened negative electrode evaporation area and the thickened positive electrode evaporation area.
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CN114927585B (en) * | 2022-04-14 | 2023-07-21 | 上海微波技术研究所(中国电子科技集团公司第五十研究所) | Gallium arsenide-based terahertz detector integrated with polycrystalline silicon super surface and manufacturing method |
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