CN112702833A - Prepreg spliced by regional glass fiber cloth, PCB and splicing method - Google Patents
Prepreg spliced by regional glass fiber cloth, PCB and splicing method Download PDFInfo
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- CN112702833A CN112702833A CN202011413598.9A CN202011413598A CN112702833A CN 112702833 A CN112702833 A CN 112702833A CN 202011413598 A CN202011413598 A CN 202011413598A CN 112702833 A CN112702833 A CN 112702833A
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- glass fiber
- fiber cloth
- prepreg
- speed signal
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- 239000004744 fabric Substances 0.000 title claims abstract description 118
- 239000003365 glass fiber Substances 0.000 title claims abstract description 103
- 238000000034 method Methods 0.000 title claims abstract description 21
- 238000012360 testing method Methods 0.000 claims description 26
- 238000004891 communication Methods 0.000 claims description 17
- 238000003780 insertion Methods 0.000 claims description 13
- 230000037431 insertion Effects 0.000 claims description 13
- 239000011152 fibreglass Substances 0.000 claims description 10
- 230000000630 rising effect Effects 0.000 claims description 8
- 230000008054 signal transmission Effects 0.000 claims description 6
- 239000011521 glass Substances 0.000 claims description 4
- 238000004519 manufacturing process Methods 0.000 abstract description 12
- 230000000694 effects Effects 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 230000002093 peripheral effect Effects 0.000 description 4
- 230000009977 dual effect Effects 0.000 description 2
- 239000000835 fiber Substances 0.000 description 2
- 239000005357 flat glass Substances 0.000 description 2
- 230000001360 synchronised effect Effects 0.000 description 2
- RKTYLMNFRDHKIL-UHFFFAOYSA-N copper;5,10,15,20-tetraphenylporphyrin-22,24-diide Chemical compound [Cu+2].C1=CC(C(=C2C=CC([N-]2)=C(C=2C=CC=CC=2)C=2C=CC(N=2)=C(C=2C=CC=CC=2)C2=CC=C3[N-]2)C=2C=CC=CC=2)=NC1=C3C1=CC=CC=C1 RKTYLMNFRDHKIL-UHFFFAOYSA-N 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 239000003292 glue Substances 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
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- 229920000647 polyepoxide Polymers 0.000 description 1
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Abstract
The invention provides a prepreg spliced by regional glass fiber cloth, which is positioned between a first routing layer and a second routing layer adjacent to the first routing layer, and comprises the following components: the invention also provides a PCB and a prepreg splicing method, which effectively solve the problem of high prepreg production cost caused by the prior art, effectively reduce prepreg production cost, simultaneously consider signal integrity and ensure product quality.
Description
Technical Field
The invention relates to the field of prepreg design, in particular to a prepreg, a PCB and a splicing method for splicing glass fiber cloth in different areas.
Background
The prepreg (PP) is a sheet material prepared by impregnating glass fiber cloth (glass fiber cloth) with an epoxy resin glue solution and then performing heat treatment (drying).
As shown in fig. 1, the fiberglass cloth is distinguished by Standard, Expanded, and flat. The selection of the glass fiber cloth has a great influence on the integrity of high-speed signals due to the corresponding glass fiber effect, and the low-dielectric-constant glass fiber cloth is generally selected for the high-speed PCB, for example, flat cloth (glass fiber cloth subjected to flattening treatment) is selected.
In the prior art, even if a certain routing layer has different speed distributions (part is a high-speed routing, and the other part is a low-speed routing), in order to ensure the integrity of signals and reduce the influence of a glass fiber effect, low-dielectric-constant glass fiber cloth is uniformly selected in a prepreg (PP), so that the cost of the prepreg and the like is increased.
Disclosure of Invention
In order to solve the problems in the prior art, the invention innovatively provides the prepreg, the PCB and the splicing method for splicing the glass fiber cloth in different areas, effectively solves the problem of high production cost of the prepreg caused by the prior art, effectively reduces the production cost of the prepreg, simultaneously considers the integrity of signals and ensures the quality of products.
The invention provides a prepreg spliced by regional glass fiber cloth, which is positioned between a first routing layer and a second routing layer adjacent to the first routing layer, and comprises the following components: the high-speed signal line is a high-speed signal line path which is in communication connection with the second routing layer through a via hole in the first routing layer, the low-speed signal line is a low-speed signal line path which is in communication connection with the second routing layer through a via hole in the first routing layer, and the first glass fiber cloth is larger than the second glass fiber cloth in cost.
Optionally, the high-speed signal is a signal whose rise time is not greater than a first threshold, and the low-speed signal is a signal whose rise time is greater than the first threshold.
Optionally, the first threshold is a signal transmission delay of a first multiple.
Optionally, the first glass fiber cloth is a glass fiber cloth subjected to flattening treatment, and the second glass fiber cloth is a glass fiber cloth not subjected to flattening treatment.
The invention provides a PCB board, which comprises a plurality of prepregs spliced by the fiberglass cloth with the areas according to the first aspect of the invention.
Optionally, the prepreg between adjacent routing layers is the prepreg spliced by the glass fiber cloth in the sub-area.
The third aspect of the present invention provides a method for splicing prepregs by using a glass fiber fabric in a subarea, wherein the method is located between a first routing layer and a second routing layer adjacent to the first routing layer, and comprises:
dividing the first routing layer into a high-speed signal line and a low-speed signal line according to the signal rising time;
in the prepreg layer, a first glass fiber cloth is arranged in an area where the high-speed signal wire passes, a second glass fiber cloth is arranged in an area where the low-speed signal wire passes, wherein the high-speed signal wire is a high-speed signal wiring path in the first wiring layer and in communication connection with the second wiring layer through a via hole, the low-speed signal wire is a low-speed signal wiring path in the first wiring layer and in communication connection with the second wiring layer through a via hole, and the cost of the first glass fiber cloth is greater than that of the second glass fiber cloth.
Optionally, the method further comprises: and respectively carrying out signal impedance test and insertion loss test on the set prepreg, and if any test fails, adjusting the settings of the first glass fiber cloth and the second glass fiber cloth in the prepreg.
Further, adjusting the settings of the first glass fiber cloth and the second glass fiber cloth in the prepreg specifically comprises: if the test impedance is smaller than the minimum value of the preset impedance range, the thickness of the first glass fiber cloth or the second glass fiber cloth is increased; and if the test impedance is larger than the maximum value of the preset impedance range, reducing the thickness of the first glass fiber cloth or the second glass fiber cloth.
Optionally, the adjusting of the settings of the first glass fiber cloth and the second glass fiber cloth of the prepreg specifically includes: and if the test insertion loss is larger than the insertion loss preset value, reducing the thickness of the first glass fiber cloth or the second glass fiber cloth.
The technical scheme adopted by the invention comprises the following technical effects:
1. the invention effectively solves the problem of high production cost of the prepreg in the prior art, effectively reduces the production cost of the prepreg, simultaneously considers the integrity of signals and ensures the quality of products.
2. According to the technical scheme, the prepreg between the adjacent routing layers in the PCB is the prepreg spliced by the glass fiber cloth in the subareas, so that the production cost of the PCB is effectively reduced, the integrity of signals is considered, and the quality of products is ensured.
3. According to the technical scheme, the signal impedance test and the insertion loss test are respectively carried out on the set prepreg, and if any test fails, the setting of the first glass fiber cloth and the second glass fiber cloth in the prepreg is adjusted, so that the signal transmission effect is ensured.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention, as claimed.
Drawings
In order to more clearly illustrate the embodiments or technical solutions in the prior art of the present invention, the drawings used in the description of the embodiments or prior art will be briefly described below, and it is obvious for those skilled in the art that other drawings can be obtained based on these drawings without any creative effort.
FIG. 1 is a schematic diagram of a classification of a conventional glass fiber cloth;
FIG. 2 is a schematic structural diagram of a first embodiment of the present invention;
FIG. 3 is a schematic flow diagram of a third embodiment of a method according to aspects of the present invention;
fig. 4 is a schematic flow diagram of an embodiment of the tetragonal method in accordance with the present invention.
Detailed Description
In order to clearly explain the technical features of the present invention, the following detailed description of the present invention is provided with reference to the accompanying drawings. The following disclosure provides many different embodiments, or examples, for implementing different features of the invention. To simplify the disclosure of the present invention, the components and arrangements of specific examples are described below. Furthermore, the present invention may repeat reference numerals and/or letters in the various examples. This repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed. It should be noted that the components illustrated in the figures are not necessarily drawn to scale. Descriptions of well-known components and processing techniques and procedures are omitted so as to not unnecessarily limit the invention.
Example one
As shown in fig. 2, the prepreg for split-zone fiberglass cloth splicing, located between a first routing layer L1 and a second routing layer L2 adjacent to the first routing layer L1, includes: first glass fiber cloth 1 and second glass fiber cloth 2, first glass fiber cloth 1 is located the region that the high-speed signal line passes through in prepreg (PP), second glass fiber cloth 2 is located the region that the low-speed signal line passes through in the prepreg, wherein, the high-speed signal line is that the high-speed signal who passes through via hole and second routing layer L2 communication connection in first routing layer L1 walks the route, the low-speed signal line is that the low-speed signal who passes through via hole and second routing layer L2 communication connection in first routing layer L1 walks the route, first glass fiber cloth 1 cost is greater than second glass fiber cloth 2.
The high-speed signal is a signal whose rising time is not greater than a first threshold, and the low-speed signal is a signal whose rising time is greater than the first threshold, specifically, the first threshold is a signal transmission delay of a first multiple, and the first multiple may be 6. The High-speed signal may be a High-speed differential signal, such as PCIe (Peripheral component interconnect express), USB (Universal Serial Bus), HDMI (High Definition Multimedia Interface), DP (display port, digital video Interface standard), and a routing signal from a BGA (ball grid array package) area to a dimm (Small external Dual In-line Memory Module), and the low-speed signal may be a signal such as UART (Universal Asynchronous Receiver/Transmitter), SPI (Serial Peripheral Interface), I2C (Inter-Integrated Circuit, synchronous Serial Bus In two-ways), and the like.
The first glass fiber cloth 1 is a glass fiber cloth (flat glass fiber cloth) which is subjected to flattening treatment, namely a low dielectric constant glass fiber cloth; the second glass cloth 2 is a glass cloth that has not been subjected to flattening treatment, such as a standard glass cloth.
The invention effectively solves the problem of high production cost of the prepreg in the prior art, effectively reduces the production cost of the prepreg, simultaneously considers the integrity of signals and ensures the quality of products.
Example two
The technical scheme of the invention also provides a PCB which comprises a plurality of prepregs spliced by the glass fiber cloth with the areas according to the first embodiment.
And prepregs between adjacent routing layers which are in communication connection with each other are prepregs spliced by glass fiber cloth in areas.
Particularly, if the first routing layer is in communication connection with the second routing layer, and the first routing layer and the second routing layer cross over a plurality of routing layers, the high-speed signal line of the first routing layer is in communication connection with the second routing layer through a plurality of prepregs, and the prepregs preferentially select the first glass fiber cloth.
According to the technical scheme, the prepreg between the adjacent routing layers in the PCB is the prepreg spliced by the glass fiber cloth in the subareas, so that the production cost of the PCB is effectively reduced, the integrity of signals is considered, and the quality of products is ensured.
EXAMPLE III
As shown in fig. 3, the technical solution of the present invention further provides a method for splicing prepregs by using a glass fiber fabric in a partitioned manner, where the method is located between a first routing layer and a second routing layer adjacent to the first routing layer, and includes:
s1, dividing the first routing layer into a high-speed signal line and a low-speed signal line according to the signal rising time;
and S2, in the prepreg layer, a first glass fiber cloth is arranged in an area where the high-speed signal line passes, and a second glass fiber cloth is arranged in an area where the low-speed signal line passes, wherein the high-speed signal line is a high-speed signal routing path in the first routing layer and in communication connection with the second routing layer through a via hole, the low-speed signal line is a low-speed signal routing path in the first routing layer and in communication connection with the second routing layer through a via hole, and the cost of the first glass fiber cloth is greater than that of the second glass fiber cloth.
In step S1, the high speed signal is a signal whose rising time is not greater than a first threshold, and the low speed signal is a signal whose rising time is greater than the first threshold, specifically, the first threshold is a signal transmission delay of a first multiple, where the first multiple may be 6. The High-speed signal may be a High-speed differential signal, such as PCIe (Peripheral component interconnect express), USB (Universal Serial Bus), HDMI (High Definition Multimedia Interface), DP (display port, digital video Interface standard), and a routing signal from a BGA (ball grid array package) area to a dimm (Small external Dual In-line Memory Module), and the low-speed signal may be a signal such as UART (Universal Asynchronous Receiver/Transmitter), SPI (Serial Peripheral Interface), I2C (Inter-Integrated Circuit, synchronous Serial Bus In two-ways), and the like.
In step S2, the first glass fiber cloth is a glass fiber cloth (flat glass fiber cloth) that is subjected to a flattening process, that is, a low dielectric constant glass fiber cloth; the second glass fiber cloth is glass fiber cloth which is not subjected to flattening treatment, such as standard glass fiber cloth.
The invention effectively solves the problem of high production cost of the prepreg in the prior art, effectively reduces the production cost of the prepreg, simultaneously considers the integrity of signals and ensures the quality of products.
Example four
As shown in fig. 4, the technical solution of the present invention further provides a method for splicing prepregs by using a glass fiber fabric in a partitioned manner, where the method is located between a first routing layer and a second routing layer adjacent to the first routing layer, and includes:
s1, dividing the first routing layer into a high-speed signal line and a low-speed signal line according to the signal rising time;
s2, arranging a first glass fiber cloth in an area where a high-speed signal wire passes through and a second glass fiber cloth in an area where a low-speed signal wire passes through in a prepreg layer, wherein the high-speed signal wire is a high-speed signal routing path in the first routing layer and is in communication connection with the second routing layer through a via hole, the low-speed signal wire is a low-speed signal routing path in the first routing layer and is in communication connection with the second routing layer through a via hole, and the cost of the first glass fiber cloth is higher than that of the second glass fiber cloth;
and S3, respectively carrying out signal impedance test and insertion loss test on the set prepreg, and if any test fails, adjusting the settings of the first glass fiber cloth and the second glass fiber cloth in the prepreg.
Further, adjusting the settings of the first glass fiber cloth and the second glass fiber cloth in the prepreg specifically comprises: if the test impedance is smaller than the minimum value of the preset impedance range, the thickness of the first glass fiber cloth or the second glass fiber cloth is increased; and if the test impedance is larger than the maximum value of the preset impedance range, reducing the thickness of the first glass fiber cloth or the second glass fiber cloth. The preset range of impedance may be a range formed by a certain standard value Z and 10% fluctuation above and below birth, i.e., [ Z (1-10%), Z (1+ 10%) ], for example, if the standard value Z is 85 Ω, the preset range of impedance is [76.5, 93.5], the minimum value of the preset range of impedance is 76.5, and the maximum value of the preset range of impedance is 93.5, so that the test impedance meets the preset range of impedance.
Further, adjusting the settings of the first glass fiber cloth and the second glass fiber cloth in the prepreg specifically comprises: and if the test insertion loss is larger than the insertion loss preset value, reducing the thickness of the first glass fiber cloth or the second glass fiber cloth to enable the test insertion loss to be smaller than the insertion loss preset value.
According to the technical scheme, the signal impedance test and the insertion loss test are respectively carried out on the set prepreg, and if any test fails, the setting of the first glass fiber cloth and the second glass fiber cloth in the prepreg is adjusted, so that the signal transmission effect is ensured.
Although the embodiments of the present invention have been described with reference to the accompanying drawings, it is not intended to limit the scope of the present invention, and it should be understood by those skilled in the art that various modifications and variations can be made without inventive efforts by those skilled in the art based on the technical solution of the present invention.
Claims (10)
1. The utility model provides a prepreg of regional fine cloth concatenation of glass, is located between first routing layer and the second routing layer adjacent with first routing layer, characterized by includes: the high-speed signal line is a high-speed signal line path which is in communication connection with the second routing layer through a via hole in the first routing layer, the low-speed signal line is a low-speed signal line path which is in communication connection with the second routing layer through a via hole in the first routing layer, and the first glass fiber cloth is larger than the second glass fiber cloth in cost.
2. The prepreg according to claim 1, wherein the high-speed signal is a signal with a rise time not greater than a first threshold, and the low-speed signal is a signal with a rise time greater than the first threshold.
3. The prepreg according to claim 1, wherein the first threshold is a first multiple of signal transmission delay.
4. The prepreg according to any one of claims 1 to 3, wherein the first fiberglass cloth is a flat fiberglass cloth, and the second fiberglass cloth is a non-flat fiberglass cloth.
5. A PCB board comprising a plurality of prepregs assembled from the zoned fiberglass cloth of any of claims 1 to 4.
6. The PCB of claim 5, wherein the prepreg between adjacent routing layers is a prepreg spliced by the zoned fiberglass cloth.
7. The method for splicing prepregs by using the partitioned fiberglass cloth is positioned between a first routing layer and a second routing layer adjacent to the first routing layer, and is characterized by comprising the following steps of:
dividing the first routing layer into a high-speed signal line and a low-speed signal line according to the signal rising time;
in the prepreg layer, a first glass fiber cloth is arranged in an area where the high-speed signal wire passes, a second glass fiber cloth is arranged in an area where the low-speed signal wire passes, wherein the high-speed signal wire is a high-speed signal wiring path in the first wiring layer and in communication connection with the second wiring layer through a via hole, the low-speed signal wire is a low-speed signal wiring path in the first wiring layer and in communication connection with the second wiring layer through a via hole, and the cost of the first glass fiber cloth is greater than that of the second glass fiber cloth.
8. The method for splicing the prepregs according to claim 7, further comprising: and respectively carrying out signal impedance test and insertion loss test on the set prepreg, and if any test fails, adjusting the settings of the first glass fiber cloth and the second glass fiber cloth in the prepreg.
9. The method for splicing the prepreg according to claim 8, wherein the adjusting of the arrangement of the first glass fiber cloth and the second glass fiber cloth in the prepreg specifically comprises: if the test impedance is smaller than the minimum value of the preset impedance range, the thickness of the first glass fiber cloth or the second glass fiber cloth is increased; and if the test impedance is larger than the maximum value of the preset impedance range, reducing the thickness of the first glass fiber cloth or the second glass fiber cloth.
10. The method for splicing the prepreg according to claim 8, wherein the adjusting of the arrangement of the first glass fiber cloth and the second glass fiber cloth in the prepreg specifically comprises: and if the test insertion loss is larger than the insertion loss preset value, reducing the thickness of the first glass fiber cloth or the second glass fiber cloth.
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CN202011413598.9A CN112702833A (en) | 2020-12-03 | 2020-12-03 | Prepreg spliced by regional glass fiber cloth, PCB and splicing method |
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CN202011413598.9A CN112702833A (en) | 2020-12-03 | 2020-12-03 | Prepreg spliced by regional glass fiber cloth, PCB and splicing method |
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Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103237418A (en) * | 2013-05-15 | 2013-08-07 | 广州兴森快捷电路科技有限公司 | Judging method for warping of PCB (Printed Circuit Board) |
US20140020941A1 (en) * | 2012-07-20 | 2014-01-23 | Nec Corporation | Printed circuit board and electronic device comprising the same |
CN103841749A (en) * | 2012-11-23 | 2014-06-04 | 鸿富锦精密工业(深圳)有限公司 | Circuit board |
CN111698832A (en) * | 2020-06-12 | 2020-09-22 | 广东浪潮大数据研究有限公司 | Signal transmission method, device and medium for high-speed differential signal line of circuit board |
-
2020
- 2020-12-03 CN CN202011413598.9A patent/CN112702833A/en active Pending
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20140020941A1 (en) * | 2012-07-20 | 2014-01-23 | Nec Corporation | Printed circuit board and electronic device comprising the same |
CN103841749A (en) * | 2012-11-23 | 2014-06-04 | 鸿富锦精密工业(深圳)有限公司 | Circuit board |
CN103237418A (en) * | 2013-05-15 | 2013-08-07 | 广州兴森快捷电路科技有限公司 | Judging method for warping of PCB (Printed Circuit Board) |
CN111698832A (en) * | 2020-06-12 | 2020-09-22 | 广东浪潮大数据研究有限公司 | Signal transmission method, device and medium for high-speed differential signal line of circuit board |
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Application publication date: 20210423 |