CN103841749A

CN103841749A - Circuit board

Info

Publication number: CN103841749A
Application number: CN201210480721.8A
Authority: CN
Inventors: 吴开文
Original assignee: Hongfujin Precision Industry Shenzhen Co Ltd; Hon Hai Precision Industry Co Ltd
Current assignee: Hongfujin Precision Industry Shenzhen Co Ltd; Hon Hai Precision Industry Co Ltd
Priority date: 2012-11-23
Filing date: 2012-11-23
Publication date: 2014-06-04

Abstract

Disclosed is a circuit board which includes a signal routing layer and a dielectric layer used for fixing the signal routing layer. The signal routing layer includes a signal wire, and a chip circuit and a connector circuit, which are connected with the signal wire. The dielectric layer includes a signal wire area for arranging the signal wire, a chip circuit area for arranging the chip circuit and a connector circuit area for arranging the connector circuit. The dielectric coefficient of the signal wire area is smaller than the dielectric coefficient of the chip circuit area and larger than the dielectric coefficient of the connector circuit area.

Description

Circuit board

Technical field

The present invention relates to a kind of circuit board.

Background technology

Among the Light Peak system specification, estimate to reach to I haven't seen you for ages the speed of single channel 10Gb/s, in the transmission system of high frequency like this, impedance matching is with regard to aobvious particular importance, if impedance mismatch, can produce very large energy loss, increase the error rate, even can produce the problem of EMI, therefore designing impedance matching is considerable in radio frequency system.

Light Peak system is through opto-electronic conversion, the signal of telecommunication to be changed into light signal to grow Distance Transmission again, but the unavoidable cabling that still has the signal of telecommunication, conventionally, while designing HF link, all characteristic impedance can be designed to single-ended 50 ohm, or differential 100 ohm.

As shown in Figure 1, in general single-ended transmission line design, have IC position 1, centre position 2 and connector position 3, centre position 2 is used for connecting IC position 1 and connector position 3.In IC position 1, due to circuit comparatively dense, therefore circuit can be designed to thinner circuit, and centre position 2 will be designed to impedance matching, and connector position 3, in order to be coupled with connector plugging, therefore can design thicker circuit.Thinner circuit has higher impedance, and thicker circuit has lower impedance, so can cause impedance mismatch, reduces transmission quality.

Summary of the invention

In view of this, be necessary to provide a kind of impedance matching to promote the circuit board of transmission quality.

A kind of circuit board, comprise signal lead layer and the dielectric layer for fixing described signal lead layer, described signal lead layer comprises holding wire and the chip circuit and the connector circuit that are connected with described holding wire, described dielectric layer comprise arrange described holding wire holding wire region, the chip circuit region of described chip circuit is set and the connector circuit region of described connector circuit is set, the dielectric coefficient in described holding wire region is less than the dielectric coefficient in described chip circuit region and is greater than the dielectric coefficient in described connector circuit region.

Compared to prior art, the dielectric layer of the circuit board of the present embodiment adopts respectively the material of high dielectric coefficient and the material of little dielectric coefficient for chip circuit region and connector circuit region, thereby make the impedance reduction in chip circuit region and the impedance in connector circuit region increases, make the impedance matching of signal lead layer, promote transmission quality.

Brief description of the drawings

Fig. 1 is the schematic diagram of signal transmission line.

Fig. 2 is the schematic cross-section of embodiment of the present invention circuit board.

Main element symbol description

Circuit board	10
		Signal lead layer	11
Holding wire	111
		Chip circuit	112
Connector circuit	113
		Dielectric layer	12
Holding wire region	121
		Chip circuit region	122
Connector circuit region	123
		Ground plane	13

Following embodiment further illustrates the present invention in connection with above-mentioned accompanying drawing.

Embodiment

Refer to Fig. 2, the circuit board 10 that the embodiment of the present invention provides comprises signal lead layer 11, dielectric layer 12 and ground plane 13.

In practical application, circuit board 10 is multilayer circuit board, according to actual needs, can be 4 layers, 6 layers or more.For easy, the signal lead layer 11 relevant with the present embodiment, dielectric layer 12 and ground plane 13 in Fig. 1, are only provided.

Signal lead layer 11 lays respectively on two relative surfaces of dielectric layer 12 with ground plane 13.

Signal lead layer 11 is laid and layout cabling for electronic devices and components, comprises holding wire 111, chip circuit 112 and connector circuit 113, and holding wire 111 is used for connecting chip circuit 112 and connector circuit 113.

Holding wire 111 is single strip line, its width is not to be all consistent in whole length, the width of holding wire 111 and chip circuit 112 junctions is less than the width with connector circuit 113 junctions, thereby makes holding wire 111 be greater than holding wire 111 in the impedance at connector circuit 113 places in the impedance at chip circuit 112 places.

Dielectric layer 12 is for fixed signal routing layer 11 the conductive layer isolation with circuit board 10 by signal lead layer 11.Dielectric layer 12 is made with insulating material, and in practice, the general glass fibre hybrid resin that adopts is made.

Dielectric layer 12 comprises holding wire region 121, chip circuit region 122 and connector circuit region 123, holding wire region 121 is used for fixing holding wire 111, chip circuit region 122 is used for arranging chip circuit 112, connector circuit region 123 is used for arranging connector circuit 113, thereby the minimum impedance that makes holding wire 111 herein of the dielectric coefficient in connector circuit region 123 increases, thereby and the dielectric coefficient in chip circuit region 122 maximum make the impedance of holding wire 111 herein reduce, in other words, the dielectric coefficient in holding wire region 121 is less than the dielectric coefficient in chip circuit region 122 and is greater than the dielectric coefficient in connector circuit region 123.

Increase dielectric layer 12 and can adopt different ways in the dielectric coefficient in chip circuit region 122, for example, in the time that dielectric layer 12 adopts glass fibre hybrid resin to make, because the dielectric coefficient of resin is less than the dielectric coefficient of glass fibre, can in the time making dielectric layer 12, increase in the shared ratio of chip circuit region 122 glass fibres, or, can add the material that dielectric coefficient is large, for example ceramic powders to chip circuit region 122.

Because the dielectric coefficient in the chip circuit region 122 of circuit board 10 is large, higher impedance can be reduced; And the dielectric coefficient in connector circuit region 123 is little, can increase impedance herein, thereby make the impedance of whole signal lead layer 11 consistent, promote high-frequency transmission quality.

Be understandable that, those skilled in the art also can do other and change in spirit of the present invention, as long as it does not depart from technique effect of the present invention and all can.The variation that these do according to spirit of the present invention, within all should being included in the present invention's scope required for protection.

Claims

1. a circuit board, comprise signal lead layer and the dielectric layer for fixing described signal lead layer, described signal lead layer comprises holding wire and the chip circuit and the connector circuit that are connected with described holding wire, described dielectric layer comprise arrange described holding wire holding wire region, the chip circuit region of described chip circuit is set and the connector circuit region of described connector circuit is set, its improvement is, the dielectric coefficient in described holding wire region is less than the dielectric coefficient in described chip circuit region and is greater than the dielectric coefficient in described connector circuit region.

2. circuit board as claimed in claim 1, is characterized in that, the width of described holding wire and described chip junction is less than the width of described holding wire and described connector junction.

3. circuit board as claimed in claim 1, is characterized in that, described dielectric layer is mainly made up of glass fibre and resin.

4. circuit board as claimed in claim 3, is characterized in that, the ratio of the glass fibre in described chip circuit region is greater than the ratio of the glass fibre in described connector circuit region.

5. circuit board as claimed in claim 3, is characterized in that, described chip circuit region comprises ceramic powders.

6. the circuit board as described in claim 1-5 any one, is characterized in that, described circuit board further wraps ground plane, and described ground plane is fixed on described dielectric layer and arranges the opposite face of described signal lead layer.