CN112690816A - CT detector framework, information processing method thereof and CT scanner - Google Patents

Abstract

The invention particularly relates to a CT detector framework which comprises a data acquisition circuit board, a data control board and a plurality of detector modules, wherein the data acquisition circuit board is provided with an MCU (microprogrammed control Unit) and an FPGA (field programmable gate array), the MCU is in communication connection with the FPGA, and the FPGA is in communication connection with the data control board and all the detector modules; the FPGA is in communication connection with a data acquisition card of a reconstruction computer through a slip ring; the FPGA is provided with read-write registers corresponding to the detector modules one to one, the MCU controls the states of the read-write registers on the FPGA, and the FPGA communicates with the corresponding detector modules according to the states of the read-write registers. The invention realizes the separation of data acquisition and information processing, namely, the FPGA performs data acquisition and the MCU performs information processing; the powerful operational capability of the MCU is used for command analysis, logic operation, state monitoring and low power consumption, the powerful digital signal processing capability of the FPGA is used for data acquisition, and the data acquisition and information processing efficiency is higher.

Description

CT detector framework, information processing method thereof and CT scanner

Technical Field

The invention belongs to the technical field of CT, and particularly relates to a CT detector framework, an information processing method thereof and a CT scanner.

Background

The CT scanner detects X-rays passing through the human body by a CT detector and converts the received optical signals into electrical signals. The CT detector is one of core components of a CT scanner, is mainly used for collecting data information of X-rays after the X-rays penetrate through human tissues and provides a basis for reconstructing CT images of the human tissues.

When the CT detector works, the acquired image data needs to be quickly transmitted, and the real-time requirement of the image data is high, the frequency is also high, and the instantaneous data volume is large, so that the image data needs to be acquired at high speed and high precision and transmitted at high speed. Meanwhile, the CT detector also needs to monitor the state of the CT detector in time, and change the acquisition parameters and the working mode of data in real time according to a command sent by an upper computer of the system, so as to realize information processing.

The conventional CT detector mainly comprises an FPGA and a plurality of detector Modules (MOD), wherein the detector Modules (MOD) convert optical signals into electric signals, realize data acquisition and information processing through the FPGA, transmit acquired data information to a data control panel (DCB), and finally transmit the data information to a data acquisition panel (ACQ) of a reconstruction computer through the data control panel. Based on this, the FPGA in the prior art needs to perform data acquisition and perform information processing. For data acquisition, FPGAs have natural advantages, but for state control, logic operations, and low power consumption, FPGAs have difficulty in achieving efficient processing.

Disclosure of Invention

Based on the above-mentioned shortcomings and drawbacks of the prior art, it is an object of the present invention to at least solve one or more of the above-mentioned problems of the prior art, in other words, to provide a CT detector frame, an information processing method thereof, and a CT scanner, which satisfy one or more of the above-mentioned needs.

In order to achieve the purpose, the invention adopts the following technical scheme:

a CT detector framework comprises a data acquisition circuit board, a data control board and a plurality of detector modules, wherein the data acquisition circuit board is provided with an MCU and an FPGA, the MCU is in communication connection with the FPGA, and the FPGA is in communication connection with the data control board and all the detector modules; the FPGA is in communication connection with a data acquisition card of a reconstruction computer through a slip ring; the FPGA is provided with read-write registers corresponding to the detector modules one to one, the MCU controls the states of the read-write registers on the FPGA, and the FPGA communicates with the corresponding detector modules according to the states of the read-write registers.

Preferably, the read-write register comprises a TX-DATA registering module, a TX-CTRL state registering module, an RX-CTRL state registering module and an RX-DATA registering module;

when the MCU sends a message, the DATA is sent to the TX-DATA register module, and then the TX-CTRL state register module is controlled to realize DATA sending;

when the MCU receives the message, the MCU controls the state of the RX-CTRL state register module and then reads the DATA of the RX-DATA register module.

As a preferred scheme, UART protocol communication is adopted between the FPGA and each detector module.

As a preferred scheme, the MCU is in communication connection with the stator control board.

As a preferred scheme, CAN communication is adopted between the MCU and the stator control board.

As a preferred scheme, the MCU and the FPGA adopt SPI communication.

The invention also provides an information processing method of the CT detector framework, which comprises the following steps:

s1, the FPGA converts the Trigger signal sent by the data control panel into a Trigger signal which can be identified by the detector module, and sends the Trigger signal to each detector module by combining with a parameter configuration signal sent by the MCU;

s2, the detector module outputs detection data, and the detection data comprises data information and a synchronous clock;

and S3, the FPGA receives the detection data of each detector module, and the detection data is packaged and transmitted to a data acquisition card of the reconstruction computer through a slip ring.

As the preferred scheme, when the MCU and the stator control panel adopt CAN communication;

and after the MCU receives the CAN information of the stator control board, the CAN is interrupted to generate a binary semaphore to activate a corresponding task, and the corresponding CAN information is replied to the stator control board through a message queue after the task is processed.

The invention also provides a CT scanner, which comprises the CT detector framework or adopts the information processing method.

Compared with the prior art, the invention has the beneficial effects that:

the CT detector framework and the information processing method thereof realize the separation of data acquisition and information processing, namely, the FPGA performs data acquisition and the MCU performs information processing; the powerful operational capability of the MCU is utilized for command analysis, logic operation and state monitoring; data acquisition is carried out by utilizing the powerful digital signal processing capacity of the FPGA; the labor division is clear, the data acquisition and information processing efficiency is higher, the power consumption is lower, and the cost is lower.

Drawings

FIG. 1 is a schematic frame diagram of a CT detector architecture according to an embodiment of the present invention;

FIG. 2 is a detailed block diagram of a CT detector architecture according to an embodiment of the present invention;

FIG. 3 is an interaction diagram of the MCU, the FPGA and the MOD of the CT detector framework according to the embodiment of the invention.

Detailed Description

In order to more clearly illustrate the embodiments of the present invention, the following description will explain the embodiments of the present invention with reference to the accompanying drawings. It is obvious that the drawings in the following description are only some examples of the invention, and that for a person skilled in the art, other drawings and embodiments can be derived from them without inventive effort.

As shown in fig. 1, the CT detector framework of the present embodiment includes a data acquisition circuit board (VPB) and 29 detector Modules (MOD), that is, MOD1, MOD2, MOD3, MOD …, and MOD29, where the number of MOD is not limited to the example 29, and can be freely set according to actual requirements.

The MOD is used for converting an optical signal of the X-ray into an electric signal, and the VPB realizes data packing and sends the data to a data acquisition card (ACQ for short) of a reconstruction computer.

The communication mode between the VPB and each MOD is the same, and the communication contents comprise:

1. data 0: transmitting the A/D converted digital data to the VPB;

2. data 1: the standby data line is used for starting when the transmission is required to be told;

3. synchronizing the clock: for data synchronization;

4. trigger: a trigger signal sent to the MOD;

5. UART-TX: a sending signal of serial port communication between the VPB and the MOD;

6. UART-RX: receiving signals of serial port communication between the VPB and the MOD;

specifically, the VPB internal framework is shown in fig. 2, and n is an integer from 3 to 29:

two main logic chips inside the VPB, namely an MCU (microprogrammed control unit) and an FPGA (field programmable gate array);

the MCU is a main control unit of the detector and is used for receiving commands of a stator control panel (SCB for short) and controlling VPBs and 29 MODs, the VPBs and the MODs are configured remotely, and CAN communication is adopted between the MCU and the SCB.

The FPGA is mainly used for receiving MOD data, arranging and packaging the MOD data, and outputting the MOD data to the slip ring so as to transmit the MOD data to the ACQ of the reconstruction computer; the system is also used for receiving system information of a data control board (DCB for short), receiving Trigger signals of the DCB and converting the signals into Trigger signals which can be identified by MOD.

Another important function of the FPGA is as a communication bridge between the MCU and the MOD, because of the limitation of the interface, the MCU cannot directly communicate with the MOD, and can only transfer through the FPGA, the MCU and the FPGA communicate with each other through the SPI, the read-write register of each MOD is mapped inside the FPGA, the MCU respectively operates the read-write register on the FPGA through the SPI, then the FPGA communicates with the MOD through the UART according to the state of the read-write register, the UART communication between the FPGA and the MOD uses the UART protocol, the communication rate is greatly increased, and thus the communication efficiency of the system is improved.

As shown in fig. 3, the read/write registers inside the FPGA include a TX-DATA register module (TX DATA for short), a TX-CTRL state register module (TX CTRL for short), an RX-CTRL state register module (RX CTRL for short), and an RX-DATA register module (RX DATA for short);

specifically, when the MCU transmits a message, message DATA is transmitted to TX DATA, and then the state of TX CTRL is controlled to implement DATA transmission;

similarly, when the MCU receives a message, it need only control the state of RX CTRL and then directly read the DATA in RX DATA.

Correspondingly, the information processing method of the CT detector framework of the embodiment of the invention comprises the following steps:

s1, the FPGA converts the Trigger signal sent by the data control panel DCB into a Trigger signal which can be identified by the detector module, and sends the Trigger signal to each detector module by combining with a parameter configuration signal sent by the MCU; wherein, the parameter configuration signal sent by the MCU is sent according to the command of the stator control board SCB;

s2, the detector module outputs detection data, and the detection data comprises data information and a synchronous clock;

and S3, the FPGA receives the detection data of each detector module MOD, and the detection data are packaged and transmitted to a data acquisition card ACQ of the reconstruction computer through a slip ring.

In addition, when the MCU is communicated with the stator control board SCB by adopting the CAN;

after receiving CAN information of the stator control board, the MCU generates a binary semaphore through CAN interruption to activate a corresponding task, and after the task is processed, the MCU returns the corresponding CAN information to the stator control board through a message queue; the loss of tasks issued by the stator control board can be prevented.

The embodiment of the invention also provides a CT scanner which comprises the CT detector framework and adopts the information processing method.

For data acquisition, the FPGA has natural advantages, and for state control, logic operation, command analysis, state monitoring and low power consumption, the MCU has more advantages, so that the CT detector framework constructed by the MCU and the FPGA has more advantages in working efficiency.

The foregoing has outlined rather broadly the preferred embodiments and principles of the present invention and it will be appreciated that those skilled in the art may devise variations of the present invention that are within the spirit and scope of the appended claims.

Claims (9)

1. A CT detector framework is characterized by comprising a data acquisition circuit board, a data control board and a plurality of detector modules, wherein the data acquisition circuit board is provided with an MCU and an FPGA, the MCU is in communication connection with the FPGA, and the FPGA is in communication connection with the data control board and all the detector modules; the FPGA is in communication connection with a data acquisition card of a reconstruction computer through a slip ring; the FPGA is provided with read-write registers corresponding to the detector modules one to one, the MCU controls the states of the read-write registers on the FPGA, and the FPGA communicates with the corresponding detector modules according to the states of the read-write registers.

2. The CT detector architecture of claim 1, wherein the read-write registers include a TX-DATA register module, a TX-CTRL status register module, an RX-CTRL status register module, and an RX-DATA register module;

when the MCU sends a message, the DATA is sent to the TX-DATA register module, and then the TX-CTRL state register module is controlled to realize DATA sending;

when the MCU receives the message, the MCU controls the state of the RX-CTRL state register module and then reads the DATA of the RX-DATA register module.

3. The CT detector architecture of claim 1, wherein the FPGA communicates with the detector modules using a UART protocol.

4. The CT detector frame of claim 1, wherein the MCU is communicatively coupled to the stator control board.

5. The CT detector frame of claim 4, wherein the MCU communicates with the stator control board using CAN.

6. The CT detector framework of claim 1, wherein the MCU and the FPGA communicate with each other via SPI.

7. An information processing method for a CT detector gantry as claimed in any of the claims 1 to 6, characterized in that it comprises the following steps:

s1, the FPGA converts the Trigger signal sent by the data control panel into a Trigger signal which can be identified by the detector module, and sends the Trigger signal to each detector module by combining with a parameter configuration signal sent by the MCU;

s2, the detector module outputs detection data, and the detection data comprises data information and a synchronous clock;

and S3, the FPGA receives the detection data of each detector module, and the detection data is packaged and transmitted to a data acquisition card of the reconstruction computer through a slip ring.

8. The information processing method according to claim 7, wherein when the MCU communicates with the stator control board using CAN communication;

and after the MCU receives the CAN information of the stator control board, the CAN is interrupted to generate a binary semaphore to activate a corresponding task, and the corresponding CAN information is replied to the stator control board through a message queue after the task is processed.

9. A CT scanner comprising a CT detector framework according to any of claims 1 to 6 or employing an information processing method according to claim 7 or 8.

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