CN112687722A - Display back plate, preparation method thereof and display panel - Google Patents
Display back plate, preparation method thereof and display panel Download PDFInfo
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- CN112687722A CN112687722A CN202011548943.XA CN202011548943A CN112687722A CN 112687722 A CN112687722 A CN 112687722A CN 202011548943 A CN202011548943 A CN 202011548943A CN 112687722 A CN112687722 A CN 112687722A
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- 238000002360 preparation method Methods 0.000 title claims abstract description 12
- 239000010410 layer Substances 0.000 claims abstract description 421
- 229910052751 metal Inorganic materials 0.000 claims abstract description 189
- 239000002184 metal Substances 0.000 claims abstract description 189
- 239000000758 substrate Substances 0.000 claims abstract description 48
- 239000011229 interlayer Substances 0.000 claims abstract description 44
- 238000000059 patterning Methods 0.000 claims description 19
- 238000000034 method Methods 0.000 claims description 18
- 239000000463 material Substances 0.000 claims description 9
- 229910000476 molybdenum oxide Inorganic materials 0.000 claims description 8
- PQQKPALAQIIWST-UHFFFAOYSA-N oxomolybdenum Chemical group [Mo]=O PQQKPALAQIIWST-UHFFFAOYSA-N 0.000 claims description 5
- 230000003667 anti-reflective effect Effects 0.000 claims description 2
- 239000010408 film Substances 0.000 description 16
- 238000002310 reflectometry Methods 0.000 description 10
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- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 3
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 3
- 229910052581 Si3N4 Inorganic materials 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
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- 239000011733 molybdenum Substances 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
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- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 3
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- 238000004544 sputter deposition Methods 0.000 description 3
- 229910052719 titanium Inorganic materials 0.000 description 3
- 239000010936 titanium Substances 0.000 description 3
- 239000004642 Polyimide Substances 0.000 description 2
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 2
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- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 1
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Abstract
The invention provides a display back plate, a preparation method thereof and a display panel, wherein the display back plate comprises a substrate, a first metal layer, an interlayer dielectric layer, a second metal layer, an additional metal layer, an antireflection layer and a flat layer, wherein the second metal layer and the additional metal layer are arranged on one side of the interlayer dielectric layer away from the substrate, the antireflection layer is arranged on one side of the second metal layer away from the substrate, the flat layer covers the second metal layer, and the additional metal layer is arranged corresponding to the first metal layer so that the thickness of the flat layer above the first metal layer is equal to that of the flat layer above the second metal layer.
Description
Technical Field
The invention relates to the technical field of display, in particular to a display back plate, a preparation method of the display back plate and a display panel.
Background
Since there are many metal wires in a Micro Light-Emitting Diode (Micro-LED) display backplane or an Organic Light-Emitting Diode (OLED) OLED display backplane, which may cause the problem of reflectivity polarization of a screen, thereby affecting the actual viewing effect, the reflection of the screen is usually reduced by using a black matrix or black oil to shield the metal wires, or by using a circular polarizer, however, the method of using the black matrix or black oil to shield the metal wires has the defects of reducing the aperture ratio, increasing the experimental process, and having low coating precision, and the method of using the circular polarizer has the defects of reducing the brightness of the emergent Light, and the prior art finds that the reflection of the metal wires can be effectively reduced by using the thin film interference principle under the condition of a proper film thickness parameter, however, since the metal in the display backplane is actually located in different wire layers, the final antireflection effect is affected if the thicknesses of the films above the metal wires of different films are different.
In summary, it is desirable to provide a new display back plate, a method for manufacturing the same, and a display panel, so as to solve the above technical problems.
Disclosure of Invention
The display back plate, the preparation method thereof and the display panel provided by the invention solve the technical problem that when the reflectivity of the existing display back plate is reduced by utilizing film interference, the final antireflection effect is influenced due to the inconsistent thickness of the films above the metal wires of different film layers.
In order to solve the above problems, the technical scheme provided by the invention is as follows:
an embodiment of the present invention provides a display backplane, including:
a substrate;
a first metal layer disposed on the substrate;
the interlayer dielectric layer covers the first metal layer;
the second metal layer and the additional metal layer are arranged on one side, far away from the substrate, of the interlayer dielectric layer; the antireflection layer is arranged on one side of the second metal layer, which is far away from the substrate; and
a planarization layer covering the second metal layer;
the additional metal layer is arranged corresponding to the first metal layer, so that the thickness of the flat layer above the first metal layer is equal to that of the flat layer above the second metal layer.
According to the display back plate provided by the embodiment of the invention, the display back plate further comprises:
a light shielding layer disposed on the substrate;
a buffer layer covering the light-shielding layer and the substrate;
an active layer disposed on the buffer layer;
a gate insulating layer covering the active layer and the buffer layer;
a gate electrode layer disposed on the gate insulating layer; and
the source electrode and the drain electrode are arranged on the interlayer dielectric layer and are respectively connected to the active layer through a first via hole and a second via hole, and the drain electrode is connected to the shading layer through a third via hole;
wherein the first metal layer comprises the gate layer and the second metal layer comprises the source and the drain.
According to the display back plate provided by the embodiment of the invention, the orthographic projection of the additional metal layer on the substrate covers the orthographic projection of the first metal layer on the substrate.
According to the display back plate provided by the embodiment of the invention, the additional metal layer is connected with the first metal layer through the fourth through hole arranged on the flat layer.
According to the display back plate provided by the embodiment of the invention, the material of the antireflection layer is molybdenum oxide.
According to the display back plate provided by the embodiment of the invention, the display back plate is a Micro-LED display back plate or an OLED display back plate.
The embodiment of the invention provides a display panel, which comprises the display back plate.
The embodiment of the invention provides a preparation method of a display back plate, which comprises the following steps:
s10: providing a substrate, and forming a first metal layer on the substrate;
s20: forming an interlayer dielectric layer on the first metal layer;
s30: forming a second metal layer and an additional metal layer on the interlayer dielectric layer, wherein the additional metal layer is arranged corresponding to the first metal layer;
s40: forming an antireflection layer on one side of the second metal layer and the additional metal layer, which is far away from the substrate; and
s50: and forming a flat layer on the antireflection layer, wherein the flat layer covers the interlayer dielectric layer, the second metal layer, the additional metal layer and the antireflection layer, and the thickness of the flat layer above the second metal layer is equal to that of the flat layer above the additional metal layer.
According to the preparation method of the display back plate provided by the embodiment of the invention, in the step of preparing the display back plate, the preparation method further comprises the following steps:
patterning a light shielding layer on the substrate;
forming a buffer layer on the light-shielding layer and the substrate;
patterning an active layer on the buffer layer;
patterning a gate insulating layer on the active layer;
forming a gate electrode layer on the gate insulating layer in a patterning mode;
forming the interlayer dielectric layer on the gate layer, the active layer and the buffer layer;
forming a source electrode and a drain electrode connected to the active layer on the interlayer dielectric layer in a patterning mode;
patterning the interlayer dielectric layer to form the additional metal layer;
forming the anti-reflection layer on the source and drain electrodes and the additional metal layer; and
forming the planarization layer on the source electrode, the drain electrode, and the additional metal layer and the anti-reflection layer.
According to the preparation method of the display back plate provided by the embodiment of the invention, the second metal layer and the additional metal layer are prepared by adopting the same process.
The invention has the beneficial effects that: according to the display back plate, the preparation method thereof and the display panel, the additional metal layer arranged on the same layer as the second metal layer is prepared, and the additional metal layer is arranged opposite to the first metal layer, so that the thickness of the flat layer above the first metal layer is consistent with that of the flat layer above the second metal layer, the influence of a film interference phenomenon generated by the flat layers above metal wires of different film layers on a reflection reducing effect is avoided, and the reflection reducing effect of the display panel can be optimized.
Drawings
In order to illustrate the embodiments or the technical solutions in the prior art more clearly, the drawings needed to be used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the invention, and it is obvious for a person skilled in the art that other drawings can be obtained according to these drawings without creative efforts.
Fig. 1 is a schematic cross-sectional view of a display backplane according to an embodiment of the present invention;
FIG. 2 is a graph of antireflective layer thickness and reflectivity provided by an embodiment of the present invention;
FIG. 3 is a flow chart of a method for manufacturing a display backplane according to an embodiment of the present invention;
fig. 3A to fig. 3E are schematic flow structure diagrams of a manufacturing method of a display backplane according to an embodiment of the present invention.
Detailed Description
The following description of the various embodiments refers to the accompanying drawings that illustrate specific embodiments in which the invention may be practiced. The directional terms mentioned in the present invention, such as [ upper ], [ lower ], [ front ], [ rear ], [ left ], [ right ], [ inner ], [ outer ], [ side ], are only referring to the directions of the attached drawings. Accordingly, the directional terms used are used for explanation and understanding of the present invention, and are not used for limiting the present invention. In the drawings, elements having similar structures are denoted by the same reference numerals.
The invention aims at solving the defect that when the display back plate in the prior art reduces the reflectivity by using thin film interference, the final antireflection effect is influenced because the thicknesses of the flat layers above the metal wires of different film layers are not consistent, and the embodiment can solve the defect.
Referring to fig. 1, a display backplane according to an embodiment of the present invention includes a substrate 101, a first metal layer 107, an interlayer dielectric layer 105, a second metal layer 108, an additional metal layer 109, an antireflection layer 110, and a flat layer 111, where the first metal layer 107 is disposed on the substrate 101, the interlayer dielectric layer 105 covers the first metal layer 107, the second metal layer 108 and the additional metal layer 109 are disposed on a side of the interlayer dielectric layer 105 away from the substrate 101, the antireflection layer 110 is disposed on a side of the second metal layer 108 away from the substrate 101, and the flat layer 111 covers the second metal layer 108.
Since the light can generate thin film interference when passing through the anti-reflection layer 110, the reflected light formed by the anti-reflection layer 110 and the reflected light formed by the first metal layer 107 and the second metal layer 108 can reduce the reflected light of the display back plate through destructive interference of the light, so that the reflectivity can be reduced, and the display quality of the picture can be improved.
The interlayer dielectric layer 105 and the flat layer 111 are made of one or more of silicon oxide, silicon nitride and silicon oxynitride, and since thin film layers such as the interlayer dielectric layer 105 and the flat layer 111 are arranged above the first metal layer 107 and the second metal layer 108 and have thicknesses of about several hundred nanometers, light also has a relatively obvious film interference phenomenon in the interlayer dielectric layer 105 and the flat layer 111 to affect reflectivity, so that the thicknesses of the interlayer dielectric layer 105 and the flat layer 111 above metal wirings of different film layers are not the same, which results in different antireflection effects of the antireflection layer 110 on light. In the embodiment of the present invention, the additional metal layer 109 and the second metal layer 108 are disposed on the same layer, and the additional metal layer 109 and the first metal layer 107 are disposed correspondingly, on one hand, since the thickness of the additional metal layer 109 is about several hundred nanometers, light hardly penetrates through the additional metal layer 109 to reach the interlayer dielectric layer 105, and the interlayer dielectric layer 105 above the first metal layer 107 will not affect the antireflection effect; on the other hand, the additional metal layer 109 is arranged to make the thickness of the flat layer 111 above the first metal layer 107 equal to the thickness of the flat layer 111 above the second metal layer 108, so as to avoid the occurrence of different antireflection effects caused by inconsistent thicknesses of the flat layers 111 above the metal traces of different films.
Further, the display backplane further includes a light-shielding layer 102, a buffer layer 103, an active layer 104, a gate insulating layer 106, a gate layer 1071, a source electrode 1081, and a drain electrode 1082; specifically, the light shielding layer 102 is disposed on the substrate 101 and used for shielding light, so as to effectively avoid light leakage of the display backplane; the buffer layer 103 is arranged on the substrate 101 and used for buffering impact force of vibration on the display back plate in the moving process; the active layer 104 is disposed on the buffer layer 103, the active layer 104 may be made of Indium Gallium Zinc Oxide (IGZO), the active layer 104 includes doped regions 1041 located at two ends and a non-doped region 1042 located between the two doped regions 1041, and the doped regions 1041 may be formed by ion implantation or the like; the gate layer 1071 is disposed on the gate insulating layer 106 and corresponds to the undoped region 1042 of the active layer 104; the source 1081 and the drain 1082 are disposed on the interlayer dielectric layer 105, the source 1081 and the drain 1082 are respectively connected to the doped region 1041 of the active layer 104 through a first via 112 and a second via 113, the drain 1082 is connected to the light shielding layer 102 through a third via 114, specifically, the first via 112 and the second via 113 pass through the interlayer dielectric layer 105, and the third via 114 passes through the interlayer dielectric layer 105 and the buffer layer 103.
The first metal layer 107 and the second metal layer 108 may be metal or alloy having excellent conductivity, such as copper, titanium, molybdenum, etc., the first metal layer 107 includes the gate layer 1071, the second metal layer 108 includes the source electrode 1081 and the drain electrode 1082, the first metal layer 107 further includes a scan line, and the second metal layer 108 further includes a data line.
In the embodiment of the present invention, the orthographic projection of the additional metal layer 109 on the substrate 101 covers the orthographic projection of the first metal layer 107 on the substrate 101, so as to adjust the thicknesses of the planarization layer 111 and the antireflection layer 110, thereby achieving the effect of uniform low reflectivity of the display backplane.
It is understood that the additional metal layer 109 and the first metal layer 107 are prepared in the same layer, and the additional metal layer 109 and the first metal layer 107 have the same height, so that the thickness of the planarization layer 111 above the first metal layer 107 is equal to the thickness of the planarization layer 111 above the second metal layer 108.
Further, in the embodiment of the present invention, the additional metal layer 109 and the first metal layer 107 may be connected by a fourth via 115 disposed on the planarization layer 111, and of course, in other embodiments, the additional metal layer 109 and the first metal layer 107 may not be connected, which should not be limited thereto.
Specifically, the anti-reflection layer 110 is an inorganic thin film with a weak absorption coefficient, for example, the material of the anti-reflection layer 110 is molybdenum oxide (MoOx), and the like, and generally, for a three-layer structure of air/anti-reflection layer/metal trace, when the thickness of the anti-reflection layer 110 is equal to 1/4 wavelengths, a lower reflectivity can be obtained, accordingly, in the embodiment of the present invention, a uniform low reflectivity can be obtained relatively easily by designing the thicknesses of the anti-reflection layer 110 and the flat layer 111, and a specific value can be obtained by theoretical calculation according to the dielectric constant parameters of the anti-reflection layer 110 and the flat layer 111, for example, referring to the experimental data provided in fig. 2, under the condition that the thickness of the flat layer 111 is 250nm, and the material of the anti-reflection layer 110 is molybdenum oxide (MoOx), when the thickness of the anti-reflection layer 110 is 60nm, its reflectivity is the lowest.
Specifically, the display back panel can be a Micro-LED display back panel or an OLED display back panel, and when the display back panel is the Micro-LED display back panel, the display back panel further includes an LED chip, and after a thin film transistor array is formed on the substrate, the LED chip is transferred to a position above the thin film transistor array in a bulk transfer manner; when the display back plate is an OLED display back plate, the display back plate further includes film layer structures such as an organic light emitting layer, a pixel defining layer, and an encapsulating layer disposed on the thin film transistor array.
Referring to fig. 3, a method for manufacturing a display backplane according to an embodiment of the present invention includes the following steps:
s10: a substrate 101 is provided, and a first metal layer 107 is formed on the substrate 101.
Specifically, referring to fig. 3A, the substrate 101 may be a flexible substrate, the substrate 101 is made of Polyimide (PI), the first metal layer 107 is formed on the substrate 101 by a yellow light patterning process, the first metal layer 107 includes a plurality of metal traces, and the first metal layer 107 may be made of a metal or an alloy containing copper, titanium, molybdenum and the like with excellent conductivity.
S20: an interlayer dielectric layer 105 is formed on the first metal layer 107.
Specifically, referring to fig. 3B, the dielectric layer may be formed on the first metal layer 107 by deposition, sputtering or coating, and the material of the interlayer dielectric layer 105 may be one or more of silicon oxide, silicon nitride and silicon oxynitride.
S30: and forming a second metal layer 108 and an additional metal layer 109 on the interlayer dielectric layer 105, wherein the additional metal layer 109 is arranged corresponding to the first metal layer 107.
Specifically, referring to fig. 3C, the second metal layer 108 and the additional metal layer 109 are formed on the interlayer dielectric layer 105 by a photolithography process, the first metal layer 107 includes a plurality of metal traces, and the material of the second metal layer 108 may include a metal or an alloy with excellent conductivity, such as copper, titanium, and molybdenum; the additional metal layer 109 is disposed corresponding to the first metal layer 107, the second metal layer 108 and the additional metal layer 109 are manufactured by using the same process, which can save the process, and the second metal layer 108 and the additional metal layer 109 can be made of the same material.
S40: an anti-reflection layer 110 is formed on the second metal layer 108 and the additional metal layer 109 on the side away from the substrate 101.
Specifically, referring to fig. 3D, an anti-reflection material may be sputtered on the second metal layer 108 and the additional metal layer 109 on the side away from the substrate 101, and then the anti-reflection layer 110 is formed by an etching process, where the anti-reflection layer 110 may be molybdenum oxide (MoOx) or the like.
S50: forming a flat layer 111 on the anti-reflection layer 110, wherein the flat layer 111 covers the interlayer dielectric layer 105, the second metal layer 108, the additional metal layer 109 and the anti-reflection layer 110, and the thickness of the flat layer 111 above the second metal layer 108 is equal to the thickness of the flat layer 111 above the additional metal layer 109.
Specifically, referring to fig. 3E, the planarization layer 111 may be formed on the anti-reflection layer 110 by deposition, sputtering or coating, and the material of the planarization layer 111 may be one or more of silicon oxide, silicon nitride and silicon oxynitride.
In the embodiment of the present invention, the additional metal layer 109 corresponding to the first metal layer 107 is formed on the interlayer dielectric layer 105, so that the thickness of the flat layer 111 above the second metal layer 108 is equal to the thickness of the flat layer 111 above the additional metal layer 109, thereby avoiding the occurrence of different antireflection effects due to the inconsistent thickness of the flat layer 111 above the metal traces of different film layers.
In the embodiment of the present invention, it is possible to obtain a uniform low reflectance relatively easily by designing the thicknesses of the antireflection layer 110 and the planarization layer 111.
Further, in the step of preparing the display back plate, the method further comprises:
patterning a light-shielding layer 102 on the substrate 101;
forming a buffer layer 103 on the light-shielding layer 102 and the substrate 101;
an active layer 104 is formed on the buffer layer 103 in a patterning mode;
patterning a gate insulating layer 106 on the active layer 104;
patterning a gate electrode layer 1071 on the gate insulating layer 106;
forming the interlayer dielectric layer 105 on the gate layer 1071, the active layer 104, and the buffer layer 103;
patterning the interlayer dielectric layer 105 to form a source electrode 1081 and a drain electrode 1082 connected to the active layer 104;
patterning the additional metal layer 109 on the interlayer dielectric layer 105;
forming the anti-reflection layer 110 on the source 1081 and the drain 1082 and the additional metal layer 109; and
the planarization layer 111 is formed on the source 1081, the drain 1082, and the additional metal layer 109 and the anti-reflection layer 110.
The light-shielding layer 102, the active layer 104, the gate insulating layer 106, the gate layer 1071, the source electrode 1081, the drain electrode 1082 and the additional metal layer 109 may be formed by a photolithography process, and the buffer layer 103, the interlayer dielectric layer 105 and the planarization layer 111 may be formed by deposition, sputtering or coating.
The source 1081 and the drain 1082 are respectively connected to the doped region 1041 of the active layer 104 through a first via 112 and a second via 113, and the drain 1082 is connected to the light shielding layer 102 through a third via 114, specifically, the first via 112 and the second via 113 pass through the interlayer dielectric layer 105, and the third via 114 passes through the interlayer dielectric layer 105 and the buffer layer 103.
Specifically, the first metal layer 107 includes the gate layer 1071, the second metal layer 108 includes the source electrode 1081 and the drain electrode 1082, and further, the first metal layer 107 further includes a scan line, and the second metal layer 108 further includes a data line.
The embodiment of the invention also comprises a display panel, wherein the display panel comprises the display back plate in the embodiment, and the display panel can be a Micro-LED display panel or an OLED display panel.
The beneficial effects are that: according to the display back plate, the preparation method thereof and the display panel provided by the embodiment of the invention, the additional metal layer arranged on the same layer as the second metal layer is prepared, and the additional metal layer is arranged opposite to the first metal layer, so that the thickness of the flat layer above the first metal layer is consistent with that of the flat layer above the second metal layer, the influence of a film interference phenomenon generated by the flat layers above metal wires of different film layers on a reflection reducing effect is avoided, and the reflection reducing effect of the display panel can be optimized.
In summary, although the present invention has been described with reference to the preferred embodiments, the above-described preferred embodiments are not intended to limit the present invention, and those skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention, therefore, the scope of the present invention shall be determined by the appended claims.
Claims (10)
1. A display backplane, comprising:
a substrate;
a first metal layer disposed on the substrate;
the interlayer dielectric layer covers the first metal layer;
the second metal layer and the additional metal layer are arranged on one side, far away from the substrate, of the interlayer dielectric layer;
the antireflection layer is arranged on one side of the second metal layer, which is far away from the substrate; and
a planarization layer covering the second metal layer;
the additional metal layer is arranged corresponding to the first metal layer, so that the thickness of the flat layer above the first metal layer is equal to that of the flat layer above the second metal layer.
2. The display backplane of claim 1, further comprising:
a light shielding layer disposed on the substrate;
a buffer layer covering the light-shielding layer and the substrate;
an active layer disposed on the buffer layer;
a gate insulating layer covering the active layer and the buffer layer;
a gate electrode layer disposed on the gate insulating layer; and
the source electrode and the drain electrode are arranged on the interlayer dielectric layer and are respectively connected to the active layer through a first via hole and a second via hole, and the drain electrode is connected to the shading layer through a third via hole;
wherein the first metal layer comprises the gate layer and the second metal layer comprises the source and the drain.
3. A display backplane according to claim 1, wherein an orthographic projection of the additional metal layer on the substrate covers an orthographic projection of the first metal layer on the substrate.
4. The display backplane of claim 1, wherein the additional metal layer and the first metal layer are connected by a fourth via disposed on the planarization layer.
5. The display backplane of claim 1, wherein the material of the antireflective layer is molybdenum oxide.
6. The display backplane of claim 1, wherein the display backplane is a Micro-LED display backplane or an OLED display backplane.
7. A display panel comprising the display back sheet according to any one of claims 1 to 6.
8. A preparation method of a display back plate is characterized by comprising the following steps:
s10: providing a substrate, and forming a first metal layer on the substrate;
s20: forming an interlayer dielectric layer on the first metal layer;
s30: forming a second metal layer and an additional metal layer on the interlayer dielectric layer, wherein the additional metal layer is arranged corresponding to the first metal layer;
s40: forming an antireflection layer on one side of the second metal layer and the additional metal layer, which is far away from the substrate; and
s50: and forming a flat layer on the antireflection layer, wherein the flat layer covers the interlayer dielectric layer, the second metal layer, the additional metal layer and the antireflection layer, and the thickness of the flat layer above the second metal layer is equal to that of the flat layer above the additional metal layer.
9. The method for preparing a display back sheet according to claim 8, further comprising, in the step of preparing the display back sheet:
patterning a light shielding layer on the substrate;
forming a buffer layer on the light-shielding layer and the substrate;
patterning an active layer on the buffer layer;
patterning a gate insulating layer on the active layer;
forming a gate electrode layer on the gate insulating layer in a patterning mode;
forming the interlayer dielectric layer on the gate layer, the active layer and the buffer layer;
forming a source electrode and a drain electrode connected to the active layer on the interlayer dielectric layer in a patterning mode;
patterning the interlayer dielectric layer to form the additional metal layer;
forming the anti-reflection layer on the source and drain electrodes and the additional metal layer; and
forming the planarization layer on the source electrode, the drain electrode, and the additional metal layer and the anti-reflection layer.
10. The method of claim 8, wherein the second metal layer and the additional metal layer are formed by a same process.
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Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
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| US20030168688A1 (en) * | 1997-03-28 | 2003-09-11 | Semiconductor Energy Laboratory Co., Ltd. | Active matrix liquid crystal display device |
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